1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
4
5 // REQUIRES: aarch64-registered-target || arm-registered-target
6
7 #include <arm_mve.h>
8
9 // CHECK-LABEL: @test_vcmlaq_f16(
10 // CHECK-NEXT: entry:
11 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 0, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
12 // CHECK-NEXT: ret <8 x half> [[TMP0]]
13 //
test_vcmlaq_f16(float16x8_t a,float16x8_t b,float16x8_t c)14 float16x8_t test_vcmlaq_f16(float16x8_t a, float16x8_t b, float16x8_t c)
15 {
16 #ifdef POLYMORPHIC
17 return vcmlaq(a, b, c);
18 #else
19 return vcmlaq_f16(a, b, c);
20 #endif
21 }
22
23 // CHECK-LABEL: @test_vcmlaq_f32(
24 // CHECK-NEXT: entry:
25 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 0, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
26 // CHECK-NEXT: ret <4 x float> [[TMP0]]
27 //
test_vcmlaq_f32(float32x4_t a,float32x4_t b,float32x4_t c)28 float32x4_t test_vcmlaq_f32(float32x4_t a, float32x4_t b, float32x4_t c)
29 {
30 #ifdef POLYMORPHIC
31 return vcmlaq(a, b, c);
32 #else
33 return vcmlaq_f32(a, b, c);
34 #endif
35 }
36
37 // CHECK-LABEL: @test_vcmlaq_rot90_f16(
38 // CHECK-NEXT: entry:
39 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 1, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
40 // CHECK-NEXT: ret <8 x half> [[TMP0]]
41 //
test_vcmlaq_rot90_f16(float16x8_t a,float16x8_t b,float16x8_t c)42 float16x8_t test_vcmlaq_rot90_f16(float16x8_t a, float16x8_t b, float16x8_t c)
43 {
44 #ifdef POLYMORPHIC
45 return vcmlaq_rot90(a, b, c);
46 #else
47 return vcmlaq_rot90_f16(a, b, c);
48 #endif
49 }
50
51 // CHECK-LABEL: @test_vcmlaq_rot90_f32(
52 // CHECK-NEXT: entry:
53 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 1, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
54 // CHECK-NEXT: ret <4 x float> [[TMP0]]
55 //
test_vcmlaq_rot90_f32(float32x4_t a,float32x4_t b,float32x4_t c)56 float32x4_t test_vcmlaq_rot90_f32(float32x4_t a, float32x4_t b, float32x4_t c)
57 {
58 #ifdef POLYMORPHIC
59 return vcmlaq_rot90(a, b, c);
60 #else
61 return vcmlaq_rot90_f32(a, b, c);
62 #endif
63 }
64
65 // CHECK-LABEL: @test_vcmlaq_rot180_f16(
66 // CHECK-NEXT: entry:
67 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 2, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
68 // CHECK-NEXT: ret <8 x half> [[TMP0]]
69 //
test_vcmlaq_rot180_f16(float16x8_t a,float16x8_t b,float16x8_t c)70 float16x8_t test_vcmlaq_rot180_f16(float16x8_t a, float16x8_t b, float16x8_t c)
71 {
72 #ifdef POLYMORPHIC
73 return vcmlaq_rot180(a, b, c);
74 #else
75 return vcmlaq_rot180_f16(a, b, c);
76 #endif
77 }
78
79 // CHECK-LABEL: @test_vcmlaq_rot180_f32(
80 // CHECK-NEXT: entry:
81 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 2, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
82 // CHECK-NEXT: ret <4 x float> [[TMP0]]
83 //
test_vcmlaq_rot180_f32(float32x4_t a,float32x4_t b,float32x4_t c)84 float32x4_t test_vcmlaq_rot180_f32(float32x4_t a, float32x4_t b, float32x4_t c)
85 {
86 #ifdef POLYMORPHIC
87 return vcmlaq_rot180(a, b, c);
88 #else
89 return vcmlaq_rot180_f32(a, b, c);
90 #endif
91 }
92
93 // CHECK-LABEL: @test_vcmlaq_rot270_f16(
94 // CHECK-NEXT: entry:
95 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.v8f16(i32 3, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]])
96 // CHECK-NEXT: ret <8 x half> [[TMP0]]
97 //
test_vcmlaq_rot270_f16(float16x8_t a,float16x8_t b,float16x8_t c)98 float16x8_t test_vcmlaq_rot270_f16(float16x8_t a, float16x8_t b, float16x8_t c)
99 {
100 #ifdef POLYMORPHIC
101 return vcmlaq_rot270(a, b, c);
102 #else
103 return vcmlaq_rot270_f16(a, b, c);
104 #endif
105 }
106
107 // CHECK-LABEL: @test_vcmlaq_rot270_f32(
108 // CHECK-NEXT: entry:
109 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.v4f32(i32 3, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
110 // CHECK-NEXT: ret <4 x float> [[TMP0]]
111 //
test_vcmlaq_rot270_f32(float32x4_t a,float32x4_t b,float32x4_t c)112 float32x4_t test_vcmlaq_rot270_f32(float32x4_t a, float32x4_t b, float32x4_t c)
113 {
114 #ifdef POLYMORPHIC
115 return vcmlaq_rot270(a, b, c);
116 #else
117 return vcmlaq_rot270_f32(a, b, c);
118 #endif
119 }
120
121 // CHECK-LABEL: @test_vcmlaq_m_f16(
122 // CHECK-NEXT: entry:
123 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
124 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
125 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 0, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
126 // CHECK-NEXT: ret <8 x half> [[TMP2]]
127 //
test_vcmlaq_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)128 float16x8_t test_vcmlaq_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
129 {
130 #ifdef POLYMORPHIC
131 return vcmlaq_m(a, b, c, p);
132 #else
133 return vcmlaq_m_f16(a, b, c, p);
134 #endif
135 }
136
137 // CHECK-LABEL: @test_vcmlaq_m_f32(
138 // CHECK-NEXT: entry:
139 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
140 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
141 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 0, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
142 // CHECK-NEXT: ret <4 x float> [[TMP2]]
143 //
test_vcmlaq_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)144 float32x4_t test_vcmlaq_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
145 {
146 #ifdef POLYMORPHIC
147 return vcmlaq_m(a, b, c, p);
148 #else
149 return vcmlaq_m_f32(a, b, c, p);
150 #endif
151 }
152
153 // CHECK-LABEL: @test_vcmlaq_rot90_m_f16(
154 // CHECK-NEXT: entry:
155 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
156 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
157 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 1, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
158 // CHECK-NEXT: ret <8 x half> [[TMP2]]
159 //
test_vcmlaq_rot90_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)160 float16x8_t test_vcmlaq_rot90_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
161 {
162 #ifdef POLYMORPHIC
163 return vcmlaq_rot90_m(a, b, c, p);
164 #else
165 return vcmlaq_rot90_m_f16(a, b, c, p);
166 #endif
167 }
168
169 // CHECK-LABEL: @test_vcmlaq_rot90_m_f32(
170 // CHECK-NEXT: entry:
171 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
172 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
173 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 1, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
174 // CHECK-NEXT: ret <4 x float> [[TMP2]]
175 //
test_vcmlaq_rot90_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)176 float32x4_t test_vcmlaq_rot90_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
177 {
178 #ifdef POLYMORPHIC
179 return vcmlaq_rot90_m(a, b, c, p);
180 #else
181 return vcmlaq_rot90_m_f32(a, b, c, p);
182 #endif
183 }
184
185 // CHECK-LABEL: @test_vcmlaq_rot180_m_f16(
186 // CHECK-NEXT: entry:
187 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
188 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
189 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 2, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
190 // CHECK-NEXT: ret <8 x half> [[TMP2]]
191 //
test_vcmlaq_rot180_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)192 float16x8_t test_vcmlaq_rot180_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
193 {
194 #ifdef POLYMORPHIC
195 return vcmlaq_rot180_m(a, b, c, p);
196 #else
197 return vcmlaq_rot180_m_f16(a, b, c, p);
198 #endif
199 }
200
201 // CHECK-LABEL: @test_vcmlaq_rot180_m_f32(
202 // CHECK-NEXT: entry:
203 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
204 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
205 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 2, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
206 // CHECK-NEXT: ret <4 x float> [[TMP2]]
207 //
test_vcmlaq_rot180_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)208 float32x4_t test_vcmlaq_rot180_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
209 {
210 #ifdef POLYMORPHIC
211 return vcmlaq_rot180_m(a, b, c, p);
212 #else
213 return vcmlaq_rot180_m_f32(a, b, c, p);
214 #endif
215 }
216
217 // CHECK-LABEL: @test_vcmlaq_rot270_m_f16(
218 // CHECK-NEXT: entry:
219 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
220 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
221 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 3, <8 x half> [[A:%.*]], <8 x half> [[B:%.*]], <8 x half> [[C:%.*]], <8 x i1> [[TMP1]])
222 // CHECK-NEXT: ret <8 x half> [[TMP2]]
223 //
test_vcmlaq_rot270_m_f16(float16x8_t a,float16x8_t b,float16x8_t c,mve_pred16_t p)224 float16x8_t test_vcmlaq_rot270_m_f16(float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
225 {
226 #ifdef POLYMORPHIC
227 return vcmlaq_rot270_m(a, b, c, p);
228 #else
229 return vcmlaq_rot270_m_f16(a, b, c, p);
230 #endif
231 }
232
233 // CHECK-LABEL: @test_vcmlaq_rot270_m_f32(
234 // CHECK-NEXT: entry:
235 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
236 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
237 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vcmlaq.predicated.v4f32.v4i1(i32 3, <4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]], <4 x i1> [[TMP1]])
238 // CHECK-NEXT: ret <4 x float> [[TMP2]]
239 //
test_vcmlaq_rot270_m_f32(float32x4_t a,float32x4_t b,float32x4_t c,mve_pred16_t p)240 float32x4_t test_vcmlaq_rot270_m_f32(float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
241 {
242 #ifdef POLYMORPHIC
243 return vcmlaq_rot270_m(a, b, c, p);
244 #else
245 return vcmlaq_rot270_m_f32(a, b, c, p);
246 #endif
247 }
248
249