1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes='mem2reg,sroa,early-cse<>' | FileCheck %s
3 // RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes='mem2reg,sroa,early-cse<>' | FileCheck %s
4
5 // REQUIRES: aarch64-registered-target || arm-registered-target
6
7 #include <arm_mve.h>
8
9 // CHECK-LABEL: @test_vctp16q(
10 // CHECK-NEXT: entry:
11 // CHECK-NEXT: [[TMP0:%.*]] = call <8 x i1> @llvm.arm.mve.vctp16(i32 [[A:%.*]])
12 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP0]])
13 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
14 // CHECK-NEXT: ret i16 [[TMP2]]
15 //
test_vctp16q(uint32_t a)16 mve_pred16_t test_vctp16q(uint32_t a)
17 {
18 return vctp16q(a);
19 }
20
21 // CHECK-LABEL: @test_vctp16q_m(
22 // CHECK-NEXT: entry:
23 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
24 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
25 // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i1> @llvm.arm.mve.vctp16(i32 [[A:%.*]])
26 // CHECK-NEXT: [[TMP3:%.*]] = and <8 x i1> [[TMP1]], [[TMP2]]
27 // CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP3]])
28 // CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
29 // CHECK-NEXT: ret i16 [[TMP5]]
30 //
test_vctp16q_m(uint32_t a,mve_pred16_t p)31 mve_pred16_t test_vctp16q_m(uint32_t a, mve_pred16_t p)
32 {
33 return vctp16q_m(a, p);
34 }
35
36 // CHECK-LABEL: @test_vctp32q(
37 // CHECK-NEXT: entry:
38 // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i1> @llvm.arm.mve.vctp32(i32 [[A:%.*]])
39 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP0]])
40 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
41 // CHECK-NEXT: ret i16 [[TMP2]]
42 //
test_vctp32q(uint32_t a)43 mve_pred16_t test_vctp32q(uint32_t a)
44 {
45 return vctp32q(a);
46 }
47
48 // CHECK-LABEL: @test_vctp32q_m(
49 // CHECK-NEXT: entry:
50 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
51 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
52 // CHECK-NEXT: [[TMP2:%.*]] = call <4 x i1> @llvm.arm.mve.vctp32(i32 [[A:%.*]])
53 // CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP1]], [[TMP2]]
54 // CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP3]])
55 // CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
56 // CHECK-NEXT: ret i16 [[TMP5]]
57 //
test_vctp32q_m(uint32_t a,mve_pred16_t p)58 mve_pred16_t test_vctp32q_m(uint32_t a, mve_pred16_t p)
59 {
60 return vctp32q_m(a, p);
61 }
62
63 // CHECK-LABEL: @test_vctp64q(
64 // CHECK-NEXT: entry:
65 // CHECK-NEXT: [[TMP0:%.*]] = call <2 x i1> @llvm.arm.mve.vctp64(i32 [[A:%.*]])
66 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v2i1(<2 x i1> [[TMP0]])
67 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
68 // CHECK-NEXT: ret i16 [[TMP2]]
69 //
test_vctp64q(uint32_t a)70 mve_pred16_t test_vctp64q(uint32_t a)
71 {
72 return vctp64q(a);
73 }
74
75 // CHECK-LABEL: @test_vctp64q_m(
76 // CHECK-NEXT: entry:
77 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
78 // CHECK-NEXT: [[TMP1:%.*]] = call <2 x i1> @llvm.arm.mve.pred.i2v.v2i1(i32 [[TMP0]])
79 // CHECK-NEXT: [[TMP2:%.*]] = call <2 x i1> @llvm.arm.mve.vctp64(i32 [[A:%.*]])
80 // CHECK-NEXT: [[TMP3:%.*]] = and <2 x i1> [[TMP1]], [[TMP2]]
81 // CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v2i1(<2 x i1> [[TMP3]])
82 // CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
83 // CHECK-NEXT: ret i16 [[TMP5]]
84 //
test_vctp64q_m(uint32_t a,mve_pred16_t p)85 mve_pred16_t test_vctp64q_m(uint32_t a, mve_pred16_t p)
86 {
87 return vctp64q_m(a, p);
88 }
89
90 // CHECK-LABEL: @test_vctp8q(
91 // CHECK-NEXT: entry:
92 // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i1> @llvm.arm.mve.vctp8(i32 [[A:%.*]])
93 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1> [[TMP0]])
94 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
95 // CHECK-NEXT: ret i16 [[TMP2]]
96 //
test_vctp8q(uint32_t a)97 mve_pred16_t test_vctp8q(uint32_t a)
98 {
99 return vctp8q(a);
100 }
101
102 // CHECK-LABEL: @test_vctp8q_m(
103 // CHECK-NEXT: entry:
104 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
105 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
106 // CHECK-NEXT: [[TMP2:%.*]] = call <16 x i1> @llvm.arm.mve.vctp8(i32 [[A:%.*]])
107 // CHECK-NEXT: [[TMP3:%.*]] = and <16 x i1> [[TMP1]], [[TMP2]]
108 // CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v16i1(<16 x i1> [[TMP3]])
109 // CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
110 // CHECK-NEXT: ret i16 [[TMP5]]
111 //
test_vctp8q_m(uint32_t a,mve_pred16_t p)112 mve_pred16_t test_vctp8q_m(uint32_t a, mve_pred16_t p)
113 {
114 return vctp8q_m(a, p);
115 }
116
117 // CHECK-LABEL: @test_vpnot(
118 // CHECK-NEXT: entry:
119 // CHECK-NEXT: [[TMP0:%.*]] = xor i16 [[A:%.*]], -1
120 // CHECK-NEXT: ret i16 [[TMP0]]
121 //
test_vpnot(mve_pred16_t a)122 mve_pred16_t test_vpnot(mve_pred16_t a)
123 {
124 return vpnot(a);
125 }
126
127 // CHECK-LABEL: @test_vpselq_f16(
128 // CHECK-NEXT: entry:
129 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
130 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
131 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x half> [[A:%.*]], <8 x half> [[B:%.*]]
132 // CHECK-NEXT: ret <8 x half> [[TMP2]]
133 //
test_vpselq_f16(float16x8_t a,float16x8_t b,mve_pred16_t p)134 float16x8_t test_vpselq_f16(float16x8_t a, float16x8_t b, mve_pred16_t p)
135 {
136 #ifdef POLYMORPHIC
137 return vpselq(a, b, p);
138 #else /* POLYMORPHIC */
139 return vpselq_f16(a, b, p);
140 #endif /* POLYMORPHIC */
141 }
142
143 // CHECK-LABEL: @test_vpselq_f32(
144 // CHECK-NEXT: entry:
145 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
146 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
147 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x float> [[A:%.*]], <4 x float> [[B:%.*]]
148 // CHECK-NEXT: ret <4 x float> [[TMP2]]
149 //
test_vpselq_f32(float32x4_t a,float32x4_t b,mve_pred16_t p)150 float32x4_t test_vpselq_f32(float32x4_t a, float32x4_t b, mve_pred16_t p)
151 {
152 #ifdef POLYMORPHIC
153 return vpselq(a, b, p);
154 #else /* POLYMORPHIC */
155 return vpselq_f32(a, b, p);
156 #endif /* POLYMORPHIC */
157 }
158
159 // CHECK-LABEL: @test_vpselq_s16(
160 // CHECK-NEXT: entry:
161 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
162 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
163 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]]
164 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
165 //
test_vpselq_s16(int16x8_t a,int16x8_t b,mve_pred16_t p)166 int16x8_t test_vpselq_s16(int16x8_t a, int16x8_t b, mve_pred16_t p)
167 {
168 #ifdef POLYMORPHIC
169 return vpselq(a, b, p);
170 #else /* POLYMORPHIC */
171 return vpselq_s16(a, b, p);
172 #endif /* POLYMORPHIC */
173 }
174
175 // CHECK-LABEL: @test_vpselq_s32(
176 // CHECK-NEXT: entry:
177 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
178 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
179 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
180 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
181 //
test_vpselq_s32(int32x4_t a,int32x4_t b,mve_pred16_t p)182 int32x4_t test_vpselq_s32(int32x4_t a, int32x4_t b, mve_pred16_t p)
183 {
184 #ifdef POLYMORPHIC
185 return vpselq(a, b, p);
186 #else /* POLYMORPHIC */
187 return vpselq_s32(a, b, p);
188 #endif /* POLYMORPHIC */
189 }
190
191 // CHECK-LABEL: @test_vpselq_s64(
192 // CHECK-NEXT: entry:
193 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
194 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
195 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32>
196 // CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x i32>
197 // CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[TMP3]]
198 // CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <2 x i64>
199 // CHECK-NEXT: ret <2 x i64> [[TMP5]]
200 //
test_vpselq_s64(int64x2_t a,int64x2_t b,mve_pred16_t p)201 int64x2_t test_vpselq_s64(int64x2_t a, int64x2_t b, mve_pred16_t p)
202 {
203 #ifdef POLYMORPHIC
204 return vpselq(a, b, p);
205 #else /* POLYMORPHIC */
206 return vpselq_s64(a, b, p);
207 #endif /* POLYMORPHIC */
208 }
209
210 // CHECK-LABEL: @test_vpselq_s8(
211 // CHECK-NEXT: entry:
212 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
213 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
214 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]
215 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
216 //
test_vpselq_s8(int8x16_t a,int8x16_t b,mve_pred16_t p)217 int8x16_t test_vpselq_s8(int8x16_t a, int8x16_t b, mve_pred16_t p)
218 {
219 #ifdef POLYMORPHIC
220 return vpselq(a, b, p);
221 #else /* POLYMORPHIC */
222 return vpselq_s8(a, b, p);
223 #endif /* POLYMORPHIC */
224 }
225
226 // CHECK-LABEL: @test_vpselq_u16(
227 // CHECK-NEXT: entry:
228 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
229 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
230 // CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]]
231 // CHECK-NEXT: ret <8 x i16> [[TMP2]]
232 //
test_vpselq_u16(uint16x8_t a,uint16x8_t b,mve_pred16_t p)233 uint16x8_t test_vpselq_u16(uint16x8_t a, uint16x8_t b, mve_pred16_t p)
234 {
235 #ifdef POLYMORPHIC
236 return vpselq(a, b, p);
237 #else /* POLYMORPHIC */
238 return vpselq_u16(a, b, p);
239 #endif /* POLYMORPHIC */
240 }
241
242 // CHECK-LABEL: @test_vpselq_u32(
243 // CHECK-NEXT: entry:
244 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
245 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
246 // CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
247 // CHECK-NEXT: ret <4 x i32> [[TMP2]]
248 //
test_vpselq_u32(uint32x4_t a,uint32x4_t b,mve_pred16_t p)249 uint32x4_t test_vpselq_u32(uint32x4_t a, uint32x4_t b, mve_pred16_t p)
250 {
251 #ifdef POLYMORPHIC
252 return vpselq(a, b, p);
253 #else /* POLYMORPHIC */
254 return vpselq_u32(a, b, p);
255 #endif /* POLYMORPHIC */
256 }
257
258 // CHECK-LABEL: @test_vpselq_u64(
259 // CHECK-NEXT: entry:
260 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
261 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
262 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32>
263 // CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x i32>
264 // CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[TMP2]], <4 x i32> [[TMP3]]
265 // CHECK-NEXT: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <2 x i64>
266 // CHECK-NEXT: ret <2 x i64> [[TMP5]]
267 //
test_vpselq_u64(uint64x2_t a,uint64x2_t b,mve_pred16_t p)268 uint64x2_t test_vpselq_u64(uint64x2_t a, uint64x2_t b, mve_pred16_t p)
269 {
270 #ifdef POLYMORPHIC
271 return vpselq(a, b, p);
272 #else /* POLYMORPHIC */
273 return vpselq_u64(a, b, p);
274 #endif /* POLYMORPHIC */
275 }
276
277 // CHECK-LABEL: @test_vpselq_u8(
278 // CHECK-NEXT: entry:
279 // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
280 // CHECK-NEXT: [[TMP1:%.*]] = call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
281 // CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]
282 // CHECK-NEXT: ret <16 x i8> [[TMP2]]
283 //
test_vpselq_u8(uint8x16_t a,uint8x16_t b,mve_pred16_t p)284 uint8x16_t test_vpselq_u8(uint8x16_t a, uint8x16_t b, mve_pred16_t p)
285 {
286 #ifdef POLYMORPHIC
287 return vpselq(a, b, p);
288 #else /* POLYMORPHIC */
289 return vpselq_u8(a, b, p);
290 #endif /* POLYMORPHIC */
291 }
292
293