1 // REQUIRES: x86-registered-target
2 // RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=UNCONSTRAINED --check-prefix=COMMON --check-prefix=COMMONIR
3 // RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -ffp-exception-behavior=maytrap -DSTRICT=1 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=CONSTRAINED --check-prefix=COMMON --check-prefix=COMMONIR --implicit-check-not=fpexcept.maytrap
4 // RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -S -o - -Wall -Werror | FileCheck %s --check-prefix=CHECK-ASM --check-prefix=COMMON
5 // RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -ffp-exception-behavior=maytrap -DSTRICT=1 -S -o - -Wall -Werror | FileCheck %s --check-prefix=CHECK-ASM --check-prefix=COMMON --implicit-check-not=fpexcept.maytrap
6
7 // Any cases of "fpexcept.maytrap" in this test are clang bugs.
8
9 #ifdef STRICT
10 // Test that the constrained intrinsics are picking up the exception
11 // metadata from the AST instead of the global default from the command line.
12
13 #pragma float_control(except, on)
14 #endif
15
16
17 #include <immintrin.h>
18
test_mm512_cvtepi64_pd(__m512i __A)19 __m512d test_mm512_cvtepi64_pd(__m512i __A) {
20 // COMMON-LABEL: test_mm512_cvtepi64_pd
21 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x double>
22 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
23 // CHECK-ASM: vcvtqq2pd
24 return _mm512_cvtepi64_pd(__A);
25 }
26
test_mm512_mask_cvtepi64_pd(__m512d __W,__mmask8 __U,__m512i __A)27 __m512d test_mm512_mask_cvtepi64_pd(__m512d __W, __mmask8 __U, __m512i __A) {
28 // COMMON-LABEL: test_mm512_mask_cvtepi64_pd
29 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x double>
30 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
31 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
32 // CHECK-ASM: vcvtqq2pd
33 return _mm512_mask_cvtepi64_pd(__W, __U, __A);
34 }
35
test_mm512_maskz_cvtepi64_pd(__mmask8 __U,__m512i __A)36 __m512d test_mm512_maskz_cvtepi64_pd(__mmask8 __U, __m512i __A) {
37 // COMMON-LABEL: test_mm512_maskz_cvtepi64_pd
38 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x double>
39 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.sitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
40 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
41 // CHECK-ASM: vcvtqq2pd
42 return _mm512_maskz_cvtepi64_pd(__U, __A);
43 }
44
test_mm512_cvt_roundepi64_pd(__m512i __A)45 __m512d test_mm512_cvt_roundepi64_pd(__m512i __A) {
46 // COMMON-LABEL: test_mm512_cvt_roundepi64_pd
47 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f64.v8i64
48 // CHECK-ASM: vcvtqq2pd
49 return _mm512_cvt_roundepi64_pd(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
50 }
51
test_mm512_mask_cvt_roundepi64_pd(__m512d __W,__mmask8 __U,__m512i __A)52 __m512d test_mm512_mask_cvt_roundepi64_pd(__m512d __W, __mmask8 __U, __m512i __A) {
53 // COMMON-LABEL: test_mm512_mask_cvt_roundepi64_pd
54 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f64.v8i64
55 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
56 // CHECK-ASM: vcvtqq2pd
57 return _mm512_mask_cvt_roundepi64_pd(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
58 }
59
test_mm512_maskz_cvt_roundepi64_pd(__mmask8 __U,__m512i __A)60 __m512d test_mm512_maskz_cvt_roundepi64_pd(__mmask8 __U, __m512i __A) {
61 // COMMON-LABEL: test_mm512_maskz_cvt_roundepi64_pd
62 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f64.v8i64
63 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
64 // CHECK-ASM: vcvtqq2pd
65 return _mm512_maskz_cvt_roundepi64_pd(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
66 }
67
test_mm512_cvtepi64_ps(__m512i __A)68 __m256 test_mm512_cvtepi64_ps(__m512i __A) {
69 // COMMON-LABEL: test_mm512_cvtepi64_ps
70 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x float>
71 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
72 // CHECK-ASM: vcvtqq2ps
73 return _mm512_cvtepi64_ps(__A);
74 }
75
test_mm512_mask_cvtepi64_ps(__m256 __W,__mmask8 __U,__m512i __A)76 __m256 test_mm512_mask_cvtepi64_ps(__m256 __W, __mmask8 __U, __m512i __A) {
77 // COMMON-LABEL: test_mm512_mask_cvtepi64_ps
78 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x float>
79 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
80 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
81 // CHECK-ASM: vcvtqq2ps
82 return _mm512_mask_cvtepi64_ps(__W, __U, __A);
83 }
84
test_mm512_maskz_cvtepi64_ps(__mmask8 __U,__m512i __A)85 __m256 test_mm512_maskz_cvtepi64_ps(__mmask8 __U, __m512i __A) {
86 // COMMON-LABEL: test_mm512_maskz_cvtepi64_ps
87 // UNCONSTRAINED: sitofp <8 x i64> %{{.*}} to <8 x float>
88 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
89 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
90 // CHECK-ASM: vcvtqq2ps
91 return _mm512_maskz_cvtepi64_ps(__U, __A);
92 }
93
test_mm512_cvt_roundepi64_ps(__m512i __A)94 __m256 test_mm512_cvt_roundepi64_ps(__m512i __A) {
95 // COMMON-LABEL: test_mm512_cvt_roundepi64_ps
96 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f32.v8i64
97 // CHECK-ASM: vcvtqq2ps
98 return _mm512_cvt_roundepi64_ps(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
99 }
100
test_mm512_mask_cvt_roundepi64_ps(__m256 __W,__mmask8 __U,__m512i __A)101 __m256 test_mm512_mask_cvt_roundepi64_ps(__m256 __W, __mmask8 __U, __m512i __A) {
102 // COMMON-LABEL: test_mm512_mask_cvt_roundepi64_ps
103 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f32.v8i64
104 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
105 // CHECK-ASM: vcvtqq2ps
106 return _mm512_mask_cvt_roundepi64_ps(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
107 }
108
test_mm512_maskz_cvt_roundepi64_ps(__mmask8 __U,__m512i __A)109 __m256 test_mm512_maskz_cvt_roundepi64_ps(__mmask8 __U, __m512i __A) {
110 // COMMON-LABEL: test_mm512_maskz_cvt_roundepi64_ps
111 // COMMONIR: @llvm.x86.avx512.sitofp.round.v8f32.v8i64
112 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
113 // CHECK-ASM: vcvtqq2ps
114 return _mm512_maskz_cvt_roundepi64_ps(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
115 }
116
test_mm512_cvtepu64_pd(__m512i __A)117 __m512d test_mm512_cvtepu64_pd(__m512i __A) {
118 // COMMON-LABEL: test_mm512_cvtepu64_pd
119 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x double>
120 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.uitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
121 // CHECK-ASM: vcvtuqq2pd
122 return _mm512_cvtepu64_pd(__A);
123 }
124
test_mm512_mask_cvtepu64_pd(__m512d __W,__mmask8 __U,__m512i __A)125 __m512d test_mm512_mask_cvtepu64_pd(__m512d __W, __mmask8 __U, __m512i __A) {
126 // COMMON-LABEL: test_mm512_mask_cvtepu64_pd
127 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x double>
128 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.uitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
129 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
130 // CHECK-ASM: vcvtuqq2pd
131 return _mm512_mask_cvtepu64_pd(__W, __U, __A);
132 }
133
test_mm512_maskz_cvtepu64_pd(__mmask8 __U,__m512i __A)134 __m512d test_mm512_maskz_cvtepu64_pd(__mmask8 __U, __m512i __A) {
135 // COMMON-LABEL: test_mm512_maskz_cvtepu64_pd
136 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x double>
137 // CONSTRAINED: call <8 x double> @llvm.experimental.constrained.uitofp.v8f64.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
138 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
139 // CHECK-ASM: vcvtuqq2pd
140 return _mm512_maskz_cvtepu64_pd(__U, __A);
141 }
142
test_mm512_cvt_roundepu64_pd(__m512i __A)143 __m512d test_mm512_cvt_roundepu64_pd(__m512i __A) {
144 // COMMON-LABEL: test_mm512_cvt_roundepu64_pd
145 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f64.v8i64
146 // CHECK-ASM: vcvtuqq2pd
147 return _mm512_cvt_roundepu64_pd(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
148 }
149
test_mm512_mask_cvt_roundepu64_pd(__m512d __W,__mmask8 __U,__m512i __A)150 __m512d test_mm512_mask_cvt_roundepu64_pd(__m512d __W, __mmask8 __U, __m512i __A) {
151 // COMMON-LABEL: test_mm512_mask_cvt_roundepu64_pd
152 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f64.v8i64
153 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
154 // CHECK-ASM: vcvtuqq2pd
155 return _mm512_mask_cvt_roundepu64_pd(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
156 }
157
test_mm512_maskz_cvt_roundepu64_pd(__mmask8 __U,__m512i __A)158 __m512d test_mm512_maskz_cvt_roundepu64_pd(__mmask8 __U, __m512i __A) {
159 // COMMON-LABEL: test_mm512_maskz_cvt_roundepu64_pd
160 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f64.v8i64
161 // COMMONIR: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
162 // CHECK-ASM: vcvtuqq2pd
163 return _mm512_maskz_cvt_roundepu64_pd(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
164 }
165
test_mm512_cvtepu64_ps(__m512i __A)166 __m256 test_mm512_cvtepu64_ps(__m512i __A) {
167 // COMMON-LABEL: test_mm512_cvtepu64_ps
168 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x float>
169 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
170 // CHECK-ASM: vcvtuqq2ps
171 return _mm512_cvtepu64_ps(__A);
172 }
173
test_mm512_mask_cvtepu64_ps(__m256 __W,__mmask8 __U,__m512i __A)174 __m256 test_mm512_mask_cvtepu64_ps(__m256 __W, __mmask8 __U, __m512i __A) {
175 // COMMON-LABEL: test_mm512_mask_cvtepu64_ps
176 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x float>
177 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
178 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
179 // CHECK-ASM: vcvtuqq2ps
180 return _mm512_mask_cvtepu64_ps(__W, __U, __A);
181 }
182
test_mm512_maskz_cvtepu64_ps(__mmask8 __U,__m512i __A)183 __m256 test_mm512_maskz_cvtepu64_ps(__mmask8 __U, __m512i __A) {
184 // COMMON-LABEL: test_mm512_maskz_cvtepu64_ps
185 // UNCONSTRAINED: uitofp <8 x i64> %{{.*}} to <8 x float>
186 // CONSTRAINED: call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i64(<8 x i64> %{{.*}}, metadata !"round.tonearest", metadata !"fpexcept.strict")
187 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
188 // CHECK-ASM: vcvtuqq2ps
189 return _mm512_maskz_cvtepu64_ps(__U, __A);
190 }
191
test_mm512_cvt_roundepu64_ps(__m512i __A)192 __m256 test_mm512_cvt_roundepu64_ps(__m512i __A) {
193 // COMMON-LABEL: test_mm512_cvt_roundepu64_ps
194 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f32.v8i64
195 // CHECK-ASM: vcvtuqq2ps
196 return _mm512_cvt_roundepu64_ps(__A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
197 }
198
test_mm512_mask_cvt_roundepu64_ps(__m256 __W,__mmask8 __U,__m512i __A)199 __m256 test_mm512_mask_cvt_roundepu64_ps(__m256 __W, __mmask8 __U, __m512i __A) {
200 // COMMON-LABEL: test_mm512_mask_cvt_roundepu64_ps
201 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f32.v8i64
202 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
203 // CHECK-ASM: vcvtuqq2ps
204 return _mm512_mask_cvt_roundepu64_ps(__W, __U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
205 }
206
test_mm512_maskz_cvt_roundepu64_ps(__mmask8 __U,__m512i __A)207 __m256 test_mm512_maskz_cvt_roundepu64_ps(__mmask8 __U, __m512i __A) {
208 // COMMON-LABEL: test_mm512_maskz_cvt_roundepu64_ps
209 // COMMONIR: @llvm.x86.avx512.uitofp.round.v8f32.v8i64
210 // COMMONIR: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
211 // CHECK-ASM: vcvtuqq2ps
212 return _mm512_maskz_cvt_roundepu64_ps(__U, __A, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
213 }
214
215