1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64V %s
4 // RUN: %clang_cc1 -triple riscv64 -target-feature +zve64x -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-RV64V %s
5 // RUN: not %clang_cc1 -triple riscv64 -emit-llvm-only %s 2>&1 | FileCheck %s --check-prefix=CHECK-RV64-ERR
6
7 // CHECK-RV64V-LABEL: @test(
8 // CHECK-RV64V-NEXT: entry:
9 // CHECK-RV64V-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 1, i64 0, i64 0)
10 // CHECK-RV64V-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
11 // CHECK-RV64V-NEXT: ret i32 [[CONV]]
12 //
13
14 // CHECK-RV64-ERR: error: '__builtin_rvv_vsetvli' needs target feature zve32x
15
test()16 int test() {
17 return __builtin_rvv_vsetvli(1, 0, 0);
18 }
19