xref: /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfredmax.c (revision 3055c5815ac08aa0d8597bff63569b9ed8ec0822)
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
4 // RUN:   -target-feature +zvfh -disable-O0-optnone  \
5 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
6 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
7 
8 #include <riscv_vector.h>
9 
10 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16mf4_f16m1_tu
11 // CHECK-RV64-SAME: (<vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 1 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
12 // CHECK-RV64-NEXT:  entry:
13 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.nxv4f16.nxv1f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 1 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], i64 [[VL]])
14 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
15 //
test_vfredmax_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff,vfloat16mf4_t vector,vfloat16m1_t scalar,size_t vl)16 vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) {
17   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
18 }
19 
20 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16mf2_f16m1_tu
21 // CHECK-RV64-SAME: (<vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 2 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
22 // CHECK-RV64-NEXT:  entry:
23 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.nxv4f16.nxv2f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 2 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], i64 [[VL]])
24 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
25 //
test_vfredmax_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff,vfloat16mf2_t vector,vfloat16m1_t scalar,size_t vl)26 vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) {
27   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
28 }
29 
30 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m1_f16m1_tu
31 // CHECK-RV64-SAME: (<vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 4 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
32 // CHECK-RV64-NEXT:  entry:
33 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.nxv4f16.nxv4f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 4 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], i64 [[VL]])
34 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
35 //
test_vfredmax_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff,vfloat16m1_t vector,vfloat16m1_t scalar,size_t vl)36 vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) {
37   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
38 }
39 
40 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m2_f16m1_tu
41 // CHECK-RV64-SAME: (<vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 8 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
42 // CHECK-RV64-NEXT:  entry:
43 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.nxv4f16.nxv8f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 8 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], i64 [[VL]])
44 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
45 //
test_vfredmax_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff,vfloat16m2_t vector,vfloat16m1_t scalar,size_t vl)46 vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) {
47   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
48 }
49 
50 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m4_f16m1_tu
51 // CHECK-RV64-SAME: (<vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 16 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
52 // CHECK-RV64-NEXT:  entry:
53 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.nxv4f16.nxv16f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 16 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], i64 [[VL]])
54 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
55 //
test_vfredmax_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff,vfloat16m4_t vector,vfloat16m1_t scalar,size_t vl)56 vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) {
57   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
58 }
59 
60 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m8_f16m1_tu
61 // CHECK-RV64-SAME: (<vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 32 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
62 // CHECK-RV64-NEXT:  entry:
63 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.nxv4f16.nxv32f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 32 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], i64 [[VL]])
64 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
65 //
test_vfredmax_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff,vfloat16m8_t vector,vfloat16m1_t scalar,size_t vl)66 vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) {
67   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
68 }
69 
70 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32mf2_f32m1_tu
71 // CHECK-RV64-SAME: (<vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 1 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
72 // CHECK-RV64-NEXT:  entry:
73 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.nxv2f32.nxv1f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 1 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], i64 [[VL]])
74 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
75 //
test_vfredmax_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff,vfloat32mf2_t vector,vfloat32m1_t scalar,size_t vl)76 vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) {
77   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
78 }
79 
80 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m1_f32m1_tu
81 // CHECK-RV64-SAME: (<vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 2 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
82 // CHECK-RV64-NEXT:  entry:
83 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 2 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], i64 [[VL]])
84 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
85 //
test_vfredmax_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff,vfloat32m1_t vector,vfloat32m1_t scalar,size_t vl)86 vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) {
87   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
88 }
89 
90 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m2_f32m1_tu
91 // CHECK-RV64-SAME: (<vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 4 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
92 // CHECK-RV64-NEXT:  entry:
93 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.nxv2f32.nxv4f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 4 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], i64 [[VL]])
94 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
95 //
test_vfredmax_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff,vfloat32m2_t vector,vfloat32m1_t scalar,size_t vl)96 vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) {
97   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
98 }
99 
100 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m4_f32m1_tu
101 // CHECK-RV64-SAME: (<vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 8 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
102 // CHECK-RV64-NEXT:  entry:
103 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.nxv2f32.nxv8f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 8 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], i64 [[VL]])
104 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
105 //
test_vfredmax_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff,vfloat32m4_t vector,vfloat32m1_t scalar,size_t vl)106 vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) {
107   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
108 }
109 
110 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m8_f32m1_tu
111 // CHECK-RV64-SAME: (<vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 16 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
112 // CHECK-RV64-NEXT:  entry:
113 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.nxv2f32.nxv16f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 16 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], i64 [[VL]])
114 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
115 //
test_vfredmax_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff,vfloat32m8_t vector,vfloat32m1_t scalar,size_t vl)116 vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) {
117   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
118 }
119 
120 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m1_f64m1_tu
121 // CHECK-RV64-SAME: (<vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 1 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
122 // CHECK-RV64-NEXT:  entry:
123 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 1 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], i64 [[VL]])
124 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
125 //
test_vfredmax_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff,vfloat64m1_t vector,vfloat64m1_t scalar,size_t vl)126 vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) {
127   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
128 }
129 
130 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m2_f64m1_tu
131 // CHECK-RV64-SAME: (<vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 2 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
132 // CHECK-RV64-NEXT:  entry:
133 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.nxv1f64.nxv2f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 2 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], i64 [[VL]])
134 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
135 //
test_vfredmax_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff,vfloat64m2_t vector,vfloat64m1_t scalar,size_t vl)136 vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) {
137   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
138 }
139 
140 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m4_f64m1_tu
141 // CHECK-RV64-SAME: (<vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 4 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
142 // CHECK-RV64-NEXT:  entry:
143 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.nxv1f64.nxv4f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 4 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], i64 [[VL]])
144 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
145 //
test_vfredmax_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff,vfloat64m4_t vector,vfloat64m1_t scalar,size_t vl)146 vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) {
147   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
148 }
149 
150 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m8_f64m1_tu
151 // CHECK-RV64-SAME: (<vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 8 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
152 // CHECK-RV64-NEXT:  entry:
153 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.nxv1f64.nxv8f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 8 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], i64 [[VL]])
154 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
155 //
test_vfredmax_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff,vfloat64m8_t vector,vfloat64m1_t scalar,size_t vl)156 vfloat64m1_t test_vfredmax_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) {
157   return __riscv_vfredmax_tu(maskedoff, vector, scalar, vl);
158 }
159 
160 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16mf4_f16m1_tum
161 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 1 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
162 // CHECK-RV64-NEXT:  entry:
163 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.mask.nxv4f16.nxv1f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 1 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])
164 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
165 //
test_vfredmax_vs_f16mf4_f16m1_tum(vbool64_t mask,vfloat16m1_t maskedoff,vfloat16mf4_t vector,vfloat16m1_t scalar,size_t vl)166 vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) {
167   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
168 }
169 
170 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16mf2_f16m1_tum
171 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 2 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
172 // CHECK-RV64-NEXT:  entry:
173 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.mask.nxv4f16.nxv2f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 2 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])
174 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
175 //
test_vfredmax_vs_f16mf2_f16m1_tum(vbool32_t mask,vfloat16m1_t maskedoff,vfloat16mf2_t vector,vfloat16m1_t scalar,size_t vl)176 vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) {
177   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
178 }
179 
180 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m1_f16m1_tum
181 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 4 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
182 // CHECK-RV64-NEXT:  entry:
183 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.mask.nxv4f16.nxv4f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 4 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])
184 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
185 //
test_vfredmax_vs_f16m1_f16m1_tum(vbool16_t mask,vfloat16m1_t maskedoff,vfloat16m1_t vector,vfloat16m1_t scalar,size_t vl)186 vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) {
187   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
188 }
189 
190 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m2_f16m1_tum
191 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 8 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
192 // CHECK-RV64-NEXT:  entry:
193 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.mask.nxv4f16.nxv8f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 8 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])
194 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
195 //
test_vfredmax_vs_f16m2_f16m1_tum(vbool8_t mask,vfloat16m1_t maskedoff,vfloat16m2_t vector,vfloat16m1_t scalar,size_t vl)196 vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) {
197   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
198 }
199 
200 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m4_f16m1_tum
201 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 16 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
202 // CHECK-RV64-NEXT:  entry:
203 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.mask.nxv4f16.nxv16f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 16 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])
204 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
205 //
test_vfredmax_vs_f16m4_f16m1_tum(vbool4_t mask,vfloat16m1_t maskedoff,vfloat16m4_t vector,vfloat16m1_t scalar,size_t vl)206 vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) {
207   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
208 }
209 
210 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vfredmax_vs_f16m8_f16m1_tum
211 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 4 x half> [[MASKEDOFF:%.*]], <vscale x 32 x half> [[VECTOR:%.*]], <vscale x 4 x half> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
212 // CHECK-RV64-NEXT:  entry:
213 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vfredmax.mask.nxv4f16.nxv32f16.i64(<vscale x 4 x half> [[MASKEDOFF]], <vscale x 32 x half> [[VECTOR]], <vscale x 4 x half> [[SCALAR]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])
214 // CHECK-RV64-NEXT:    ret <vscale x 4 x half> [[TMP0]]
215 //
test_vfredmax_vs_f16m8_f16m1_tum(vbool2_t mask,vfloat16m1_t maskedoff,vfloat16m8_t vector,vfloat16m1_t scalar,size_t vl)216 vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) {
217   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
218 }
219 
220 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32mf2_f32m1_tum
221 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 1 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
222 // CHECK-RV64-NEXT:  entry:
223 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.mask.nxv2f32.nxv1f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 1 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])
224 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
225 //
test_vfredmax_vs_f32mf2_f32m1_tum(vbool64_t mask,vfloat32m1_t maskedoff,vfloat32mf2_t vector,vfloat32m1_t scalar,size_t vl)226 vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) {
227   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
228 }
229 
230 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m1_f32m1_tum
231 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 2 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
232 // CHECK-RV64-NEXT:  entry:
233 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.mask.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 2 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])
234 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
235 //
test_vfredmax_vs_f32m1_f32m1_tum(vbool32_t mask,vfloat32m1_t maskedoff,vfloat32m1_t vector,vfloat32m1_t scalar,size_t vl)236 vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) {
237   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
238 }
239 
240 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m2_f32m1_tum
241 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 4 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
242 // CHECK-RV64-NEXT:  entry:
243 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.mask.nxv2f32.nxv4f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 4 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])
244 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
245 //
test_vfredmax_vs_f32m2_f32m1_tum(vbool16_t mask,vfloat32m1_t maskedoff,vfloat32m2_t vector,vfloat32m1_t scalar,size_t vl)246 vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) {
247   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
248 }
249 
250 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m4_f32m1_tum
251 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 8 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
252 // CHECK-RV64-NEXT:  entry:
253 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.mask.nxv2f32.nxv8f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 8 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])
254 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
255 //
test_vfredmax_vs_f32m4_f32m1_tum(vbool8_t mask,vfloat32m1_t maskedoff,vfloat32m4_t vector,vfloat32m1_t scalar,size_t vl)256 vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) {
257   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
258 }
259 
260 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vfredmax_vs_f32m8_f32m1_tum
261 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 2 x float> [[MASKEDOFF:%.*]], <vscale x 16 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
262 // CHECK-RV64-NEXT:  entry:
263 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredmax.mask.nxv2f32.nxv16f32.i64(<vscale x 2 x float> [[MASKEDOFF]], <vscale x 16 x float> [[VECTOR]], <vscale x 2 x float> [[SCALAR]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])
264 // CHECK-RV64-NEXT:    ret <vscale x 2 x float> [[TMP0]]
265 //
test_vfredmax_vs_f32m8_f32m1_tum(vbool4_t mask,vfloat32m1_t maskedoff,vfloat32m8_t vector,vfloat32m1_t scalar,size_t vl)266 vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) {
267   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
268 }
269 
270 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m1_f64m1_tum
271 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 1 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
272 // CHECK-RV64-NEXT:  entry:
273 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.mask.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 1 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])
274 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
275 //
test_vfredmax_vs_f64m1_f64m1_tum(vbool64_t mask,vfloat64m1_t maskedoff,vfloat64m1_t vector,vfloat64m1_t scalar,size_t vl)276 vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) {
277   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
278 }
279 
280 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m2_f64m1_tum
281 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 2 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
282 // CHECK-RV64-NEXT:  entry:
283 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.mask.nxv1f64.nxv2f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 2 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])
284 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
285 //
test_vfredmax_vs_f64m2_f64m1_tum(vbool32_t mask,vfloat64m1_t maskedoff,vfloat64m2_t vector,vfloat64m1_t scalar,size_t vl)286 vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) {
287   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
288 }
289 
290 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m4_f64m1_tum
291 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 4 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
292 // CHECK-RV64-NEXT:  entry:
293 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.mask.nxv1f64.nxv4f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 4 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])
294 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
295 //
test_vfredmax_vs_f64m4_f64m1_tum(vbool16_t mask,vfloat64m1_t maskedoff,vfloat64m4_t vector,vfloat64m1_t scalar,size_t vl)296 vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) {
297   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
298 }
299 
300 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vfredmax_vs_f64m8_f64m1_tum
301 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 1 x double> [[MASKEDOFF:%.*]], <vscale x 8 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
302 // CHECK-RV64-NEXT:  entry:
303 // CHECK-RV64-NEXT:    [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredmax.mask.nxv1f64.nxv8f64.i64(<vscale x 1 x double> [[MASKEDOFF]], <vscale x 8 x double> [[VECTOR]], <vscale x 1 x double> [[SCALAR]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])
304 // CHECK-RV64-NEXT:    ret <vscale x 1 x double> [[TMP0]]
305 //
test_vfredmax_vs_f64m8_f64m1_tum(vbool8_t mask,vfloat64m1_t maskedoff,vfloat64m8_t vector,vfloat64m1_t scalar,size_t vl)306 vfloat64m1_t test_vfredmax_vs_f64m8_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) {
307   return __riscv_vfredmax_tum(mask, maskedoff, vector, scalar, vl);
308 }
309 
310