1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
4 // RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
5 // RUN: FileCheck --check-prefix=CHECK-RV64 %s
6
7 #include <riscv_vector.h>
8
9 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf8
10 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0:[0-9]+]] {
11 // CHECK-RV64-NEXT: entry:
12 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 5)
13 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
14 //
test_vsetvl_e8mf8(size_t avl)15 size_t test_vsetvl_e8mf8(size_t avl) {
16 return __riscv_vsetvl_e8mf8(avl);
17 }
18
19 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf4
20 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
21 // CHECK-RV64-NEXT: entry:
22 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 6)
23 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
24 //
test_vsetvl_e8mf4(size_t avl)25 size_t test_vsetvl_e8mf4(size_t avl) {
26 return __riscv_vsetvl_e8mf4(avl);
27 }
28
29 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8mf2
30 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
31 // CHECK-RV64-NEXT: entry:
32 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 7)
33 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
34 //
test_vsetvl_e8mf2(size_t avl)35 size_t test_vsetvl_e8mf2(size_t avl) {
36 return __riscv_vsetvl_e8mf2(avl);
37 }
38
39 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m1
40 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
41 // CHECK-RV64-NEXT: entry:
42 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 0)
43 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
44 //
test_vsetvl_e8m1(size_t avl)45 size_t test_vsetvl_e8m1(size_t avl) {
46 return __riscv_vsetvl_e8m1(avl);
47 }
48
49 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m2
50 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
51 // CHECK-RV64-NEXT: entry:
52 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 1)
53 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
54 //
test_vsetvl_e8m2(size_t avl)55 size_t test_vsetvl_e8m2(size_t avl) {
56 return __riscv_vsetvl_e8m2(avl);
57 }
58
59 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m4
60 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
61 // CHECK-RV64-NEXT: entry:
62 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 2)
63 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
64 //
test_vsetvl_e8m4(size_t avl)65 size_t test_vsetvl_e8m4(size_t avl) {
66 return __riscv_vsetvl_e8m4(avl);
67 }
68
69 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e8m8
70 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
71 // CHECK-RV64-NEXT: entry:
72 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 0, i64 3)
73 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
74 //
test_vsetvl_e8m8(size_t avl)75 size_t test_vsetvl_e8m8(size_t avl) {
76 return __riscv_vsetvl_e8m8(avl);
77 }
78
79 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16mf4
80 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
81 // CHECK-RV64-NEXT: entry:
82 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 6)
83 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
84 //
test_vsetvl_e16mf4(size_t avl)85 size_t test_vsetvl_e16mf4(size_t avl) {
86 return __riscv_vsetvl_e16mf4(avl);
87 }
88
89 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16mf2
90 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
91 // CHECK-RV64-NEXT: entry:
92 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 7)
93 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
94 //
test_vsetvl_e16mf2(size_t avl)95 size_t test_vsetvl_e16mf2(size_t avl) {
96 return __riscv_vsetvl_e16mf2(avl);
97 }
98
99 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m1
100 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
101 // CHECK-RV64-NEXT: entry:
102 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 0)
103 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
104 //
test_vsetvl_e16m1(size_t avl)105 size_t test_vsetvl_e16m1(size_t avl) {
106 return __riscv_vsetvl_e16m1(avl);
107 }
108
109 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m2
110 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
111 // CHECK-RV64-NEXT: entry:
112 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 1)
113 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
114 //
test_vsetvl_e16m2(size_t avl)115 size_t test_vsetvl_e16m2(size_t avl) {
116 return __riscv_vsetvl_e16m2(avl);
117 }
118
119 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m4
120 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
121 // CHECK-RV64-NEXT: entry:
122 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 2)
123 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
124 //
test_vsetvl_e16m4(size_t avl)125 size_t test_vsetvl_e16m4(size_t avl) {
126 return __riscv_vsetvl_e16m4(avl);
127 }
128
129 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e16m8
130 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
131 // CHECK-RV64-NEXT: entry:
132 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 1, i64 3)
133 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
134 //
test_vsetvl_e16m8(size_t avl)135 size_t test_vsetvl_e16m8(size_t avl) {
136 return __riscv_vsetvl_e16m8(avl);
137 }
138
139 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32mf2
140 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
141 // CHECK-RV64-NEXT: entry:
142 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 7)
143 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
144 //
test_vsetvl_e32mf2(size_t avl)145 size_t test_vsetvl_e32mf2(size_t avl) {
146 return __riscv_vsetvl_e32mf2(avl);
147 }
148
149 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m1
150 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
151 // CHECK-RV64-NEXT: entry:
152 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 0)
153 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
154 //
test_vsetvl_e32m1(size_t avl)155 size_t test_vsetvl_e32m1(size_t avl) {
156 return __riscv_vsetvl_e32m1(avl);
157 }
158
159 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m2
160 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
161 // CHECK-RV64-NEXT: entry:
162 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 1)
163 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
164 //
test_vsetvl_e32m2(size_t avl)165 size_t test_vsetvl_e32m2(size_t avl) {
166 return __riscv_vsetvl_e32m2(avl);
167 }
168
169 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m4
170 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
171 // CHECK-RV64-NEXT: entry:
172 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 2)
173 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
174 //
test_vsetvl_e32m4(size_t avl)175 size_t test_vsetvl_e32m4(size_t avl) {
176 return __riscv_vsetvl_e32m4(avl);
177 }
178
179 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e32m8
180 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
181 // CHECK-RV64-NEXT: entry:
182 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 2, i64 3)
183 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
184 //
test_vsetvl_e32m8(size_t avl)185 size_t test_vsetvl_e32m8(size_t avl) {
186 return __riscv_vsetvl_e32m8(avl);
187 }
188
189 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m1
190 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
191 // CHECK-RV64-NEXT: entry:
192 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 0)
193 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
194 //
test_vsetvl_e64m1(size_t avl)195 size_t test_vsetvl_e64m1(size_t avl) {
196 return __riscv_vsetvl_e64m1(avl);
197 }
198
199 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m2
200 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
201 // CHECK-RV64-NEXT: entry:
202 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 1)
203 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
204 //
test_vsetvl_e64m2(size_t avl)205 size_t test_vsetvl_e64m2(size_t avl) {
206 return __riscv_vsetvl_e64m2(avl);
207 }
208
209 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m4
210 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
211 // CHECK-RV64-NEXT: entry:
212 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 2)
213 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
214 //
test_vsetvl_e64m4(size_t avl)215 size_t test_vsetvl_e64m4(size_t avl) {
216 return __riscv_vsetvl_e64m4(avl);
217 }
218
219 // CHECK-RV64-LABEL: define dso_local i64 @test_vsetvl_e64m8
220 // CHECK-RV64-SAME: (i64 noundef [[AVL:%.*]]) #[[ATTR0]] {
221 // CHECK-RV64-NEXT: entry:
222 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.i64(i64 [[AVL]], i64 3, i64 3)
223 // CHECK-RV64-NEXT: ret i64 [[TMP0]]
224 //
test_vsetvl_e64m8(size_t avl)225 size_t test_vsetvl_e64m8(size_t avl) {
226 return __riscv_vsetvl_e64m8(avl);
227 }
228
229