1 // REQUIRES: powerpc-registered-target
2 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
3 // RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
4 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
5 // RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
6 // RUN: %clang_cc1 -triple powerpc-unknown-aix \
7 // RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefixes=CHECK-32B
8 // RUN: %clang_cc1 -triple powerpc64-unknown-aix \
9 // RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
10
11 extern unsigned short us;
12 extern unsigned int ui;
13 extern unsigned short *us_addr;
14 extern unsigned int *ui_addr;
15
16 // CHECK-LABEL: @test_builtin_ppc_store2r(
17 // CHECK: [[TMP0:%.*]] = load i16, ptr @us, align 2
18 // CHECK-NEXT: [[CONV:%.*]] = zext i16 [[TMP0]] to i32
19 // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @us_addr, align 8
20 // CHECK-NEXT: call void @llvm.ppc.store2r(i32 [[CONV]], ptr [[TMP1]])
21 // CHECK-NEXT: ret void
22 //
23 // CHECK-32B-LABEL: @test_builtin_ppc_store2r(
24 // CHECK-32B: [[TMP0:%.*]] = load i16, ptr @us, align 2
25 // CHECK-32B-NEXT: [[CONV:%.*]] = zext i16 [[TMP0]] to i32
26 // CHECK-32B-NEXT: [[TMP1:%.*]] = load ptr, ptr @us_addr, align 4
27 // CHECK-32B-NEXT: call void @llvm.ppc.store2r(i32 [[CONV]], ptr [[TMP1]])
28 // CHECK-32B-NEXT: ret void
29 //
test_builtin_ppc_store2r()30 void test_builtin_ppc_store2r() {
31 __builtin_ppc_store2r(us, us_addr);
32 }
33
34 // CHECK-LABEL: @test_builtin_ppc_store4r(
35 // CHECK: [[TMP0:%.*]] = load i32, ptr @ui, align 4
36 // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @ui_addr, align 8
37 // CHECK-NEXT: call void @llvm.ppc.store4r(i32 [[TMP0]], ptr [[TMP1]])
38 // CHECK-NEXT: ret void
39 //
40 // CHECK-32B-LABEL: @test_builtin_ppc_store4r(
41 // CHECK-32B: [[TMP0:%.*]] = load i32, ptr @ui, align 4
42 // CHECK-32B-NEXT: [[TMP1:%.*]] = load ptr, ptr @ui_addr, align 4
43 // CHECK-32B-NEXT: call void @llvm.ppc.store4r(i32 [[TMP0]], ptr [[TMP1]])
44 // CHECK-32B-NEXT: ret void
45 //
test_builtin_ppc_store4r()46 void test_builtin_ppc_store4r() {
47 __builtin_ppc_store4r(ui, ui_addr);
48 }
49
50 // CHECK-LABEL: @test_builtin_ppc_load2r(
51 // CHECK: [[TMP0:%.*]] = load ptr, ptr @us_addr, align 8
52 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load2r(ptr [[TMP0]])
53 // CHECK-NEXT: [[CONV:%.*]] = trunc i32 [[TMP2]] to i16
54 // CHECK-NEXT: ret i16 [[CONV]]
55 //
56 // CHECK-32B-LABEL: @test_builtin_ppc_load2r(
57 // CHECK-32B: [[TMP0:%.*]] = load ptr, ptr @us_addr, align 4
58 // CHECK-32B-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load2r(ptr [[TMP0]])
59 // CHECK-32B-NEXT: [[CONV:%.*]] = trunc i32 [[TMP2]] to i16
60 // CHECK-32B-NEXT: ret i16 [[CONV]]
61 //
test_builtin_ppc_load2r()62 unsigned short test_builtin_ppc_load2r() {
63 return __builtin_ppc_load2r(us_addr);
64 }
65
66 // CHECK-LABEL: @test_builtin_ppc_load4r(
67 // CHECK: [[TMP0:%.*]] = load ptr, ptr @ui_addr, align 8
68 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load4r(ptr [[TMP0]])
69 // CHECK-NEXT: ret i32 [[TMP2]]
70 //
71 // CHECK-32B-LABEL: @test_builtin_ppc_load4r(
72 // CHECK-32B: [[TMP0:%.*]] = load ptr, ptr @ui_addr, align 4
73 // CHECK-32B-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.load4r(ptr [[TMP0]])
74 // CHECK-32B-NEXT: ret i32 [[TMP2]]
75 //
test_builtin_ppc_load4r()76 unsigned int test_builtin_ppc_load4r() {
77 return __builtin_ppc_load4r(ui_addr);
78 }
79