xref: /llvm-project/clang/test/CodeGen/LoongArch/atomics.c (revision 5fdd094837c6d8437803ebf3ccc91c3d494a2ac8)
1 // RUN: %clang_cc1 -triple loongarch32 -O1 -emit-llvm %s -o - \
2 // RUN:   | FileCheck %s --check-prefix=LA32
3 // RUN: %clang_cc1 -triple loongarch64 -O1 -emit-llvm %s -o - \
4 // RUN:   | FileCheck %s --check-prefix=LA64
5 
6 /// This test demonstrates that MaxAtomicInlineWidth is set appropriately.
7 
8 #include <stdatomic.h>
9 #include <stdint.h>
10 
test_i8_atomics(_Atomic (int8_t)* a,int8_t b)11 void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) {
12   // LA32: load atomic i8, ptr %a seq_cst, align 1
13   // LA32: store atomic i8 %b, ptr %a seq_cst, align 1
14   // LA32: atomicrmw add ptr %a, i8 %b seq_cst, align 1
15   // LA64: load atomic i8, ptr %a seq_cst, align 1
16   // LA64: store atomic i8 %b, ptr %a seq_cst, align 1
17   // LA64: atomicrmw add ptr %a, i8 %b seq_cst, align 1
18   __c11_atomic_load(a, memory_order_seq_cst);
19   __c11_atomic_store(a, b, memory_order_seq_cst);
20   __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
21 }
22 
test_i32_atomics(_Atomic (int32_t)* a,int32_t b)23 void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) {
24   // LA32: load atomic i32, ptr %a seq_cst, align 4
25   // LA32: store atomic i32 %b, ptr %a seq_cst, align 4
26   // LA32: atomicrmw add ptr %a, i32 %b seq_cst, align 4
27   // LA64: load atomic i32, ptr %a seq_cst, align 4
28   // LA64: store atomic i32 %b, ptr %a seq_cst, align 4
29   // LA64: atomicrmw add ptr %a, i32 %b seq_cst, align 4
30   __c11_atomic_load(a, memory_order_seq_cst);
31   __c11_atomic_store(a, b, memory_order_seq_cst);
32   __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
33 }
34 
test_i64_atomics(_Atomic (int64_t)* a,int64_t b)35 void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) {
36   // LA32: load atomic i64, ptr %a seq_cst, align 8
37   // LA32: store atomic i64 %b, ptr %a seq_cst, align 8
38   // LA32: atomicrmw add ptr %a, i64 %b seq_cst, align 8
39   // LA64: load atomic i64, ptr %a seq_cst, align 8
40   // LA64: store atomic i64 %b, ptr %a seq_cst, align 8
41   // LA64: atomicrmw add ptr %a, i64 %b seq_cst, align 8
42   __c11_atomic_load(a, memory_order_seq_cst);
43   __c11_atomic_store(a, b, memory_order_seq_cst);
44   __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
45 }
46