xref: /llvm-project/bolt/test/AArch64/got-ld64-relaxation.test (revision ab14eb23b6b4939cefa01f8cb16d7540f9686144)
1// This test checks that ADR+LDR instruction sequence relaxed by the linker
2// to the ADR+ADD sequence is properly recognized and handled by bolt
3
4// RUN: yaml2obj %p/Inputs/got-ld64-relaxation.yaml &> %t.exe
5// RUN: llvm-bolt %t.exe -o %t.null --print-fix-relaxations \
6// RUN:   --print-only=main | FileCheck %s
7
8// CHECK: adrp x0, foo
9// CHECK-NEXT: add x0, x0, :lo12:foo
10