1;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2; Copyright(c) 2011-2020 Intel Corporation All rights reserved. 3; 4; Redistribution and use in source and binary forms, with or without 5; modification, are permitted provided that the following conditions 6; are met: 7; * Redistributions of source code must retain the above copyright 8; notice, this list of conditions and the following disclaimer. 9; * Redistributions in binary form must reproduce the above copyright 10; notice, this list of conditions and the following disclaimer in 11; the documentation and/or other materials provided with the 12; distribution. 13; * Neither the name of Intel Corporation nor the names of its 14; contributors may be used to endorse or promote products derived 15; from this software without specific prior written permission. 16; 17; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 30%include "reg_sizes.asm" 31%include "multibinary.asm" 32default rel 33[bits 64] 34 35extern _sm3_ctx_mgr_init_base 36extern _sm3_ctx_mgr_submit_base 37extern _sm3_ctx_mgr_flush_base 38 39extern _sm3_ctx_mgr_init_avx2 40extern _sm3_ctx_mgr_submit_avx2 41extern _sm3_ctx_mgr_flush_avx2 42 43%ifdef HAVE_AS_KNOWS_AVX512 44 extern _sm3_ctx_mgr_init_avx512 45 extern _sm3_ctx_mgr_submit_avx512 46 extern _sm3_ctx_mgr_flush_avx512 47%endif 48 49;;; *_mbinit are initial values for *_dispatched; is updated on first call. 50;;; Therefore, *_dispatch_init is only executed on first call. 51 52; Initialise symbols 53mbin_interface _sm3_ctx_mgr_init 54mbin_interface _sm3_ctx_mgr_submit 55mbin_interface _sm3_ctx_mgr_flush 56 57;; have not implement see/avx yet 58%ifdef HAVE_AS_KNOWS_AVX512 59 mbin_dispatch_init6 _sm3_ctx_mgr_init, _sm3_ctx_mgr_init_base, \ 60 _sm3_ctx_mgr_init_base, _sm3_ctx_mgr_init_base, _sm3_ctx_mgr_init_avx2, \ 61 _sm3_ctx_mgr_init_avx512 62 mbin_dispatch_init6 _sm3_ctx_mgr_submit, _sm3_ctx_mgr_submit_base, \ 63 _sm3_ctx_mgr_submit_base, _sm3_ctx_mgr_submit_base, _sm3_ctx_mgr_submit_avx2, \ 64 _sm3_ctx_mgr_submit_avx512 65 mbin_dispatch_init6 _sm3_ctx_mgr_flush, _sm3_ctx_mgr_flush_base, \ 66 _sm3_ctx_mgr_flush_base, _sm3_ctx_mgr_flush_base, _sm3_ctx_mgr_flush_avx2, \ 67 _sm3_ctx_mgr_flush_avx512 68%else 69 mbin_dispatch_init _sm3_ctx_mgr_init, _sm3_ctx_mgr_init_base, \ 70 _sm3_ctx_mgr_init_base, _sm3_ctx_mgr_init_avx2 71 mbin_dispatch_init _sm3_ctx_mgr_submit, _sm3_ctx_mgr_submit_base, \ 72 _sm3_ctx_mgr_submit_base,_sm3_ctx_mgr_submit_avx2 73 mbin_dispatch_init _sm3_ctx_mgr_flush, _sm3_ctx_mgr_flush_base, \ 74 _sm3_ctx_mgr_flush_base,_sm3_ctx_mgr_flush_avx2 75%endif 76 77;;; func core, ver, snum 78slversion _sm3_ctx_mgr_init, 00, 00, 2300 79slversion _sm3_ctx_mgr_submit, 00, 00, 2301 80slversion _sm3_ctx_mgr_flush, 00, 00, 2302 81 82