1;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2; Copyright(c) 2024 Intel Corporation All rights reserved. 3; 4; Redistribution and use in source and binary forms, with or without 5; modification, are permitted provided that the following conditions 6; are met: 7; * Redistributions of source code must retain the above copyright 8; notice, this list of conditions and the following disclaimer. 9; * Redistributions in binary form must reproduce the above copyright 10; notice, this list of conditions and the following disclaimer in 11; the documentation and/or other materials provided with the 12; distribution. 13; * Neither the name of Intel Corporation nor the names of its 14; contributors may be used to endorse or promote products derived 15; from this software without specific prior written permission. 16; 17; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 30%include "reg_sizes.asm" 31 32default rel 33 34%define SELF_TEST_DONE_AND_OK 0x0 ; Same value as success for internal self tests 35%define SELF_TEST_DONE_AND_FAIL 0x1 ; Same value as failure for internal self tests 36%define SELF_TEST_NOT_DONE 0x2 37%define SELF_TEST_RUNNING 0x3 38 39section .data 40align 16 41 42self_test_status: 43dd SELF_TEST_NOT_DONE 44 45section .text 46 47%ifidn __OUTPUT_FORMAT__, elf64 48 %xdefine arg1 edi 49%else 50 %xdefine arg1 ecx 51%endif 52 53; 54; Returns self tests status and sets internal atomic status to SELF_TEST_RUNNING, 55; if the self tests have not been run yet. 56; 57; Returns 0 if self tests were successful 58; Returns 1 if self tests fail 59; Returns 3 if self tests not done yet 60align 32 61mk_global asm_check_self_tests_status, function 62asm_check_self_tests_status: 63 mov eax, [self_test_status] 64 ; Check if self tests are done (SELF_TEST_DONE_AND_OK or SELF_TEST_DONE_AND_FAIL, so 0 or 1) 65 test eax, 0x2 66 jnz check_self_test_not_done 67 68 ; Returns 0 or 1 69 ret 70 71check_self_test_not_done: 72 ; At this stage, the self tests either have not been run or they are being run by another thread 73 mov eax, SELF_TEST_NOT_DONE 74 75 mov edx, SELF_TEST_RUNNING 76 ; If self tests status == SELF_TEST_NOT_DONE (in eax), 77 ; change self tests status = SELF_TEST_RUNNING 78 lock cmpxchg dword [self_test_status], edx 79 jz return 80 81 ; At this stage, some other thread has started running the tests, so loop until it changes 82check_status_loop: 83 pause 84 cmp dword [self_test_status], SELF_TEST_RUNNING 85 je check_status_loop 86 87 ; Read value set by the other thread and return it 88 mov eax, [self_test_status] 89return: 90 ret 91 92 93align 32 94mk_global asm_set_self_tests_status, function 95asm_set_self_tests_status: 96 ; Set self tests status 97 mov dword [self_test_status], arg1 ; Either 0 (SELF_TEST_DONE_AND_OK) or 1 (SELF_TEST_DONE_AND_FAIL) 98 ret 99