xref: /inferno-os/os/boot/rpcg/archrpcg.h (revision 74a4d8c26dd3c1e9febcb717cfd6cb6512991a7a)
1*74a4d8c2SCharles.Forsyth /*
2*74a4d8c2SCharles.Forsyth  * values for RPXLite AW
3*74a4d8c2SCharles.Forsyth  */
4*74a4d8c2SCharles.Forsyth enum {
5*74a4d8c2SCharles.Forsyth 	/* CS assignment */
6*74a4d8c2SCharles.Forsyth 	BOOTCS = 0,
7*74a4d8c2SCharles.Forsyth 	DRAM1 = 1,
8*74a4d8c2SCharles.Forsyth 	/* CS2 is routed to expansion header */
9*74a4d8c2SCharles.Forsyth 	BCSRCS = 3,
10*74a4d8c2SCharles.Forsyth 	NVRAMCS = 4,
11*74a4d8c2SCharles.Forsyth 	/* CS5 is routed to expansion header */
12*74a4d8c2SCharles.Forsyth 	PCMCIA0CS = 6,	/* select even bytes */
13*74a4d8c2SCharles.Forsyth 	PCMCIA1CS = 7,	/* select odd bytes */
14*74a4d8c2SCharles.Forsyth };
15*74a4d8c2SCharles.Forsyth 
16*74a4d8c2SCharles.Forsyth /*
17*74a4d8c2SCharles.Forsyth  * BCSR bits (there are 4 8-bit registers that we access as ulong)
18*74a4d8c2SCharles.Forsyth  */
19*74a4d8c2SCharles.Forsyth enum {
20*74a4d8c2SCharles.Forsyth 	EnableEnet =	IBIT(0),
21*74a4d8c2SCharles.Forsyth 	EnableXcrLB=	IBIT(1),
22*74a4d8c2SCharles.Forsyth 	DisableColTest=	IBIT(2),
23*74a4d8c2SCharles.Forsyth 	DisableFullDplx=IBIT(3),
24*74a4d8c2SCharles.Forsyth 	LedOff=		IBIT(4),
25*74a4d8c2SCharles.Forsyth 	DisableUSB=	IBIT(5),
26*74a4d8c2SCharles.Forsyth 	HighSpdUSB=	IBIT(6),
27*74a4d8c2SCharles.Forsyth 	EnableUSBPwr=	IBIT(7),
28*74a4d8c2SCharles.Forsyth 	/* 8,9,10 unused */
29*74a4d8c2SCharles.Forsyth 	PCCVCCMask=	IBIT(12)|IBIT(13),
30*74a4d8c2SCharles.Forsyth 	PCCVPPMask=	IBIT(14)|IBIT(15),
31*74a4d8c2SCharles.Forsyth 	PCCVCC0V=	0,
32*74a4d8c2SCharles.Forsyth 	PCCVCC5V=	IBIT(13),
33*74a4d8c2SCharles.Forsyth 	PCCVCC3V=	IBIT(12),
34*74a4d8c2SCharles.Forsyth 	PCCVPP0V=	0,
35*74a4d8c2SCharles.Forsyth 	PCCVPP5V=	IBIT(14),
36*74a4d8c2SCharles.Forsyth 	PCCVPP12V=	IBIT(15),
37*74a4d8c2SCharles.Forsyth 	PCCVPPHiZ=	IBIT(14)|IBIT(15),
38*74a4d8c2SCharles.Forsyth 	/* 16-23 NYI */
39*74a4d8c2SCharles.Forsyth 	DipSwitchMask=	IBIT(24)|IBIT(25)|IBIT(26)|IBIT(27),
40*74a4d8c2SCharles.Forsyth 	DipSwitch0=	IBIT(24),
41*74a4d8c2SCharles.Forsyth 	DipSwitch1=	IBIT(25),
42*74a4d8c2SCharles.Forsyth 	DipSwitch2=	IBIT(26),
43*74a4d8c2SCharles.Forsyth 	DipSwitch3=	IBIT(27),
44*74a4d8c2SCharles.Forsyth 	/* bit 28 RESERVED */
45*74a4d8c2SCharles.Forsyth 	FlashComplete=	IBIT(29),
46*74a4d8c2SCharles.Forsyth 	NVRAMBattGood=	IBIT(30),
47*74a4d8c2SCharles.Forsyth 	RTCBattGood=	IBIT(31),
48*74a4d8c2SCharles.Forsyth };
49