1 //===- RISCVDeadRegisterDefinitions.cpp - Replace dead defs w/ zero reg --===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===---------------------------------------------------------------------===// 8 // 9 // This pass rewrites Rd to x0 for instrs whose return values are unused. 10 // 11 //===---------------------------------------------------------------------===// 12 13 #include "RISCV.h" 14 #include "RISCVInstrInfo.h" 15 #include "RISCVSubtarget.h" 16 #include "llvm/ADT/Statistic.h" 17 #include "llvm/CodeGen/LiveDebugVariables.h" 18 #include "llvm/CodeGen/LiveIntervals.h" 19 #include "llvm/CodeGen/LiveStacks.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/CodeGen/MachineRegisterInfo.h" 22 23 using namespace llvm; 24 #define DEBUG_TYPE "riscv-dead-defs" 25 #define RISCV_DEAD_REG_DEF_NAME "RISC-V Dead register definitions" 26 27 STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced"); 28 29 namespace { 30 class RISCVDeadRegisterDefinitions : public MachineFunctionPass { 31 public: 32 static char ID; 33 34 RISCVDeadRegisterDefinitions() : MachineFunctionPass(ID) {} 35 bool runOnMachineFunction(MachineFunction &MF) override; 36 void getAnalysisUsage(AnalysisUsage &AU) const override { 37 AU.setPreservesCFG(); 38 AU.addRequired<LiveIntervalsWrapperPass>(); 39 AU.addPreserved<LiveIntervalsWrapperPass>(); 40 AU.addRequired<LiveIntervalsWrapperPass>(); 41 AU.addPreserved<SlotIndexesWrapperPass>(); 42 AU.addPreserved<LiveDebugVariables>(); 43 AU.addPreserved<LiveStacks>(); 44 MachineFunctionPass::getAnalysisUsage(AU); 45 } 46 47 StringRef getPassName() const override { return RISCV_DEAD_REG_DEF_NAME; } 48 }; 49 } // end anonymous namespace 50 51 char RISCVDeadRegisterDefinitions::ID = 0; 52 INITIALIZE_PASS(RISCVDeadRegisterDefinitions, DEBUG_TYPE, 53 RISCV_DEAD_REG_DEF_NAME, false, false) 54 55 FunctionPass *llvm::createRISCVDeadRegisterDefinitionsPass() { 56 return new RISCVDeadRegisterDefinitions(); 57 } 58 59 bool RISCVDeadRegisterDefinitions::runOnMachineFunction(MachineFunction &MF) { 60 if (skipFunction(MF.getFunction())) 61 return false; 62 63 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); 64 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); 65 LiveIntervals &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS(); 66 LLVM_DEBUG(dbgs() << "***** RISCVDeadRegisterDefinitions *****\n"); 67 68 bool MadeChange = false; 69 for (MachineBasicBlock &MBB : MF) { 70 for (MachineInstr &MI : MBB) { 71 // We only handle non-computational instructions since some NOP encodings 72 // are reserved for HINT instructions. 73 const MCInstrDesc &Desc = MI.getDesc(); 74 if (!Desc.mayLoad() && !Desc.mayStore() && 75 !Desc.hasUnmodeledSideEffects() && 76 MI.getOpcode() != RISCV::PseudoVSETVLI && 77 MI.getOpcode() != RISCV::PseudoVSETIVLI) 78 continue; 79 // For PseudoVSETVLIX0, Rd = X0 has special meaning. 80 if (MI.getOpcode() == RISCV::PseudoVSETVLIX0) 81 continue; 82 for (int I = 0, E = Desc.getNumDefs(); I != E; ++I) { 83 MachineOperand &MO = MI.getOperand(I); 84 if (!MO.isReg() || !MO.isDef() || MO.isEarlyClobber()) 85 continue; 86 // Be careful not to change the register if it's a tied operand. 87 if (MI.isRegTiedToUseOperand(I)) { 88 LLVM_DEBUG(dbgs() << " Ignoring, def is tied operand.\n"); 89 continue; 90 } 91 Register Reg = MO.getReg(); 92 if (!Reg.isVirtual() || !MO.isDead()) 93 continue; 94 LLVM_DEBUG(dbgs() << " Dead def operand #" << I << " in:\n "; 95 MI.print(dbgs())); 96 const TargetRegisterClass *RC = TII->getRegClass(Desc, I, TRI, MF); 97 if (!(RC && RC->contains(RISCV::X0))) { 98 LLVM_DEBUG(dbgs() << " Ignoring, register is not a GPR.\n"); 99 continue; 100 } 101 assert(LIS.hasInterval(Reg)); 102 LIS.removeInterval(Reg); 103 MO.setReg(RISCV::X0); 104 LLVM_DEBUG(dbgs() << " Replacing with zero register. New:\n "; 105 MI.print(dbgs())); 106 ++NumDeadDefsReplaced; 107 MadeChange = true; 108 } 109 } 110 } 111 112 return MadeChange; 113 } 114