xref: /dpdk/lib/eal/x86/include/rte_vect.h (revision 5b856206c74bbcf19e12cafa15382a7e15b0a1b5)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation
3  */
4 
5 #ifndef _RTE_VECT_X86_H_
6 #define _RTE_VECT_X86_H_
7 
8 /**
9  * @file
10  *
11  * RTE SSE/AVX related header.
12  */
13 
14 #include <assert.h>
15 #include <stdint.h>
16 #include <rte_config.h>
17 #include <rte_common.h>
18 #include "generic/rte_vect.h"
19 
20 #if defined(__ICC) || defined(_WIN64)
21 #include <smmintrin.h> /* SSE4 */
22 #include <immintrin.h>
23 #else
24 #include <x86intrin.h>
25 #endif
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
31 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_256
32 
33 typedef __m128i xmm_t;
34 
35 #define	XMM_SIZE	16
36 #define	XMM_MASK	(XMM_SIZE - 1)
37 
38 static_assert(sizeof(xmm_t) == XMM_SIZE, "");
39 
40 typedef union rte_xmm {
41 	xmm_t    x;
42 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
43 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
44 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
45 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
46 	double   pd[XMM_SIZE / sizeof(double)];
47 } rte_xmm_t;
48 
49 #ifdef __AVX__
50 
51 typedef __m256i ymm_t;
52 
53 #define	YMM_SIZE	(sizeof(ymm_t))
54 #define	YMM_MASK	(YMM_SIZE - 1)
55 
56 typedef union rte_ymm {
57 	ymm_t    y;
58 	xmm_t    x[YMM_SIZE / sizeof(xmm_t)];
59 	uint8_t  u8[YMM_SIZE / sizeof(uint8_t)];
60 	uint16_t u16[YMM_SIZE / sizeof(uint16_t)];
61 	uint32_t u32[YMM_SIZE / sizeof(uint32_t)];
62 	uint64_t u64[YMM_SIZE / sizeof(uint64_t)];
63 	double   pd[YMM_SIZE / sizeof(double)];
64 } rte_ymm_t;
65 
66 #endif /* __AVX__ */
67 
68 #ifdef RTE_ARCH_I686
69 #define _mm_cvtsi128_si64(a)    \
70 __extension__ ({                \
71 	rte_xmm_t m;            \
72 	m.x = (a);              \
73 	(m.u64[0]);             \
74 })
75 #endif
76 
77 /*
78  * Prior to version 12.1 icc doesn't support _mm_set_epi64x.
79  */
80 #if (defined(__ICC) && __ICC < 1210)
81 #define _mm_set_epi64x(a, b)     \
82 __extension__ ({                 \
83 	rte_xmm_t m;             \
84 	m.u64[0] = b;            \
85 	m.u64[1] = a;            \
86 	(m.x);                   \
87 })
88 #endif /* (defined(__ICC) && __ICC < 1210) */
89 
90 #ifdef __AVX512F__
91 
92 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
93 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
94 
95 typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
96 	__m512i	 z;
97 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
98 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
99 	uint8_t  u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)];
100 	uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)];
101 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
102 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
103 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
104 } __rte_x86_zmm_t;
105 
106 #endif /* __AVX512F__ */
107 
108 #ifdef __cplusplus
109 }
110 #endif
111 
112 #endif /* _RTE_VECT_X86_H_ */
113