1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2022 StarFive 3 * Copyright(c) 2022 SiFive 4 * Copyright(c) 2022 Semihalf 5 */ 6 7 #ifndef RTE_PAUSE_RISCV_H 8 #define RTE_PAUSE_RISCV_H 9 10 #include "rte_atomic.h" 11 12 #include "generic/rte_pause.h" 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 static inline void rte_pause(void) 19 { 20 /* Insert pause hint directly to be compatible with old compilers. 21 * This will work even on platforms without Zihintpause extension 22 * because this is a FENCE hint instruction which evaluates to NOP. 23 */ 24 asm volatile(".int 0x0100000F" : : : "memory"); 25 } 26 27 #ifdef __cplusplus 28 } 29 #endif 30 31 #endif /* RTE_PAUSE_RISCV_H */ 32