xref: /dpdk/examples/qos_sched/app_thread.c (revision b0c1628b15fd92f715a875e0bc87381bd7e643b0)
13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
23998e2a0SBruce Richardson  * Copyright(c) 2010-2014 Intel Corporation
3de3cfa2cSIntel  */
4de3cfa2cSIntel 
5de3cfa2cSIntel #include <stdint.h>
6de3cfa2cSIntel 
7de3cfa2cSIntel #include <rte_log.h>
8de3cfa2cSIntel #include <rte_mbuf.h>
9de3cfa2cSIntel #include <rte_malloc.h>
10de3cfa2cSIntel #include <rte_cycles.h>
11de3cfa2cSIntel #include <rte_ethdev.h>
12de3cfa2cSIntel #include <rte_memcpy.h>
13de3cfa2cSIntel #include <rte_byteorder.h>
14de3cfa2cSIntel #include <rte_branch_prediction.h>
15de3cfa2cSIntel #include <rte_sched.h>
16de3cfa2cSIntel 
17de3cfa2cSIntel #include "main.h"
18de3cfa2cSIntel 
19de3cfa2cSIntel /*
20de3cfa2cSIntel  * QoS parameters are encoded as follows:
21de3cfa2cSIntel  *		Outer VLAN ID defines subport
22de3cfa2cSIntel  *		Inner VLAN ID defines pipe
23de3cfa2cSIntel  *		Destination IP host (0.0.0.XXX) defines queue
24de3cfa2cSIntel  * Values below define offset to each field from start of frame
25de3cfa2cSIntel  */
26de3cfa2cSIntel #define SUBPORT_OFFSET	7
27de3cfa2cSIntel #define PIPE_OFFSET		9
28de3cfa2cSIntel #define QUEUE_OFFSET	20
29de3cfa2cSIntel #define COLOR_OFFSET	19
30de3cfa2cSIntel 
31de3cfa2cSIntel static inline int
32de3cfa2cSIntel get_pkt_sched(struct rte_mbuf *m, uint32_t *subport, uint32_t *pipe,
33de3cfa2cSIntel 			uint32_t *traffic_class, uint32_t *queue, uint32_t *color)
34de3cfa2cSIntel {
35de3cfa2cSIntel 	uint16_t *pdata = rte_pktmbuf_mtod(m, uint16_t *);
36be1e5332SJasvinder Singh 	uint16_t pipe_queue;
37de3cfa2cSIntel 
38*b0c1628bSJasvinder Singh 	/* Outer VLAN ID*/
39de3cfa2cSIntel 	*subport = (rte_be_to_cpu_16(pdata[SUBPORT_OFFSET]) & 0x0FFF) &
40*b0c1628bSJasvinder Singh 		(port_params.n_subports_per_port - 1);
41*b0c1628bSJasvinder Singh 
42*b0c1628bSJasvinder Singh 	/* Inner VLAN ID */
43de3cfa2cSIntel 	*pipe = (rte_be_to_cpu_16(pdata[PIPE_OFFSET]) & 0x0FFF) &
44*b0c1628bSJasvinder Singh 		(subport_params[*subport].n_pipes_per_subport_enabled - 1);
45*b0c1628bSJasvinder Singh 
46be1e5332SJasvinder Singh 	pipe_queue = active_queues[(pdata[QUEUE_OFFSET] >> 8) % n_active_queues];
47*b0c1628bSJasvinder Singh 
48*b0c1628bSJasvinder Singh 	/* Traffic class (Destination IP) */
49be1e5332SJasvinder Singh 	*traffic_class = pipe_queue > RTE_SCHED_TRAFFIC_CLASS_BE ?
50*b0c1628bSJasvinder Singh 			RTE_SCHED_TRAFFIC_CLASS_BE : pipe_queue;
51*b0c1628bSJasvinder Singh 
52*b0c1628bSJasvinder Singh 	/* Traffic class queue (Destination IP) */
53*b0c1628bSJasvinder Singh 	*queue = pipe_queue - *traffic_class;
54*b0c1628bSJasvinder Singh 
55*b0c1628bSJasvinder Singh 	/* Color (Destination IP) */
56*b0c1628bSJasvinder Singh 	*color = pdata[COLOR_OFFSET] & 0x03;
57de3cfa2cSIntel 
58de3cfa2cSIntel 	return 0;
59de3cfa2cSIntel }
60de3cfa2cSIntel 
61de3cfa2cSIntel void
62de3cfa2cSIntel app_rx_thread(struct thread_conf **confs)
63de3cfa2cSIntel {
64de3cfa2cSIntel 	uint32_t i, nb_rx;
65de3cfa2cSIntel 	struct rte_mbuf *rx_mbufs[burst_conf.rx_burst] __rte_cache_aligned;
66de3cfa2cSIntel 	struct thread_conf *conf;
67de3cfa2cSIntel 	int conf_idx = 0;
68de3cfa2cSIntel 
69de3cfa2cSIntel 	uint32_t subport;
70de3cfa2cSIntel 	uint32_t pipe;
71de3cfa2cSIntel 	uint32_t traffic_class;
72de3cfa2cSIntel 	uint32_t queue;
73de3cfa2cSIntel 	uint32_t color;
74de3cfa2cSIntel 
75de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
76de3cfa2cSIntel 		nb_rx = rte_eth_rx_burst(conf->rx_port, conf->rx_queue, rx_mbufs,
77de3cfa2cSIntel 				burst_conf.rx_burst);
78de3cfa2cSIntel 
79de3cfa2cSIntel 		if (likely(nb_rx != 0)) {
80de3cfa2cSIntel 			APP_STATS_ADD(conf->stat.nb_rx, nb_rx);
81de3cfa2cSIntel 
82de3cfa2cSIntel 			for(i = 0; i < nb_rx; i++) {
83de3cfa2cSIntel 				get_pkt_sched(rx_mbufs[i],
84de3cfa2cSIntel 						&subport, &pipe, &traffic_class, &queue, &color);
855d3f7210SReshma Pattan 				rte_sched_port_pkt_write(conf->sched_port,
865d3f7210SReshma Pattan 						rx_mbufs[i],
875d3f7210SReshma Pattan 						subport, pipe,
885d3f7210SReshma Pattan 						traffic_class, queue,
89c1656328SJasvinder Singh 						(enum rte_color) color);
90de3cfa2cSIntel 			}
91de3cfa2cSIntel 
92de3cfa2cSIntel 			if (unlikely(rte_ring_sp_enqueue_bulk(conf->rx_ring,
9314fbffb0SBruce Richardson 					(void **)rx_mbufs, nb_rx, NULL) == 0)) {
94de3cfa2cSIntel 				for(i = 0; i < nb_rx; i++) {
95de3cfa2cSIntel 					rte_pktmbuf_free(rx_mbufs[i]);
96de3cfa2cSIntel 
97de3cfa2cSIntel 					APP_STATS_ADD(conf->stat.nb_drop, 1);
98de3cfa2cSIntel 				}
99de3cfa2cSIntel 			}
100de3cfa2cSIntel 		}
101de3cfa2cSIntel 		conf_idx++;
102de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
103de3cfa2cSIntel 			conf_idx = 0;
104de3cfa2cSIntel 	}
105de3cfa2cSIntel }
106de3cfa2cSIntel 
107de3cfa2cSIntel 
108de3cfa2cSIntel 
109de3cfa2cSIntel /* Send the packet to an output interface
110de3cfa2cSIntel  * For performance reason function returns number of packets dropped, not sent,
111de3cfa2cSIntel  * so 0 means that all packets were sent successfully
112de3cfa2cSIntel  */
113de3cfa2cSIntel 
114de3cfa2cSIntel static inline void
115de3cfa2cSIntel app_send_burst(struct thread_conf *qconf)
116de3cfa2cSIntel {
117de3cfa2cSIntel 	struct rte_mbuf **mbufs;
118de3cfa2cSIntel 	uint32_t n, ret;
119de3cfa2cSIntel 
120de3cfa2cSIntel 	mbufs = (struct rte_mbuf **)qconf->m_table;
121de3cfa2cSIntel 	n = qconf->n_mbufs;
122de3cfa2cSIntel 
123de3cfa2cSIntel 	do {
124de3cfa2cSIntel 		ret = rte_eth_tx_burst(qconf->tx_port, qconf->tx_queue, mbufs, (uint16_t)n);
125d827c269SYong Liu 		/* we cannot drop the packets, so re-send */
126de3cfa2cSIntel 		/* update number of packets to be sent */
127de3cfa2cSIntel 		n -= ret;
128de3cfa2cSIntel 		mbufs = (struct rte_mbuf **)&mbufs[ret];
129d827c269SYong Liu 	} while (n);
130de3cfa2cSIntel }
131de3cfa2cSIntel 
132de3cfa2cSIntel 
133de3cfa2cSIntel /* Send the packet to an output interface */
134de3cfa2cSIntel static void
135de3cfa2cSIntel app_send_packets(struct thread_conf *qconf, struct rte_mbuf **mbufs, uint32_t nb_pkt)
136de3cfa2cSIntel {
137de3cfa2cSIntel 	uint32_t i, len;
138de3cfa2cSIntel 
139de3cfa2cSIntel 	len = qconf->n_mbufs;
140de3cfa2cSIntel 	for(i = 0; i < nb_pkt; i++) {
141de3cfa2cSIntel 		qconf->m_table[len] = mbufs[i];
142de3cfa2cSIntel 		len++;
143de3cfa2cSIntel 		/* enough pkts to be sent */
144de3cfa2cSIntel 		if (unlikely(len == burst_conf.tx_burst)) {
145de3cfa2cSIntel 			qconf->n_mbufs = len;
146de3cfa2cSIntel 			app_send_burst(qconf);
147de3cfa2cSIntel 			len = 0;
148de3cfa2cSIntel 		}
149de3cfa2cSIntel 	}
150de3cfa2cSIntel 
151de3cfa2cSIntel 	qconf->n_mbufs = len;
152de3cfa2cSIntel }
153de3cfa2cSIntel 
154de3cfa2cSIntel void
155de3cfa2cSIntel app_tx_thread(struct thread_conf **confs)
156de3cfa2cSIntel {
157de3cfa2cSIntel 	struct rte_mbuf *mbufs[burst_conf.qos_dequeue];
158de3cfa2cSIntel 	struct thread_conf *conf;
159de3cfa2cSIntel 	int conf_idx = 0;
160de3cfa2cSIntel 	int retval;
161de3cfa2cSIntel 	const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
162de3cfa2cSIntel 
163de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
164de3cfa2cSIntel 		retval = rte_ring_sc_dequeue_bulk(conf->tx_ring, (void **)mbufs,
165ecaed092SBruce Richardson 					burst_conf.qos_dequeue, NULL);
166cfa7c9e6SBruce Richardson 		if (likely(retval != 0)) {
167de3cfa2cSIntel 			app_send_packets(conf, mbufs, burst_conf.qos_dequeue);
168de3cfa2cSIntel 
169de3cfa2cSIntel 			conf->counter = 0; /* reset empty read loop counter */
170de3cfa2cSIntel 		}
171de3cfa2cSIntel 
172de3cfa2cSIntel 		conf->counter++;
173de3cfa2cSIntel 
174de3cfa2cSIntel 		/* drain ring and TX queues */
175de3cfa2cSIntel 		if (unlikely(conf->counter > drain_tsc)) {
176de3cfa2cSIntel 			/* now check is there any packets left to be transmitted */
177de3cfa2cSIntel 			if (conf->n_mbufs != 0) {
178de3cfa2cSIntel 				app_send_burst(conf);
179de3cfa2cSIntel 
180de3cfa2cSIntel 				conf->n_mbufs = 0;
181de3cfa2cSIntel 			}
182de3cfa2cSIntel 			conf->counter = 0;
183de3cfa2cSIntel 		}
184de3cfa2cSIntel 
185de3cfa2cSIntel 		conf_idx++;
186de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
187de3cfa2cSIntel 			conf_idx = 0;
188de3cfa2cSIntel 	}
189de3cfa2cSIntel }
190de3cfa2cSIntel 
191de3cfa2cSIntel 
192de3cfa2cSIntel void
193de3cfa2cSIntel app_worker_thread(struct thread_conf **confs)
194de3cfa2cSIntel {
195de3cfa2cSIntel 	struct rte_mbuf *mbufs[burst_conf.ring_burst];
196de3cfa2cSIntel 	struct thread_conf *conf;
197de3cfa2cSIntel 	int conf_idx = 0;
198de3cfa2cSIntel 
199de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
200de3cfa2cSIntel 		uint32_t nb_pkt;
201de3cfa2cSIntel 
202de3cfa2cSIntel 		/* Read packet from the ring */
203edabd7feSJasvinder Singh 		nb_pkt = rte_ring_sc_dequeue_burst(conf->rx_ring, (void **)mbufs,
204ecaed092SBruce Richardson 					burst_conf.ring_burst, NULL);
205edabd7feSJasvinder Singh 		if (likely(nb_pkt)) {
206de3cfa2cSIntel 			int nb_sent = rte_sched_port_enqueue(conf->sched_port, mbufs,
207edabd7feSJasvinder Singh 					nb_pkt);
208de3cfa2cSIntel 
209edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_drop, nb_pkt - nb_sent);
210edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_rx, nb_pkt);
211de3cfa2cSIntel 		}
212de3cfa2cSIntel 
213de3cfa2cSIntel 		nb_pkt = rte_sched_port_dequeue(conf->sched_port, mbufs,
214de3cfa2cSIntel 					burst_conf.qos_dequeue);
215de3cfa2cSIntel 		if (likely(nb_pkt > 0))
216cfa7c9e6SBruce Richardson 			while (rte_ring_sp_enqueue_bulk(conf->tx_ring,
21714fbffb0SBruce Richardson 					(void **)mbufs, nb_pkt, NULL) == 0)
218cfa7c9e6SBruce Richardson 				; /* empty body */
219de3cfa2cSIntel 
220de3cfa2cSIntel 		conf_idx++;
221de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
222de3cfa2cSIntel 			conf_idx = 0;
223de3cfa2cSIntel 	}
224de3cfa2cSIntel }
225de3cfa2cSIntel 
226de3cfa2cSIntel 
227de3cfa2cSIntel void
228de3cfa2cSIntel app_mixed_thread(struct thread_conf **confs)
229de3cfa2cSIntel {
230de3cfa2cSIntel 	struct rte_mbuf *mbufs[burst_conf.ring_burst];
231de3cfa2cSIntel 	struct thread_conf *conf;
232de3cfa2cSIntel 	int conf_idx = 0;
233de3cfa2cSIntel 	const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
234de3cfa2cSIntel 
235de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
236de3cfa2cSIntel 		uint32_t nb_pkt;
237de3cfa2cSIntel 
238de3cfa2cSIntel 		/* Read packet from the ring */
239edabd7feSJasvinder Singh 		nb_pkt = rte_ring_sc_dequeue_burst(conf->rx_ring, (void **)mbufs,
240ecaed092SBruce Richardson 					burst_conf.ring_burst, NULL);
241edabd7feSJasvinder Singh 		if (likely(nb_pkt)) {
242de3cfa2cSIntel 			int nb_sent = rte_sched_port_enqueue(conf->sched_port, mbufs,
243edabd7feSJasvinder Singh 					nb_pkt);
244de3cfa2cSIntel 
245edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_drop, nb_pkt - nb_sent);
246edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_rx, nb_pkt);
247de3cfa2cSIntel 		}
248de3cfa2cSIntel 
249de3cfa2cSIntel 
250de3cfa2cSIntel 		nb_pkt = rte_sched_port_dequeue(conf->sched_port, mbufs,
251de3cfa2cSIntel 					burst_conf.qos_dequeue);
252de3cfa2cSIntel 		if (likely(nb_pkt > 0)) {
253de3cfa2cSIntel 			app_send_packets(conf, mbufs, nb_pkt);
254de3cfa2cSIntel 
255de3cfa2cSIntel 			conf->counter = 0; /* reset empty read loop counter */
256de3cfa2cSIntel 		}
257de3cfa2cSIntel 
258de3cfa2cSIntel 		conf->counter++;
259de3cfa2cSIntel 
260de3cfa2cSIntel 		/* drain ring and TX queues */
261de3cfa2cSIntel 		if (unlikely(conf->counter > drain_tsc)) {
262de3cfa2cSIntel 
263de3cfa2cSIntel 			/* now check is there any packets left to be transmitted */
264de3cfa2cSIntel 			if (conf->n_mbufs != 0) {
265de3cfa2cSIntel 				app_send_burst(conf);
266de3cfa2cSIntel 
267de3cfa2cSIntel 				conf->n_mbufs = 0;
268de3cfa2cSIntel 			}
269de3cfa2cSIntel 			conf->counter = 0;
270de3cfa2cSIntel 		}
271de3cfa2cSIntel 
272de3cfa2cSIntel 		conf_idx++;
273de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
274de3cfa2cSIntel 			conf_idx = 0;
275de3cfa2cSIntel 	}
276de3cfa2cSIntel }
277