1*3998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 2*3998e2a0SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation 3de3cfa2cSIntel */ 4de3cfa2cSIntel 5de3cfa2cSIntel #include <stdint.h> 6de3cfa2cSIntel 7de3cfa2cSIntel #include <rte_log.h> 8de3cfa2cSIntel #include <rte_mbuf.h> 9de3cfa2cSIntel #include <rte_malloc.h> 10de3cfa2cSIntel #include <rte_cycles.h> 11de3cfa2cSIntel #include <rte_ethdev.h> 12de3cfa2cSIntel #include <rte_memcpy.h> 13de3cfa2cSIntel #include <rte_byteorder.h> 14de3cfa2cSIntel #include <rte_branch_prediction.h> 15de3cfa2cSIntel #include <rte_sched.h> 16de3cfa2cSIntel 17de3cfa2cSIntel #include "main.h" 18de3cfa2cSIntel 19de3cfa2cSIntel /* 20de3cfa2cSIntel * QoS parameters are encoded as follows: 21de3cfa2cSIntel * Outer VLAN ID defines subport 22de3cfa2cSIntel * Inner VLAN ID defines pipe 23de3cfa2cSIntel * Destination IP 0.0.XXX.0 defines traffic class 24de3cfa2cSIntel * Destination IP host (0.0.0.XXX) defines queue 25de3cfa2cSIntel * Values below define offset to each field from start of frame 26de3cfa2cSIntel */ 27de3cfa2cSIntel #define SUBPORT_OFFSET 7 28de3cfa2cSIntel #define PIPE_OFFSET 9 29de3cfa2cSIntel #define TC_OFFSET 20 30de3cfa2cSIntel #define QUEUE_OFFSET 20 31de3cfa2cSIntel #define COLOR_OFFSET 19 32de3cfa2cSIntel 33de3cfa2cSIntel static inline int 34de3cfa2cSIntel get_pkt_sched(struct rte_mbuf *m, uint32_t *subport, uint32_t *pipe, 35de3cfa2cSIntel uint32_t *traffic_class, uint32_t *queue, uint32_t *color) 36de3cfa2cSIntel { 37de3cfa2cSIntel uint16_t *pdata = rte_pktmbuf_mtod(m, uint16_t *); 38de3cfa2cSIntel 39de3cfa2cSIntel *subport = (rte_be_to_cpu_16(pdata[SUBPORT_OFFSET]) & 0x0FFF) & 40de3cfa2cSIntel (port_params.n_subports_per_port - 1); /* Outer VLAN ID*/ 41de3cfa2cSIntel *pipe = (rte_be_to_cpu_16(pdata[PIPE_OFFSET]) & 0x0FFF) & 42de3cfa2cSIntel (port_params.n_pipes_per_subport - 1); /* Inner VLAN ID */ 43de3cfa2cSIntel *traffic_class = (pdata[QUEUE_OFFSET] & 0x0F) & 44de3cfa2cSIntel (RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1); /* Destination IP */ 45de3cfa2cSIntel *queue = ((pdata[QUEUE_OFFSET] >> 8) & 0x0F) & 46de3cfa2cSIntel (RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS - 1) ; /* Destination IP */ 47de3cfa2cSIntel *color = pdata[COLOR_OFFSET] & 0x03; /* Destination IP */ 48de3cfa2cSIntel 49de3cfa2cSIntel return 0; 50de3cfa2cSIntel } 51de3cfa2cSIntel 52de3cfa2cSIntel void 53de3cfa2cSIntel app_rx_thread(struct thread_conf **confs) 54de3cfa2cSIntel { 55de3cfa2cSIntel uint32_t i, nb_rx; 56de3cfa2cSIntel struct rte_mbuf *rx_mbufs[burst_conf.rx_burst] __rte_cache_aligned; 57de3cfa2cSIntel struct thread_conf *conf; 58de3cfa2cSIntel int conf_idx = 0; 59de3cfa2cSIntel 60de3cfa2cSIntel uint32_t subport; 61de3cfa2cSIntel uint32_t pipe; 62de3cfa2cSIntel uint32_t traffic_class; 63de3cfa2cSIntel uint32_t queue; 64de3cfa2cSIntel uint32_t color; 65de3cfa2cSIntel 66de3cfa2cSIntel while ((conf = confs[conf_idx])) { 67de3cfa2cSIntel nb_rx = rte_eth_rx_burst(conf->rx_port, conf->rx_queue, rx_mbufs, 68de3cfa2cSIntel burst_conf.rx_burst); 69de3cfa2cSIntel 70de3cfa2cSIntel if (likely(nb_rx != 0)) { 71de3cfa2cSIntel APP_STATS_ADD(conf->stat.nb_rx, nb_rx); 72de3cfa2cSIntel 73de3cfa2cSIntel for(i = 0; i < nb_rx; i++) { 74de3cfa2cSIntel get_pkt_sched(rx_mbufs[i], 75de3cfa2cSIntel &subport, &pipe, &traffic_class, &queue, &color); 76de3cfa2cSIntel rte_sched_port_pkt_write(rx_mbufs[i], subport, pipe, 77de3cfa2cSIntel traffic_class, queue, (enum rte_meter_color) color); 78de3cfa2cSIntel } 79de3cfa2cSIntel 80de3cfa2cSIntel if (unlikely(rte_ring_sp_enqueue_bulk(conf->rx_ring, 8114fbffb0SBruce Richardson (void **)rx_mbufs, nb_rx, NULL) == 0)) { 82de3cfa2cSIntel for(i = 0; i < nb_rx; i++) { 83de3cfa2cSIntel rte_pktmbuf_free(rx_mbufs[i]); 84de3cfa2cSIntel 85de3cfa2cSIntel APP_STATS_ADD(conf->stat.nb_drop, 1); 86de3cfa2cSIntel } 87de3cfa2cSIntel } 88de3cfa2cSIntel } 89de3cfa2cSIntel conf_idx++; 90de3cfa2cSIntel if (confs[conf_idx] == NULL) 91de3cfa2cSIntel conf_idx = 0; 92de3cfa2cSIntel } 93de3cfa2cSIntel } 94de3cfa2cSIntel 95de3cfa2cSIntel 96de3cfa2cSIntel 97de3cfa2cSIntel /* Send the packet to an output interface 98de3cfa2cSIntel * For performance reason function returns number of packets dropped, not sent, 99de3cfa2cSIntel * so 0 means that all packets were sent successfully 100de3cfa2cSIntel */ 101de3cfa2cSIntel 102de3cfa2cSIntel static inline void 103de3cfa2cSIntel app_send_burst(struct thread_conf *qconf) 104de3cfa2cSIntel { 105de3cfa2cSIntel struct rte_mbuf **mbufs; 106de3cfa2cSIntel uint32_t n, ret; 107de3cfa2cSIntel 108de3cfa2cSIntel mbufs = (struct rte_mbuf **)qconf->m_table; 109de3cfa2cSIntel n = qconf->n_mbufs; 110de3cfa2cSIntel 111de3cfa2cSIntel do { 112de3cfa2cSIntel ret = rte_eth_tx_burst(qconf->tx_port, qconf->tx_queue, mbufs, (uint16_t)n); 113d827c269SYong Liu /* we cannot drop the packets, so re-send */ 114de3cfa2cSIntel /* update number of packets to be sent */ 115de3cfa2cSIntel n -= ret; 116de3cfa2cSIntel mbufs = (struct rte_mbuf **)&mbufs[ret]; 117d827c269SYong Liu } while (n); 118de3cfa2cSIntel } 119de3cfa2cSIntel 120de3cfa2cSIntel 121de3cfa2cSIntel /* Send the packet to an output interface */ 122de3cfa2cSIntel static void 123de3cfa2cSIntel app_send_packets(struct thread_conf *qconf, struct rte_mbuf **mbufs, uint32_t nb_pkt) 124de3cfa2cSIntel { 125de3cfa2cSIntel uint32_t i, len; 126de3cfa2cSIntel 127de3cfa2cSIntel len = qconf->n_mbufs; 128de3cfa2cSIntel for(i = 0; i < nb_pkt; i++) { 129de3cfa2cSIntel qconf->m_table[len] = mbufs[i]; 130de3cfa2cSIntel len++; 131de3cfa2cSIntel /* enough pkts to be sent */ 132de3cfa2cSIntel if (unlikely(len == burst_conf.tx_burst)) { 133de3cfa2cSIntel qconf->n_mbufs = len; 134de3cfa2cSIntel app_send_burst(qconf); 135de3cfa2cSIntel len = 0; 136de3cfa2cSIntel } 137de3cfa2cSIntel } 138de3cfa2cSIntel 139de3cfa2cSIntel qconf->n_mbufs = len; 140de3cfa2cSIntel } 141de3cfa2cSIntel 142de3cfa2cSIntel void 143de3cfa2cSIntel app_tx_thread(struct thread_conf **confs) 144de3cfa2cSIntel { 145de3cfa2cSIntel struct rte_mbuf *mbufs[burst_conf.qos_dequeue]; 146de3cfa2cSIntel struct thread_conf *conf; 147de3cfa2cSIntel int conf_idx = 0; 148de3cfa2cSIntel int retval; 149de3cfa2cSIntel const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; 150de3cfa2cSIntel 151de3cfa2cSIntel while ((conf = confs[conf_idx])) { 152de3cfa2cSIntel retval = rte_ring_sc_dequeue_bulk(conf->tx_ring, (void **)mbufs, 153ecaed092SBruce Richardson burst_conf.qos_dequeue, NULL); 154cfa7c9e6SBruce Richardson if (likely(retval != 0)) { 155de3cfa2cSIntel app_send_packets(conf, mbufs, burst_conf.qos_dequeue); 156de3cfa2cSIntel 157de3cfa2cSIntel conf->counter = 0; /* reset empty read loop counter */ 158de3cfa2cSIntel } 159de3cfa2cSIntel 160de3cfa2cSIntel conf->counter++; 161de3cfa2cSIntel 162de3cfa2cSIntel /* drain ring and TX queues */ 163de3cfa2cSIntel if (unlikely(conf->counter > drain_tsc)) { 164de3cfa2cSIntel /* now check is there any packets left to be transmitted */ 165de3cfa2cSIntel if (conf->n_mbufs != 0) { 166de3cfa2cSIntel app_send_burst(conf); 167de3cfa2cSIntel 168de3cfa2cSIntel conf->n_mbufs = 0; 169de3cfa2cSIntel } 170de3cfa2cSIntel conf->counter = 0; 171de3cfa2cSIntel } 172de3cfa2cSIntel 173de3cfa2cSIntel conf_idx++; 174de3cfa2cSIntel if (confs[conf_idx] == NULL) 175de3cfa2cSIntel conf_idx = 0; 176de3cfa2cSIntel } 177de3cfa2cSIntel } 178de3cfa2cSIntel 179de3cfa2cSIntel 180de3cfa2cSIntel void 181de3cfa2cSIntel app_worker_thread(struct thread_conf **confs) 182de3cfa2cSIntel { 183de3cfa2cSIntel struct rte_mbuf *mbufs[burst_conf.ring_burst]; 184de3cfa2cSIntel struct thread_conf *conf; 185de3cfa2cSIntel int conf_idx = 0; 186de3cfa2cSIntel 187de3cfa2cSIntel while ((conf = confs[conf_idx])) { 188de3cfa2cSIntel uint32_t nb_pkt; 189de3cfa2cSIntel 190de3cfa2cSIntel /* Read packet from the ring */ 191edabd7feSJasvinder Singh nb_pkt = rte_ring_sc_dequeue_burst(conf->rx_ring, (void **)mbufs, 192ecaed092SBruce Richardson burst_conf.ring_burst, NULL); 193edabd7feSJasvinder Singh if (likely(nb_pkt)) { 194de3cfa2cSIntel int nb_sent = rte_sched_port_enqueue(conf->sched_port, mbufs, 195edabd7feSJasvinder Singh nb_pkt); 196de3cfa2cSIntel 197edabd7feSJasvinder Singh APP_STATS_ADD(conf->stat.nb_drop, nb_pkt - nb_sent); 198edabd7feSJasvinder Singh APP_STATS_ADD(conf->stat.nb_rx, nb_pkt); 199de3cfa2cSIntel } 200de3cfa2cSIntel 201de3cfa2cSIntel nb_pkt = rte_sched_port_dequeue(conf->sched_port, mbufs, 202de3cfa2cSIntel burst_conf.qos_dequeue); 203de3cfa2cSIntel if (likely(nb_pkt > 0)) 204cfa7c9e6SBruce Richardson while (rte_ring_sp_enqueue_bulk(conf->tx_ring, 20514fbffb0SBruce Richardson (void **)mbufs, nb_pkt, NULL) == 0) 206cfa7c9e6SBruce Richardson ; /* empty body */ 207de3cfa2cSIntel 208de3cfa2cSIntel conf_idx++; 209de3cfa2cSIntel if (confs[conf_idx] == NULL) 210de3cfa2cSIntel conf_idx = 0; 211de3cfa2cSIntel } 212de3cfa2cSIntel } 213de3cfa2cSIntel 214de3cfa2cSIntel 215de3cfa2cSIntel void 216de3cfa2cSIntel app_mixed_thread(struct thread_conf **confs) 217de3cfa2cSIntel { 218de3cfa2cSIntel struct rte_mbuf *mbufs[burst_conf.ring_burst]; 219de3cfa2cSIntel struct thread_conf *conf; 220de3cfa2cSIntel int conf_idx = 0; 221de3cfa2cSIntel const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; 222de3cfa2cSIntel 223de3cfa2cSIntel while ((conf = confs[conf_idx])) { 224de3cfa2cSIntel uint32_t nb_pkt; 225de3cfa2cSIntel 226de3cfa2cSIntel /* Read packet from the ring */ 227edabd7feSJasvinder Singh nb_pkt = rte_ring_sc_dequeue_burst(conf->rx_ring, (void **)mbufs, 228ecaed092SBruce Richardson burst_conf.ring_burst, NULL); 229edabd7feSJasvinder Singh if (likely(nb_pkt)) { 230de3cfa2cSIntel int nb_sent = rte_sched_port_enqueue(conf->sched_port, mbufs, 231edabd7feSJasvinder Singh nb_pkt); 232de3cfa2cSIntel 233edabd7feSJasvinder Singh APP_STATS_ADD(conf->stat.nb_drop, nb_pkt - nb_sent); 234edabd7feSJasvinder Singh APP_STATS_ADD(conf->stat.nb_rx, nb_pkt); 235de3cfa2cSIntel } 236de3cfa2cSIntel 237de3cfa2cSIntel 238de3cfa2cSIntel nb_pkt = rte_sched_port_dequeue(conf->sched_port, mbufs, 239de3cfa2cSIntel burst_conf.qos_dequeue); 240de3cfa2cSIntel if (likely(nb_pkt > 0)) { 241de3cfa2cSIntel app_send_packets(conf, mbufs, nb_pkt); 242de3cfa2cSIntel 243de3cfa2cSIntel conf->counter = 0; /* reset empty read loop counter */ 244de3cfa2cSIntel } 245de3cfa2cSIntel 246de3cfa2cSIntel conf->counter++; 247de3cfa2cSIntel 248de3cfa2cSIntel /* drain ring and TX queues */ 249de3cfa2cSIntel if (unlikely(conf->counter > drain_tsc)) { 250de3cfa2cSIntel 251de3cfa2cSIntel /* now check is there any packets left to be transmitted */ 252de3cfa2cSIntel if (conf->n_mbufs != 0) { 253de3cfa2cSIntel app_send_burst(conf); 254de3cfa2cSIntel 255de3cfa2cSIntel conf->n_mbufs = 0; 256de3cfa2cSIntel } 257de3cfa2cSIntel conf->counter = 0; 258de3cfa2cSIntel } 259de3cfa2cSIntel 260de3cfa2cSIntel conf_idx++; 261de3cfa2cSIntel if (confs[conf_idx] == NULL) 262de3cfa2cSIntel conf_idx = 0; 263de3cfa2cSIntel } 264de3cfa2cSIntel } 265