xref: /dpdk/examples/qos_sched/app_thread.c (revision 7e06c0de1952d3109a5b0c4779d7e7d8059c9d78)
13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
23998e2a0SBruce Richardson  * Copyright(c) 2010-2014 Intel Corporation
3de3cfa2cSIntel  */
4de3cfa2cSIntel 
5de3cfa2cSIntel #include <stdint.h>
6de3cfa2cSIntel 
7de3cfa2cSIntel #include <rte_log.h>
8de3cfa2cSIntel #include <rte_mbuf.h>
9de3cfa2cSIntel #include <rte_malloc.h>
10de3cfa2cSIntel #include <rte_cycles.h>
11de3cfa2cSIntel #include <rte_ethdev.h>
12de3cfa2cSIntel #include <rte_memcpy.h>
13de3cfa2cSIntel #include <rte_byteorder.h>
14de3cfa2cSIntel #include <rte_branch_prediction.h>
15de3cfa2cSIntel #include <rte_sched.h>
16de3cfa2cSIntel 
17de3cfa2cSIntel #include "main.h"
18de3cfa2cSIntel 
19de3cfa2cSIntel /*
20de3cfa2cSIntel  * QoS parameters are encoded as follows:
21de3cfa2cSIntel  *		Outer VLAN ID defines subport
22de3cfa2cSIntel  *		Inner VLAN ID defines pipe
23de3cfa2cSIntel  *		Destination IP host (0.0.0.XXX) defines queue
24de3cfa2cSIntel  * Values below define offset to each field from start of frame
25de3cfa2cSIntel  */
26de3cfa2cSIntel #define SUBPORT_OFFSET	7
27de3cfa2cSIntel #define PIPE_OFFSET		9
28de3cfa2cSIntel #define QUEUE_OFFSET	20
29de3cfa2cSIntel #define COLOR_OFFSET	19
30de3cfa2cSIntel 
31de3cfa2cSIntel static inline int
get_pkt_sched(struct rte_mbuf * m,uint32_t * subport,uint32_t * pipe,uint32_t * traffic_class,uint32_t * queue,uint32_t * color)32de3cfa2cSIntel get_pkt_sched(struct rte_mbuf *m, uint32_t *subport, uint32_t *pipe,
33de3cfa2cSIntel 			uint32_t *traffic_class, uint32_t *queue, uint32_t *color)
34de3cfa2cSIntel {
35de3cfa2cSIntel 	uint16_t *pdata = rte_pktmbuf_mtod(m, uint16_t *);
36be1e5332SJasvinder Singh 	uint16_t pipe_queue;
37de3cfa2cSIntel 
38b0c1628bSJasvinder Singh 	/* Outer VLAN ID*/
39de3cfa2cSIntel 	*subport = (rte_be_to_cpu_16(pdata[SUBPORT_OFFSET]) & 0x0FFF) &
40b0c1628bSJasvinder Singh 		(port_params.n_subports_per_port - 1);
41b0c1628bSJasvinder Singh 
42b0c1628bSJasvinder Singh 	/* Inner VLAN ID */
43de3cfa2cSIntel 	*pipe = (rte_be_to_cpu_16(pdata[PIPE_OFFSET]) & 0x0FFF) &
44b0c1628bSJasvinder Singh 		(subport_params[*subport].n_pipes_per_subport_enabled - 1);
45b0c1628bSJasvinder Singh 
46be1e5332SJasvinder Singh 	pipe_queue = active_queues[(pdata[QUEUE_OFFSET] >> 8) % n_active_queues];
47b0c1628bSJasvinder Singh 
48b0c1628bSJasvinder Singh 	/* Traffic class (Destination IP) */
49be1e5332SJasvinder Singh 	*traffic_class = pipe_queue > RTE_SCHED_TRAFFIC_CLASS_BE ?
50b0c1628bSJasvinder Singh 			RTE_SCHED_TRAFFIC_CLASS_BE : pipe_queue;
51b0c1628bSJasvinder Singh 
52b0c1628bSJasvinder Singh 	/* Traffic class queue (Destination IP) */
53b0c1628bSJasvinder Singh 	*queue = pipe_queue - *traffic_class;
54b0c1628bSJasvinder Singh 
55b0c1628bSJasvinder Singh 	/* Color (Destination IP) */
56b0c1628bSJasvinder Singh 	*color = pdata[COLOR_OFFSET] & 0x03;
57de3cfa2cSIntel 
58de3cfa2cSIntel 	return 0;
59de3cfa2cSIntel }
60de3cfa2cSIntel 
61de3cfa2cSIntel void
app_rx_thread(struct thread_conf ** confs)62de3cfa2cSIntel app_rx_thread(struct thread_conf **confs)
63de3cfa2cSIntel {
64de3cfa2cSIntel 	uint32_t i, nb_rx;
65*7e06c0deSTyler Retzlaff 	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *rx_mbufs[burst_conf.rx_burst];
66de3cfa2cSIntel 	struct thread_conf *conf;
67de3cfa2cSIntel 	int conf_idx = 0;
68de3cfa2cSIntel 
69de3cfa2cSIntel 	uint32_t subport;
70de3cfa2cSIntel 	uint32_t pipe;
71de3cfa2cSIntel 	uint32_t traffic_class;
72de3cfa2cSIntel 	uint32_t queue;
73de3cfa2cSIntel 	uint32_t color;
74de3cfa2cSIntel 
75de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
76de3cfa2cSIntel 		nb_rx = rte_eth_rx_burst(conf->rx_port, conf->rx_queue, rx_mbufs,
77de3cfa2cSIntel 				burst_conf.rx_burst);
78de3cfa2cSIntel 
79de3cfa2cSIntel 		if (likely(nb_rx != 0)) {
80de3cfa2cSIntel 			APP_STATS_ADD(conf->stat.nb_rx, nb_rx);
81de3cfa2cSIntel 
82de3cfa2cSIntel 			for(i = 0; i < nb_rx; i++) {
83de3cfa2cSIntel 				get_pkt_sched(rx_mbufs[i],
84de3cfa2cSIntel 						&subport, &pipe, &traffic_class, &queue, &color);
855d3f7210SReshma Pattan 				rte_sched_port_pkt_write(conf->sched_port,
865d3f7210SReshma Pattan 						rx_mbufs[i],
875d3f7210SReshma Pattan 						subport, pipe,
885d3f7210SReshma Pattan 						traffic_class, queue,
89c1656328SJasvinder Singh 						(enum rte_color) color);
90de3cfa2cSIntel 			}
91de3cfa2cSIntel 
92de3cfa2cSIntel 			if (unlikely(rte_ring_sp_enqueue_bulk(conf->rx_ring,
9314fbffb0SBruce Richardson 					(void **)rx_mbufs, nb_rx, NULL) == 0)) {
94de3cfa2cSIntel 				for(i = 0; i < nb_rx; i++) {
95de3cfa2cSIntel 					rte_pktmbuf_free(rx_mbufs[i]);
96de3cfa2cSIntel 
97de3cfa2cSIntel 					APP_STATS_ADD(conf->stat.nb_drop, 1);
98de3cfa2cSIntel 				}
99de3cfa2cSIntel 			}
100de3cfa2cSIntel 		}
101de3cfa2cSIntel 		conf_idx++;
102de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
103de3cfa2cSIntel 			conf_idx = 0;
104de3cfa2cSIntel 	}
105de3cfa2cSIntel }
106de3cfa2cSIntel 
107de3cfa2cSIntel void
app_tx_thread(struct thread_conf ** confs)108de3cfa2cSIntel app_tx_thread(struct thread_conf **confs)
109de3cfa2cSIntel {
110de3cfa2cSIntel 	struct rte_mbuf *mbufs[burst_conf.qos_dequeue];
111de3cfa2cSIntel 	struct thread_conf *conf;
112de3cfa2cSIntel 	int conf_idx = 0;
11339b25117SBruce Richardson 	int nb_pkts;
114de3cfa2cSIntel 
115de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
11639b25117SBruce Richardson 		nb_pkts = rte_ring_sc_dequeue_burst(conf->tx_ring, (void **)mbufs,
117ecaed092SBruce Richardson 					burst_conf.qos_dequeue, NULL);
11839b25117SBruce Richardson 		if (likely(nb_pkts != 0)) {
11939b25117SBruce Richardson 			uint16_t nb_tx = rte_eth_tx_burst(conf->tx_port, 0, mbufs, nb_pkts);
12039b25117SBruce Richardson 			if (nb_pkts != nb_tx)
1216c4329c8SBruce Richardson 				rte_pktmbuf_free_bulk(&mbufs[nb_tx], nb_pkts - nb_tx);
122de3cfa2cSIntel 		}
123de3cfa2cSIntel 
124de3cfa2cSIntel 		conf_idx++;
125de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
126de3cfa2cSIntel 			conf_idx = 0;
127de3cfa2cSIntel 	}
128de3cfa2cSIntel }
129de3cfa2cSIntel 
130de3cfa2cSIntel 
131de3cfa2cSIntel void
app_worker_thread(struct thread_conf ** confs)132de3cfa2cSIntel app_worker_thread(struct thread_conf **confs)
133de3cfa2cSIntel {
134de3cfa2cSIntel 	struct rte_mbuf *mbufs[burst_conf.ring_burst];
135de3cfa2cSIntel 	struct thread_conf *conf;
136de3cfa2cSIntel 	int conf_idx = 0;
137de3cfa2cSIntel 
138de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
139de3cfa2cSIntel 		uint32_t nb_pkt;
140de3cfa2cSIntel 
141de3cfa2cSIntel 		/* Read packet from the ring */
142edabd7feSJasvinder Singh 		nb_pkt = rte_ring_sc_dequeue_burst(conf->rx_ring, (void **)mbufs,
143ecaed092SBruce Richardson 					burst_conf.ring_burst, NULL);
144edabd7feSJasvinder Singh 		if (likely(nb_pkt)) {
145de3cfa2cSIntel 			int nb_sent = rte_sched_port_enqueue(conf->sched_port, mbufs,
146edabd7feSJasvinder Singh 					nb_pkt);
147de3cfa2cSIntel 
148edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_drop, nb_pkt - nb_sent);
149edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_rx, nb_pkt);
150de3cfa2cSIntel 		}
151de3cfa2cSIntel 
152de3cfa2cSIntel 		nb_pkt = rte_sched_port_dequeue(conf->sched_port, mbufs,
153de3cfa2cSIntel 					burst_conf.qos_dequeue);
154de3cfa2cSIntel 		if (likely(nb_pkt > 0))
155cfa7c9e6SBruce Richardson 			while (rte_ring_sp_enqueue_bulk(conf->tx_ring,
15614fbffb0SBruce Richardson 					(void **)mbufs, nb_pkt, NULL) == 0)
157cfa7c9e6SBruce Richardson 				; /* empty body */
158de3cfa2cSIntel 
159de3cfa2cSIntel 		conf_idx++;
160de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
161de3cfa2cSIntel 			conf_idx = 0;
162de3cfa2cSIntel 	}
163de3cfa2cSIntel }
164de3cfa2cSIntel 
165de3cfa2cSIntel 
166de3cfa2cSIntel void
app_mixed_thread(struct thread_conf ** confs)167de3cfa2cSIntel app_mixed_thread(struct thread_conf **confs)
168de3cfa2cSIntel {
169de3cfa2cSIntel 	struct rte_mbuf *mbufs[burst_conf.ring_burst];
170de3cfa2cSIntel 	struct thread_conf *conf;
171de3cfa2cSIntel 	int conf_idx = 0;
172de3cfa2cSIntel 
173de3cfa2cSIntel 	while ((conf = confs[conf_idx])) {
174de3cfa2cSIntel 		uint32_t nb_pkt;
175de3cfa2cSIntel 
176de3cfa2cSIntel 		/* Read packet from the ring */
177edabd7feSJasvinder Singh 		nb_pkt = rte_ring_sc_dequeue_burst(conf->rx_ring, (void **)mbufs,
178ecaed092SBruce Richardson 					burst_conf.ring_burst, NULL);
179edabd7feSJasvinder Singh 		if (likely(nb_pkt)) {
180de3cfa2cSIntel 			int nb_sent = rte_sched_port_enqueue(conf->sched_port, mbufs,
181edabd7feSJasvinder Singh 					nb_pkt);
182de3cfa2cSIntel 
183edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_drop, nb_pkt - nb_sent);
184edabd7feSJasvinder Singh 			APP_STATS_ADD(conf->stat.nb_rx, nb_pkt);
185de3cfa2cSIntel 		}
186de3cfa2cSIntel 
187de3cfa2cSIntel 
188de3cfa2cSIntel 		nb_pkt = rte_sched_port_dequeue(conf->sched_port, mbufs,
189de3cfa2cSIntel 					burst_conf.qos_dequeue);
190de3cfa2cSIntel 		if (likely(nb_pkt > 0)) {
19139b25117SBruce Richardson 			uint16_t nb_tx = rte_eth_tx_burst(conf->tx_port, 0, mbufs, nb_pkt);
19239b25117SBruce Richardson 			if (nb_tx != nb_pkt)
19339b25117SBruce Richardson 				rte_pktmbuf_free_bulk(&mbufs[nb_tx], nb_pkt - nb_tx);
194de3cfa2cSIntel 		}
195de3cfa2cSIntel 
196de3cfa2cSIntel 		conf_idx++;
197de3cfa2cSIntel 		if (confs[conf_idx] == NULL)
198de3cfa2cSIntel 			conf_idx = 0;
199de3cfa2cSIntel 	}
200de3cfa2cSIntel }
201