13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 23998e2a0SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation 3af75078fSIntel */ 4af75078fSIntel 5af75078fSIntel #include <stdio.h> 6af75078fSIntel #include <stdlib.h> 7af75078fSIntel #include <stdint.h> 8af75078fSIntel #include <inttypes.h> 9af75078fSIntel #include <sys/types.h> 10af75078fSIntel #include <string.h> 11af75078fSIntel #include <sys/queue.h> 12af75078fSIntel #include <stdarg.h> 13af75078fSIntel #include <errno.h> 14af75078fSIntel #include <getopt.h> 15af75078fSIntel 16af75078fSIntel #include <rte_common.h> 17af75078fSIntel #include <rte_byteorder.h> 18af75078fSIntel #include <rte_log.h> 19af75078fSIntel #include <rte_memory.h> 20af75078fSIntel #include <rte_memcpy.h> 21af75078fSIntel #include <rte_eal.h> 22af75078fSIntel #include <rte_launch.h> 23af75078fSIntel #include <rte_atomic.h> 24af75078fSIntel #include <rte_cycles.h> 25af75078fSIntel #include <rte_prefetch.h> 26af75078fSIntel #include <rte_lcore.h> 27af75078fSIntel #include <rte_per_lcore.h> 28af75078fSIntel #include <rte_branch_prediction.h> 29af75078fSIntel #include <rte_interrupts.h> 30af75078fSIntel #include <rte_random.h> 31af75078fSIntel #include <rte_debug.h> 32af75078fSIntel #include <rte_ether.h> 33af75078fSIntel #include <rte_ethdev.h> 34af75078fSIntel #include <rte_mempool.h> 35af75078fSIntel #include <rte_mbuf.h> 36af75078fSIntel #include <rte_malloc.h> 37af75078fSIntel #include <rte_fbk_hash.h> 38af75078fSIntel #include <rte_ip.h> 39af75078fSIntel 40af75078fSIntel #define RTE_LOGTYPE_IPv4_MULTICAST RTE_LOGTYPE_USER1 41af75078fSIntel 42af75078fSIntel #define MAX_PORTS 16 43af75078fSIntel 44af75078fSIntel #define MCAST_CLONE_PORTS 2 45af75078fSIntel #define MCAST_CLONE_SEGS 2 46af75078fSIntel 47824cb29cSKonstantin Ananyev #define PKT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE 48af75078fSIntel #define NB_PKT_MBUF 8192 49af75078fSIntel 50ea0c20eaSOlivier Matz #define HDR_MBUF_DATA_SIZE (2 * RTE_PKTMBUF_HEADROOM) 51af75078fSIntel #define NB_HDR_MBUF (NB_PKT_MBUF * MAX_PORTS) 52af75078fSIntel 53af75078fSIntel #define NB_CLONE_MBUF (NB_PKT_MBUF * MCAST_CLONE_PORTS * MCAST_CLONE_SEGS * 2) 54af75078fSIntel 55af75078fSIntel /* allow max jumbo frame 9.5 KB */ 56af75078fSIntel #define JUMBO_FRAME_MAX_SIZE 0x2600 57af75078fSIntel 58af75078fSIntel #define MAX_PKT_BURST 32 595c95261dSIntel #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */ 60af75078fSIntel 61af75078fSIntel /* Configure how many packets ahead to prefetch, when reading packets */ 62af75078fSIntel #define PREFETCH_OFFSET 3 63af75078fSIntel 64af75078fSIntel /* 65af75078fSIntel * Construct Ethernet multicast address from IPv4 multicast address. 66af75078fSIntel * Citing RFC 1112, section 6.4: 67af75078fSIntel * "An IP host group address is mapped to an Ethernet multicast address 68af75078fSIntel * by placing the low-order 23-bits of the IP address into the low-order 69af75078fSIntel * 23 bits of the Ethernet multicast address 01-00-5E-00-00-00 (hex)." 70af75078fSIntel */ 71af75078fSIntel #define ETHER_ADDR_FOR_IPV4_MCAST(x) \ 72af75078fSIntel (rte_cpu_to_be_64(0x01005e000000ULL | ((x) & 0x7fffff)) >> 16) 73af75078fSIntel 74af75078fSIntel /* 75af75078fSIntel * Configurable number of RX/TX ring descriptors 76af75078fSIntel */ 77867a6c66SKevin Laatz #define RTE_TEST_RX_DESC_DEFAULT 1024 78867a6c66SKevin Laatz #define RTE_TEST_TX_DESC_DEFAULT 1024 79af75078fSIntel static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; 80af75078fSIntel static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; 81af75078fSIntel 82af75078fSIntel /* ethernet addresses of ports */ 83af75078fSIntel static struct ether_addr ports_eth_addr[MAX_PORTS]; 84af75078fSIntel 85af75078fSIntel /* mask of enabled ports */ 86af75078fSIntel static uint32_t enabled_port_mask = 0; 87af75078fSIntel 88f8244c63SZhiyong Yang static uint16_t nb_ports; 89af75078fSIntel 90af75078fSIntel static int rx_queue_per_lcore = 1; 91af75078fSIntel 92af75078fSIntel struct mbuf_table { 93af75078fSIntel uint16_t len; 94af75078fSIntel struct rte_mbuf *m_table[MAX_PKT_BURST]; 95af75078fSIntel }; 96af75078fSIntel 97af75078fSIntel #define MAX_RX_QUEUE_PER_LCORE 16 98af75078fSIntel #define MAX_TX_QUEUE_PER_PORT 16 99af75078fSIntel struct lcore_queue_conf { 100af75078fSIntel uint64_t tx_tsc; 101af75078fSIntel uint16_t n_rx_queue; 102af75078fSIntel uint8_t rx_queue_list[MAX_RX_QUEUE_PER_LCORE]; 103af75078fSIntel uint16_t tx_queue_id[MAX_PORTS]; 104af75078fSIntel struct mbuf_table tx_mbufs[MAX_PORTS]; 105af75078fSIntel } __rte_cache_aligned; 106af75078fSIntel static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE]; 107af75078fSIntel 1085e470a66SAndriy Berestovskyy static struct rte_eth_conf port_conf = { 109af75078fSIntel .rxmode = { 110af75078fSIntel .max_rx_pkt_len = JUMBO_FRAME_MAX_SIZE, 111af75078fSIntel .split_hdr_size = 0, 1126b85f708SShahaf Shuler .ignore_offload_bitfield = 1, 1136b85f708SShahaf Shuler .offloads = (DEV_RX_OFFLOAD_JUMBO_FRAME | 1146b85f708SShahaf Shuler DEV_RX_OFFLOAD_CRC_STRIP), 115af75078fSIntel }, 116af75078fSIntel .txmode = { 11732e7aa0bSIntel .mq_mode = ETH_MQ_TX_NONE, 1186b85f708SShahaf Shuler .offloads = DEV_TX_OFFLOAD_MULTI_SEGS, 119af75078fSIntel }, 120af75078fSIntel }; 121af75078fSIntel 122af75078fSIntel static struct rte_mempool *packet_pool, *header_pool, *clone_pool; 123af75078fSIntel 124af75078fSIntel 125af75078fSIntel /* Multicast */ 126af75078fSIntel static struct rte_fbk_hash_params mcast_hash_params = { 127af75078fSIntel .name = "MCAST_HASH", 128af75078fSIntel .entries = 1024, 129af75078fSIntel .entries_per_bucket = 4, 130e60f71ebSIntel .socket_id = 0, 131af75078fSIntel .hash_func = NULL, 132af75078fSIntel .init_val = 0, 133af75078fSIntel }; 134af75078fSIntel 135af75078fSIntel struct rte_fbk_hash_table *mcast_hash = NULL; 136af75078fSIntel 137af75078fSIntel struct mcast_group_params { 138af75078fSIntel uint32_t ip; 139af75078fSIntel uint16_t port_mask; 140af75078fSIntel }; 141af75078fSIntel 142af75078fSIntel static struct mcast_group_params mcast_group_table[] = { 143af75078fSIntel {IPv4(224,0,0,101), 0x1}, 144af75078fSIntel {IPv4(224,0,0,102), 0x2}, 145af75078fSIntel {IPv4(224,0,0,103), 0x3}, 146af75078fSIntel {IPv4(224,0,0,104), 0x4}, 147af75078fSIntel {IPv4(224,0,0,105), 0x5}, 148af75078fSIntel {IPv4(224,0,0,106), 0x6}, 149af75078fSIntel {IPv4(224,0,0,107), 0x7}, 150af75078fSIntel {IPv4(224,0,0,108), 0x8}, 151af75078fSIntel {IPv4(224,0,0,109), 0x9}, 152af75078fSIntel {IPv4(224,0,0,110), 0xA}, 153af75078fSIntel {IPv4(224,0,0,111), 0xB}, 154af75078fSIntel {IPv4(224,0,0,112), 0xC}, 155af75078fSIntel {IPv4(224,0,0,113), 0xD}, 156af75078fSIntel {IPv4(224,0,0,114), 0xE}, 157af75078fSIntel {IPv4(224,0,0,115), 0xF}, 158af75078fSIntel }; 159af75078fSIntel 160af75078fSIntel #define N_MCAST_GROUPS \ 161af75078fSIntel (sizeof (mcast_group_table) / sizeof (mcast_group_table[0])) 162af75078fSIntel 163af75078fSIntel 164af75078fSIntel /* Send burst of packets on an output interface */ 165af75078fSIntel static void 166f8244c63SZhiyong Yang send_burst(struct lcore_queue_conf *qconf, uint16_t port) 167af75078fSIntel { 168af75078fSIntel struct rte_mbuf **m_table; 169af75078fSIntel uint16_t n, queueid; 170af75078fSIntel int ret; 171af75078fSIntel 172af75078fSIntel queueid = qconf->tx_queue_id[port]; 173af75078fSIntel m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table; 174af75078fSIntel n = qconf->tx_mbufs[port].len; 175af75078fSIntel 176af75078fSIntel ret = rte_eth_tx_burst(port, queueid, m_table, n); 177af75078fSIntel while (unlikely (ret < n)) { 178af75078fSIntel rte_pktmbuf_free(m_table[ret]); 179af75078fSIntel ret++; 180af75078fSIntel } 181af75078fSIntel 182af75078fSIntel qconf->tx_mbufs[port].len = 0; 183af75078fSIntel } 184af75078fSIntel 185af75078fSIntel /* Get number of bits set. */ 186af75078fSIntel static inline uint32_t 187af75078fSIntel bitcnt(uint32_t v) 188af75078fSIntel { 189af75078fSIntel uint32_t n; 190af75078fSIntel 191af75078fSIntel for (n = 0; v != 0; v &= v - 1, n++) 192af75078fSIntel ; 193af75078fSIntel 194693f715dSHuawei Xie return n; 195af75078fSIntel } 196af75078fSIntel 197af75078fSIntel /** 198af75078fSIntel * Create the output multicast packet based on the given input packet. 199af75078fSIntel * There are two approaches for creating outgoing packet, though both 200af75078fSIntel * are based on data zero-copy idea, they differ in few details: 201af75078fSIntel * First one creates a clone of the input packet, e.g - walk though all 202af75078fSIntel * segments of the input packet, and for each of them create a new packet 203af75078fSIntel * mbuf and attach that new mbuf to the segment (refer to rte_pktmbuf_clone() 204af75078fSIntel * for more details). Then new mbuf is allocated for the packet header 205af75078fSIntel * and is prepended to the 'clone' mbuf. 206af75078fSIntel * Second approach doesn't make a clone, it just increment refcnt for all 207af75078fSIntel * input packet segments. Then it allocates new mbuf for the packet header 208af75078fSIntel * and prepends it to the input packet. 209af75078fSIntel * Basically first approach reuses only input packet's data, but creates 210af75078fSIntel * it's own copy of packet's metadata. Second approach reuses both input's 211af75078fSIntel * packet data and metadata. 212af75078fSIntel * The advantage of first approach - is that each outgoing packet has it's 213af75078fSIntel * own copy of metadata, so we can safely modify data pointer of the 214af75078fSIntel * input packet. That allows us to skip creation if the output packet for 215af75078fSIntel * the last destination port, but instead modify input packet's header inplace, 216af75078fSIntel * e.g: for N destination ports we need to invoke mcast_out_pkt (N-1) times. 217af75078fSIntel * The advantage of second approach - less work for each outgoing packet, 218af75078fSIntel * e.g: we skip "clone" operation completely. Though it comes with a price - 219af75078fSIntel * input packet's metadata has to be intact. So for N destination ports we 220af75078fSIntel * need to invoke mcast_out_pkt N times. 221af75078fSIntel * So for small number of outgoing ports (and segments in the input packet) 222af75078fSIntel * first approach will be faster. 223af75078fSIntel * As number of outgoing ports (and/or input segments) will grow, 224af75078fSIntel * second way will become more preferable. 225af75078fSIntel * 226af75078fSIntel * @param pkt 227af75078fSIntel * Input packet mbuf. 228af75078fSIntel * @param use_clone 229af75078fSIntel * Control which of the two approaches described above should be used: 230af75078fSIntel * - 0 - use second approach: 231af75078fSIntel * Don't "clone" input packet. 232af75078fSIntel * Prepend new header directly to the input packet 233af75078fSIntel * - 1 - use first approach: 234af75078fSIntel * Make a "clone" of input packet first. 235af75078fSIntel * Prepend new header to the clone of the input packet 236af75078fSIntel * @return 237af75078fSIntel * - The pointer to the new outgoing packet. 238af75078fSIntel * - NULL if operation failed. 239af75078fSIntel */ 240af75078fSIntel static inline struct rte_mbuf * 241af75078fSIntel mcast_out_pkt(struct rte_mbuf *pkt, int use_clone) 242af75078fSIntel { 243af75078fSIntel struct rte_mbuf *hdr; 244af75078fSIntel 245af75078fSIntel /* Create new mbuf for the header. */ 246af75078fSIntel if (unlikely ((hdr = rte_pktmbuf_alloc(header_pool)) == NULL)) 247693f715dSHuawei Xie return NULL; 248af75078fSIntel 249af75078fSIntel /* If requested, then make a new clone packet. */ 250af75078fSIntel if (use_clone != 0 && 251af75078fSIntel unlikely ((pkt = rte_pktmbuf_clone(pkt, clone_pool)) == NULL)) { 252af75078fSIntel rte_pktmbuf_free(hdr); 253693f715dSHuawei Xie return NULL; 254af75078fSIntel } 255af75078fSIntel 256af75078fSIntel /* prepend new header */ 257ea672a8bSOlivier Matz hdr->next = pkt; 258af75078fSIntel 259af75078fSIntel 260af75078fSIntel /* update header's fields */ 261ea672a8bSOlivier Matz hdr->pkt_len = (uint16_t)(hdr->data_len + pkt->pkt_len); 2624c20622aSIlya V. Matveychikov hdr->nb_segs = pkt->nb_segs + 1; 263af75078fSIntel 264af75078fSIntel /* copy metadata from source packet*/ 265ca04aaeaSBruce Richardson hdr->port = pkt->port; 2667869536fSBruce Richardson hdr->vlan_tci = pkt->vlan_tci; 2671e685446SHelin Zhang hdr->vlan_tci_outer = pkt->vlan_tci_outer; 2684199fdeaSOlivier Matz hdr->tx_offload = pkt->tx_offload; 269ea672a8bSOlivier Matz hdr->hash = pkt->hash; 270af75078fSIntel 271af75078fSIntel hdr->ol_flags = pkt->ol_flags; 272af75078fSIntel 2739aaccf1aSOlivier Matz __rte_mbuf_sanity_check(hdr, 1); 274693f715dSHuawei Xie return hdr; 275af75078fSIntel } 276af75078fSIntel 277af75078fSIntel /* 278af75078fSIntel * Write new Ethernet header to the outgoing packet, 279af75078fSIntel * and put it into the outgoing queue for the given port. 280af75078fSIntel */ 281af75078fSIntel static inline void 282af75078fSIntel mcast_send_pkt(struct rte_mbuf *pkt, struct ether_addr *dest_addr, 283f8244c63SZhiyong Yang struct lcore_queue_conf *qconf, uint16_t port) 284af75078fSIntel { 285af75078fSIntel struct ether_hdr *ethdr; 286af75078fSIntel uint16_t len; 287af75078fSIntel 288af75078fSIntel /* Construct Ethernet header. */ 289af75078fSIntel ethdr = (struct ether_hdr *)rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(*ethdr)); 29050705e8eSThomas Monjalon RTE_ASSERT(ethdr != NULL); 291af75078fSIntel 292af75078fSIntel ether_addr_copy(dest_addr, ðdr->d_addr); 293af75078fSIntel ether_addr_copy(&ports_eth_addr[port], ðdr->s_addr); 294af75078fSIntel ethdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv4); 295af75078fSIntel 296af75078fSIntel /* Put new packet into the output queue */ 297af75078fSIntel len = qconf->tx_mbufs[port].len; 298af75078fSIntel qconf->tx_mbufs[port].m_table[len] = pkt; 299af75078fSIntel qconf->tx_mbufs[port].len = ++len; 300af75078fSIntel 301af75078fSIntel /* Transmit packets */ 302af75078fSIntel if (unlikely(MAX_PKT_BURST == len)) 303af75078fSIntel send_burst(qconf, port); 304af75078fSIntel } 305af75078fSIntel 306af75078fSIntel /* Multicast forward of the input packet */ 307af75078fSIntel static inline void 308af75078fSIntel mcast_forward(struct rte_mbuf *m, struct lcore_queue_conf *qconf) 309af75078fSIntel { 310af75078fSIntel struct rte_mbuf *mc; 311af75078fSIntel struct ipv4_hdr *iphdr; 312af75078fSIntel uint32_t dest_addr, port_mask, port_num, use_clone; 313af75078fSIntel int32_t hash; 314f8244c63SZhiyong Yang uint16_t port; 315af75078fSIntel union { 316af75078fSIntel uint64_t as_int; 317af75078fSIntel struct ether_addr as_addr; 318af75078fSIntel } dst_eth_addr; 319af75078fSIntel 320af75078fSIntel /* Remove the Ethernet header from the input packet */ 321af75078fSIntel iphdr = (struct ipv4_hdr *)rte_pktmbuf_adj(m, (uint16_t)sizeof(struct ether_hdr)); 32250705e8eSThomas Monjalon RTE_ASSERT(iphdr != NULL); 323af75078fSIntel 324af75078fSIntel dest_addr = rte_be_to_cpu_32(iphdr->dst_addr); 325af75078fSIntel 326af75078fSIntel /* 327af75078fSIntel * Check that it is a valid multicast address and 328af75078fSIntel * we have some active ports assigned to it. 329af75078fSIntel */ 330af75078fSIntel if(!IS_IPV4_MCAST(dest_addr) || 331af75078fSIntel (hash = rte_fbk_hash_lookup(mcast_hash, dest_addr)) <= 0 || 332af75078fSIntel (port_mask = hash & enabled_port_mask) == 0) { 333af75078fSIntel rte_pktmbuf_free(m); 334af75078fSIntel return; 335af75078fSIntel } 336af75078fSIntel 337af75078fSIntel /* Calculate number of destination ports. */ 338af75078fSIntel port_num = bitcnt(port_mask); 339af75078fSIntel 340af75078fSIntel /* Should we use rte_pktmbuf_clone() or not. */ 341af75078fSIntel use_clone = (port_num <= MCAST_CLONE_PORTS && 342ea672a8bSOlivier Matz m->nb_segs <= MCAST_CLONE_SEGS); 343af75078fSIntel 344af75078fSIntel /* Mark all packet's segments as referenced port_num times */ 345af75078fSIntel if (use_clone == 0) 346af75078fSIntel rte_pktmbuf_refcnt_update(m, (uint16_t)port_num); 347af75078fSIntel 348af75078fSIntel /* construct destination ethernet address */ 349af75078fSIntel dst_eth_addr.as_int = ETHER_ADDR_FOR_IPV4_MCAST(dest_addr); 350af75078fSIntel 351af75078fSIntel for (port = 0; use_clone != port_mask; port_mask >>= 1, port++) { 352af75078fSIntel 353af75078fSIntel /* Prepare output packet and send it out. */ 354af75078fSIntel if ((port_mask & 1) != 0) { 355af75078fSIntel if (likely ((mc = mcast_out_pkt(m, use_clone)) != NULL)) 356af75078fSIntel mcast_send_pkt(mc, &dst_eth_addr.as_addr, 357af75078fSIntel qconf, port); 358af75078fSIntel else if (use_clone == 0) 359af75078fSIntel rte_pktmbuf_free(m); 360af75078fSIntel } 361af75078fSIntel } 362af75078fSIntel 363af75078fSIntel /* 364af75078fSIntel * If we making clone packets, then, for the last destination port, 365af75078fSIntel * we can overwrite input packet's metadata. 366af75078fSIntel */ 367af75078fSIntel if (use_clone != 0) 368af75078fSIntel mcast_send_pkt(m, &dst_eth_addr.as_addr, qconf, port); 369af75078fSIntel else 370af75078fSIntel rte_pktmbuf_free(m); 371af75078fSIntel } 372af75078fSIntel 373af75078fSIntel /* Send burst of outgoing packet, if timeout expires. */ 374af75078fSIntel static inline void 375af75078fSIntel send_timeout_burst(struct lcore_queue_conf *qconf) 376af75078fSIntel { 377af75078fSIntel uint64_t cur_tsc; 378f8244c63SZhiyong Yang uint16_t portid; 3795c95261dSIntel const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; 380af75078fSIntel 381af75078fSIntel cur_tsc = rte_rdtsc(); 3825c95261dSIntel if (likely (cur_tsc < qconf->tx_tsc + drain_tsc)) 383af75078fSIntel return; 384af75078fSIntel 385af75078fSIntel for (portid = 0; portid < MAX_PORTS; portid++) { 386af75078fSIntel if (qconf->tx_mbufs[portid].len != 0) 387af75078fSIntel send_burst(qconf, portid); 388af75078fSIntel } 389af75078fSIntel qconf->tx_tsc = cur_tsc; 390af75078fSIntel } 391af75078fSIntel 392af75078fSIntel /* main processing loop */ 393cdfd5dbbSIntel static int 394af75078fSIntel main_loop(__rte_unused void *dummy) 395af75078fSIntel { 396af75078fSIntel struct rte_mbuf *pkts_burst[MAX_PKT_BURST]; 3976441b9f6SIntel unsigned lcore_id; 398af75078fSIntel int i, j, nb_rx; 399f8244c63SZhiyong Yang uint16_t portid; 400af75078fSIntel struct lcore_queue_conf *qconf; 401af75078fSIntel 402af75078fSIntel lcore_id = rte_lcore_id(); 403af75078fSIntel qconf = &lcore_queue_conf[lcore_id]; 404af75078fSIntel 405af75078fSIntel 406af75078fSIntel if (qconf->n_rx_queue == 0) { 407af75078fSIntel RTE_LOG(INFO, IPv4_MULTICAST, "lcore %u has nothing to do\n", 408af75078fSIntel lcore_id); 409cdfd5dbbSIntel return 0; 410af75078fSIntel } 411af75078fSIntel 412af75078fSIntel RTE_LOG(INFO, IPv4_MULTICAST, "entering main loop on lcore %u\n", 413af75078fSIntel lcore_id); 414af75078fSIntel 415af75078fSIntel for (i = 0; i < qconf->n_rx_queue; i++) { 416af75078fSIntel 417af75078fSIntel portid = qconf->rx_queue_list[i]; 418af75078fSIntel RTE_LOG(INFO, IPv4_MULTICAST, " -- lcoreid=%u portid=%d\n", 419f8244c63SZhiyong Yang lcore_id, portid); 420af75078fSIntel } 421af75078fSIntel 422af75078fSIntel while (1) { 423af75078fSIntel 424af75078fSIntel /* 425af75078fSIntel * Read packet from RX queues 426af75078fSIntel */ 427af75078fSIntel for (i = 0; i < qconf->n_rx_queue; i++) { 428af75078fSIntel 429af75078fSIntel portid = qconf->rx_queue_list[i]; 430af75078fSIntel nb_rx = rte_eth_rx_burst(portid, 0, pkts_burst, 431af75078fSIntel MAX_PKT_BURST); 432af75078fSIntel 433af75078fSIntel /* Prefetch first packets */ 434af75078fSIntel for (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++) { 435af75078fSIntel rte_prefetch0(rte_pktmbuf_mtod( 436af75078fSIntel pkts_burst[j], void *)); 437af75078fSIntel } 438af75078fSIntel 439af75078fSIntel /* Prefetch and forward already prefetched packets */ 440af75078fSIntel for (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) { 441af75078fSIntel rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[ 442af75078fSIntel j + PREFETCH_OFFSET], void *)); 443af75078fSIntel mcast_forward(pkts_burst[j], qconf); 444af75078fSIntel } 445af75078fSIntel 446af75078fSIntel /* Forward remaining prefetched packets */ 447af75078fSIntel for (; j < nb_rx; j++) { 448af75078fSIntel mcast_forward(pkts_burst[j], qconf); 449af75078fSIntel } 450af75078fSIntel } 451af75078fSIntel 452af75078fSIntel /* Send out packets from TX queues */ 453af75078fSIntel send_timeout_burst(qconf); 454af75078fSIntel } 455af75078fSIntel } 456af75078fSIntel 457af75078fSIntel /* display usage */ 458af75078fSIntel static void 459af75078fSIntel print_usage(const char *prgname) 460af75078fSIntel { 461af75078fSIntel printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n" 462af75078fSIntel " -p PORTMASK: hexadecimal bitmask of ports to configure\n" 463af75078fSIntel " -q NQ: number of queue (=ports) per lcore (default is 1)\n", 464af75078fSIntel prgname); 465af75078fSIntel } 466af75078fSIntel 467af75078fSIntel static uint32_t 468af75078fSIntel parse_portmask(const char *portmask) 469af75078fSIntel { 470af75078fSIntel char *end = NULL; 471af75078fSIntel unsigned long pm; 472af75078fSIntel 473af75078fSIntel /* parse hexadecimal string */ 474af75078fSIntel pm = strtoul(portmask, &end, 16); 475af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 476af75078fSIntel return 0; 477af75078fSIntel 478693f715dSHuawei Xie return (uint32_t)pm; 479af75078fSIntel } 480af75078fSIntel 481af75078fSIntel static int 482af75078fSIntel parse_nqueue(const char *q_arg) 483af75078fSIntel { 484af75078fSIntel char *end = NULL; 485af75078fSIntel unsigned long n; 486af75078fSIntel 487af75078fSIntel /* parse numerical string */ 488af75078fSIntel errno = 0; 489af75078fSIntel n = strtoul(q_arg, &end, 0); 490af75078fSIntel if (errno != 0 || end == NULL || *end != '\0' || 491af75078fSIntel n == 0 || n >= MAX_RX_QUEUE_PER_LCORE) 492693f715dSHuawei Xie return -1; 493af75078fSIntel 494693f715dSHuawei Xie return n; 495af75078fSIntel } 496af75078fSIntel 497af75078fSIntel /* Parse the argument given in the command line of the application */ 498af75078fSIntel static int 499af75078fSIntel parse_args(int argc, char **argv) 500af75078fSIntel { 501af75078fSIntel int opt, ret; 502af75078fSIntel char **argvopt; 503af75078fSIntel int option_index; 504af75078fSIntel char *prgname = argv[0]; 505af75078fSIntel static struct option lgopts[] = { 506af75078fSIntel {NULL, 0, 0, 0} 507af75078fSIntel }; 508af75078fSIntel 509af75078fSIntel argvopt = argv; 510af75078fSIntel 511af75078fSIntel while ((opt = getopt_long(argc, argvopt, "p:q:", 512af75078fSIntel lgopts, &option_index)) != EOF) { 513af75078fSIntel 514af75078fSIntel switch (opt) { 515af75078fSIntel /* portmask */ 516af75078fSIntel case 'p': 517af75078fSIntel enabled_port_mask = parse_portmask(optarg); 518af75078fSIntel if (enabled_port_mask == 0) { 519af75078fSIntel printf("invalid portmask\n"); 520af75078fSIntel print_usage(prgname); 521af75078fSIntel return -1; 522af75078fSIntel } 523af75078fSIntel break; 524af75078fSIntel 525af75078fSIntel /* nqueue */ 526af75078fSIntel case 'q': 527af75078fSIntel rx_queue_per_lcore = parse_nqueue(optarg); 528af75078fSIntel if (rx_queue_per_lcore < 0) { 529af75078fSIntel printf("invalid queue number\n"); 530af75078fSIntel print_usage(prgname); 531af75078fSIntel return -1; 532af75078fSIntel } 533af75078fSIntel break; 534af75078fSIntel 535af75078fSIntel default: 536af75078fSIntel print_usage(prgname); 537af75078fSIntel return -1; 538af75078fSIntel } 539af75078fSIntel } 540af75078fSIntel 541af75078fSIntel if (optind >= 0) 542af75078fSIntel argv[optind-1] = prgname; 543af75078fSIntel 544af75078fSIntel ret = optind-1; 5459d5ca532SKeith Wiles optind = 1; /* reset getopt lib */ 546af75078fSIntel return ret; 547af75078fSIntel } 548af75078fSIntel 549af75078fSIntel static void 550af75078fSIntel print_ethaddr(const char *name, struct ether_addr *eth_addr) 551af75078fSIntel { 552ec3d82dbSCunming Liang char buf[ETHER_ADDR_FMT_SIZE]; 553ec3d82dbSCunming Liang ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr); 554ec3d82dbSCunming Liang printf("%s%s", name, buf); 555af75078fSIntel } 556af75078fSIntel 557af75078fSIntel static int 558af75078fSIntel init_mcast_hash(void) 559af75078fSIntel { 560af75078fSIntel uint32_t i; 561af75078fSIntel 562e60f71ebSIntel mcast_hash_params.socket_id = rte_socket_id(); 563af75078fSIntel mcast_hash = rte_fbk_hash_create(&mcast_hash_params); 564af75078fSIntel if (mcast_hash == NULL){ 565af75078fSIntel return -1; 566af75078fSIntel } 567af75078fSIntel 568af75078fSIntel for (i = 0; i < N_MCAST_GROUPS; i ++){ 569af75078fSIntel if (rte_fbk_hash_add_key(mcast_hash, 570af75078fSIntel mcast_group_table[i].ip, 571af75078fSIntel mcast_group_table[i].port_mask) < 0) { 572af75078fSIntel return -1; 573af75078fSIntel } 574af75078fSIntel } 575af75078fSIntel 576af75078fSIntel return 0; 577af75078fSIntel } 578af75078fSIntel 579d3641ae8SIntel /* Check the link status of all ports in up to 9s, and print them finally */ 580d3641ae8SIntel static void 581*8728ccf3SThomas Monjalon check_all_ports_link_status(uint32_t port_mask) 582d3641ae8SIntel { 583d3641ae8SIntel #define CHECK_INTERVAL 100 /* 100ms */ 584d3641ae8SIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ 585f8244c63SZhiyong Yang uint16_t portid; 586f8244c63SZhiyong Yang uint8_t count, all_ports_up, print_flag = 0; 587d3641ae8SIntel struct rte_eth_link link; 588d3641ae8SIntel 589d3641ae8SIntel printf("\nChecking link status"); 590d3641ae8SIntel fflush(stdout); 591d3641ae8SIntel for (count = 0; count <= MAX_CHECK_TIME; count++) { 592d3641ae8SIntel all_ports_up = 1; 593*8728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(portid) { 594d3641ae8SIntel if ((port_mask & (1 << portid)) == 0) 595d3641ae8SIntel continue; 596d3641ae8SIntel memset(&link, 0, sizeof(link)); 597d3641ae8SIntel rte_eth_link_get_nowait(portid, &link); 598d3641ae8SIntel /* print link status if flag set */ 599d3641ae8SIntel if (print_flag == 1) { 600d3641ae8SIntel if (link.link_status) 601f8244c63SZhiyong Yang printf( 602f8244c63SZhiyong Yang "Port%d Link Up. Speed %u Mbps - %s\n", 603f8244c63SZhiyong Yang portid, link.link_speed, 604d3641ae8SIntel (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 605d3641ae8SIntel ("full-duplex") : ("half-duplex\n")); 606d3641ae8SIntel else 607f8244c63SZhiyong Yang printf("Port %d Link Down\n", portid); 608d3641ae8SIntel continue; 609d3641ae8SIntel } 610d3641ae8SIntel /* clear all_ports_up flag if any link down */ 61109419f23SThomas Monjalon if (link.link_status == ETH_LINK_DOWN) { 612d3641ae8SIntel all_ports_up = 0; 613d3641ae8SIntel break; 614d3641ae8SIntel } 615d3641ae8SIntel } 616d3641ae8SIntel /* after finally printing all link status, get out */ 617d3641ae8SIntel if (print_flag == 1) 618d3641ae8SIntel break; 619d3641ae8SIntel 620d3641ae8SIntel if (all_ports_up == 0) { 621d3641ae8SIntel printf("."); 622d3641ae8SIntel fflush(stdout); 623d3641ae8SIntel rte_delay_ms(CHECK_INTERVAL); 624d3641ae8SIntel } 625d3641ae8SIntel 626d3641ae8SIntel /* set the print_flag if all ports up or timeout */ 627d3641ae8SIntel if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) { 628d3641ae8SIntel print_flag = 1; 629d3641ae8SIntel printf("done\n"); 630d3641ae8SIntel } 631d3641ae8SIntel } 632d3641ae8SIntel } 633d3641ae8SIntel 634af75078fSIntel int 63598a16481SDavid Marchand main(int argc, char **argv) 636af75078fSIntel { 637af75078fSIntel struct lcore_queue_conf *qconf; 63881f7ecd9SPablo de Lara struct rte_eth_dev_info dev_info; 63981f7ecd9SPablo de Lara struct rte_eth_txconf *txconf; 640af75078fSIntel int ret; 641af75078fSIntel uint16_t queueid; 6429787d22fSIntel unsigned lcore_id = 0, rx_lcore_id = 0; 643af75078fSIntel uint32_t n_tx_queue, nb_lcores; 644f8244c63SZhiyong Yang uint16_t portid; 645af75078fSIntel 646af75078fSIntel /* init EAL */ 647af75078fSIntel ret = rte_eal_init(argc, argv); 648af75078fSIntel if (ret < 0) 649af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n"); 650af75078fSIntel argc -= ret; 651af75078fSIntel argv += ret; 652af75078fSIntel 653af75078fSIntel /* parse application arguments (after the EAL ones) */ 654af75078fSIntel ret = parse_args(argc, argv); 655af75078fSIntel if (ret < 0) 656af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid IPV4_MULTICAST parameters\n"); 657af75078fSIntel 658af75078fSIntel /* create the mbuf pools */ 659ea0c20eaSOlivier Matz packet_pool = rte_pktmbuf_pool_create("packet_pool", NB_PKT_MBUF, 32, 660ea0c20eaSOlivier Matz 0, PKT_MBUF_DATA_SIZE, rte_socket_id()); 661af75078fSIntel 662af75078fSIntel if (packet_pool == NULL) 663af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init packet mbuf pool\n"); 664af75078fSIntel 665ea0c20eaSOlivier Matz header_pool = rte_pktmbuf_pool_create("header_pool", NB_HDR_MBUF, 32, 666ea0c20eaSOlivier Matz 0, HDR_MBUF_DATA_SIZE, rte_socket_id()); 667af75078fSIntel 668af75078fSIntel if (header_pool == NULL) 669af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init header mbuf pool\n"); 670af75078fSIntel 671ea0c20eaSOlivier Matz clone_pool = rte_pktmbuf_pool_create("clone_pool", NB_CLONE_MBUF, 32, 672ea0c20eaSOlivier Matz 0, 0, rte_socket_id()); 673af75078fSIntel 674af75078fSIntel if (clone_pool == NULL) 675af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init clone mbuf pool\n"); 676af75078fSIntel 677af75078fSIntel nb_ports = rte_eth_dev_count(); 678af75078fSIntel if (nb_ports == 0) 679af75078fSIntel rte_exit(EXIT_FAILURE, "No physical ports!\n"); 680af75078fSIntel if (nb_ports > MAX_PORTS) 681af75078fSIntel nb_ports = MAX_PORTS; 682af75078fSIntel 683af75078fSIntel nb_lcores = rte_lcore_count(); 684af75078fSIntel 685af75078fSIntel /* initialize all ports */ 686*8728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(portid) { 6876b85f708SShahaf Shuler struct rte_eth_rxconf rxq_conf; 6886b85f708SShahaf Shuler struct rte_eth_conf local_port_conf = port_conf; 6896b85f708SShahaf Shuler 690af75078fSIntel /* skip ports that are not enabled */ 691af75078fSIntel if ((enabled_port_mask & (1 << portid)) == 0) { 692af75078fSIntel printf("Skipping disabled port %d\n", portid); 693af75078fSIntel continue; 694af75078fSIntel } 695af75078fSIntel 696af75078fSIntel qconf = &lcore_queue_conf[rx_lcore_id]; 697af75078fSIntel 6985e470a66SAndriy Berestovskyy /* limit the frame size to the maximum supported by NIC */ 6995e470a66SAndriy Berestovskyy rte_eth_dev_info_get(portid, &dev_info); 7006b85f708SShahaf Shuler local_port_conf.rxmode.max_rx_pkt_len = RTE_MIN( 7016b85f708SShahaf Shuler dev_info.max_rx_pktlen, 7026b85f708SShahaf Shuler local_port_conf.rxmode.max_rx_pkt_len); 7035e470a66SAndriy Berestovskyy 704af75078fSIntel /* get the lcore_id for this port */ 705af75078fSIntel while (rte_lcore_is_enabled(rx_lcore_id) == 0 || 706af75078fSIntel qconf->n_rx_queue == (unsigned)rx_queue_per_lcore) { 707af75078fSIntel 708af75078fSIntel rx_lcore_id ++; 709af75078fSIntel qconf = &lcore_queue_conf[rx_lcore_id]; 710af75078fSIntel 711af75078fSIntel if (rx_lcore_id >= RTE_MAX_LCORE) 712af75078fSIntel rte_exit(EXIT_FAILURE, "Not enough cores\n"); 713af75078fSIntel } 714af75078fSIntel qconf->rx_queue_list[qconf->n_rx_queue] = portid; 715af75078fSIntel qconf->n_rx_queue++; 716af75078fSIntel 717af75078fSIntel /* init port */ 718af75078fSIntel printf("Initializing port %d on lcore %u... ", portid, 719af75078fSIntel rx_lcore_id); 720af75078fSIntel fflush(stdout); 721af75078fSIntel 722af75078fSIntel n_tx_queue = nb_lcores; 723af75078fSIntel if (n_tx_queue > MAX_TX_QUEUE_PER_PORT) 724af75078fSIntel n_tx_queue = MAX_TX_QUEUE_PER_PORT; 7256b85f708SShahaf Shuler 726af75078fSIntel ret = rte_eth_dev_configure(portid, 1, (uint16_t)n_tx_queue, 7276b85f708SShahaf Shuler &local_port_conf); 728af75078fSIntel if (ret < 0) 729af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%d\n", 730af75078fSIntel ret, portid); 731af75078fSIntel 73260efb44fSRoman Zhukov ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &nb_rxd, 73360efb44fSRoman Zhukov &nb_txd); 73460efb44fSRoman Zhukov if (ret < 0) 73560efb44fSRoman Zhukov rte_exit(EXIT_FAILURE, 73660efb44fSRoman Zhukov "Cannot adjust number of descriptors: err=%d, port=%d\n", 73760efb44fSRoman Zhukov ret, portid); 73860efb44fSRoman Zhukov 739af75078fSIntel rte_eth_macaddr_get(portid, &ports_eth_addr[portid]); 740af75078fSIntel print_ethaddr(" Address:", &ports_eth_addr[portid]); 741af75078fSIntel printf(", "); 742af75078fSIntel 743af75078fSIntel /* init one RX queue */ 744af75078fSIntel queueid = 0; 745af75078fSIntel printf("rxq=%hu ", queueid); 746af75078fSIntel fflush(stdout); 7476b85f708SShahaf Shuler rxq_conf = dev_info.default_rxconf; 7486b85f708SShahaf Shuler rxq_conf.offloads = local_port_conf.rxmode.offloads; 749af75078fSIntel ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd, 75081f7ecd9SPablo de Lara rte_eth_dev_socket_id(portid), 7516b85f708SShahaf Shuler &rxq_conf, 752af75078fSIntel packet_pool); 753af75078fSIntel if (ret < 0) 754af75078fSIntel rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, port=%d\n", 755af75078fSIntel ret, portid); 756af75078fSIntel 757af75078fSIntel /* init one TX queue per couple (lcore,port) */ 758af75078fSIntel queueid = 0; 759af75078fSIntel 760af75078fSIntel RTE_LCORE_FOREACH(lcore_id) { 761af75078fSIntel if (rte_lcore_is_enabled(lcore_id) == 0) 762af75078fSIntel continue; 763af75078fSIntel printf("txq=%u,%hu ", lcore_id, queueid); 764af75078fSIntel fflush(stdout); 76581f7ecd9SPablo de Lara 76681f7ecd9SPablo de Lara txconf = &dev_info.default_txconf; 7676b85f708SShahaf Shuler txconf->txq_flags = ETH_TXQ_FLAGS_IGNORE; 7686b85f708SShahaf Shuler txconf->offloads = local_port_conf.txmode.offloads; 769af75078fSIntel ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd, 77081f7ecd9SPablo de Lara rte_lcore_to_socket_id(lcore_id), txconf); 771af75078fSIntel if (ret < 0) 772af75078fSIntel rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, " 773af75078fSIntel "port=%d\n", ret, portid); 774af75078fSIntel 775af75078fSIntel qconf = &lcore_queue_conf[lcore_id]; 776af75078fSIntel qconf->tx_queue_id[portid] = queueid; 777af75078fSIntel queueid++; 778af75078fSIntel } 779af75078fSIntel 780af75078fSIntel /* Start device */ 781af75078fSIntel ret = rte_eth_dev_start(portid); 782af75078fSIntel if (ret < 0) 783af75078fSIntel rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%d\n", 784af75078fSIntel ret, portid); 785af75078fSIntel 786d3641ae8SIntel printf("done:\n"); 787af75078fSIntel } 788af75078fSIntel 789*8728ccf3SThomas Monjalon check_all_ports_link_status(enabled_port_mask); 790af75078fSIntel 791af75078fSIntel /* initialize the multicast hash */ 792af75078fSIntel int retval = init_mcast_hash(); 793af75078fSIntel if (retval != 0) 794af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot build the multicast hash\n"); 795af75078fSIntel 796af75078fSIntel /* launch per-lcore init on every lcore */ 797af75078fSIntel rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER); 798af75078fSIntel RTE_LCORE_FOREACH_SLAVE(lcore_id) { 799af75078fSIntel if (rte_eal_wait_lcore(lcore_id) < 0) 800af75078fSIntel return -1; 801af75078fSIntel } 802af75078fSIntel 803af75078fSIntel return 0; 804af75078fSIntel } 805