13998e2a0SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 23998e2a0SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation 3af75078fSIntel */ 4af75078fSIntel 5af75078fSIntel #include <stdio.h> 6af75078fSIntel #include <stdlib.h> 7af75078fSIntel #include <stdint.h> 8af75078fSIntel #include <inttypes.h> 9af75078fSIntel #include <sys/types.h> 10af75078fSIntel #include <string.h> 11af75078fSIntel #include <sys/queue.h> 12af75078fSIntel #include <stdarg.h> 13af75078fSIntel #include <errno.h> 14af75078fSIntel #include <getopt.h> 15af75078fSIntel 16af75078fSIntel #include <rte_common.h> 17af75078fSIntel #include <rte_byteorder.h> 18af75078fSIntel #include <rte_log.h> 19af75078fSIntel #include <rte_memory.h> 20af75078fSIntel #include <rte_memcpy.h> 21af75078fSIntel #include <rte_eal.h> 22af75078fSIntel #include <rte_launch.h> 23af75078fSIntel #include <rte_atomic.h> 24af75078fSIntel #include <rte_cycles.h> 25af75078fSIntel #include <rte_prefetch.h> 26af75078fSIntel #include <rte_lcore.h> 27af75078fSIntel #include <rte_per_lcore.h> 28af75078fSIntel #include <rte_branch_prediction.h> 29af75078fSIntel #include <rte_interrupts.h> 30af75078fSIntel #include <rte_random.h> 31af75078fSIntel #include <rte_debug.h> 32af75078fSIntel #include <rte_ether.h> 33af75078fSIntel #include <rte_ethdev.h> 34af75078fSIntel #include <rte_mempool.h> 35af75078fSIntel #include <rte_mbuf.h> 36af75078fSIntel #include <rte_malloc.h> 37af75078fSIntel #include <rte_fbk_hash.h> 38af75078fSIntel #include <rte_ip.h> 39af75078fSIntel 40af75078fSIntel #define RTE_LOGTYPE_IPv4_MULTICAST RTE_LOGTYPE_USER1 41af75078fSIntel 42af75078fSIntel #define MAX_PORTS 16 43af75078fSIntel 44af75078fSIntel #define MCAST_CLONE_PORTS 2 45af75078fSIntel #define MCAST_CLONE_SEGS 2 46af75078fSIntel 47824cb29cSKonstantin Ananyev #define PKT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE 48af75078fSIntel #define NB_PKT_MBUF 8192 49af75078fSIntel 50ea0c20eaSOlivier Matz #define HDR_MBUF_DATA_SIZE (2 * RTE_PKTMBUF_HEADROOM) 51af75078fSIntel #define NB_HDR_MBUF (NB_PKT_MBUF * MAX_PORTS) 52af75078fSIntel 53af75078fSIntel #define NB_CLONE_MBUF (NB_PKT_MBUF * MCAST_CLONE_PORTS * MCAST_CLONE_SEGS * 2) 54af75078fSIntel 55af75078fSIntel /* allow max jumbo frame 9.5 KB */ 56af75078fSIntel #define JUMBO_FRAME_MAX_SIZE 0x2600 57af75078fSIntel 58af75078fSIntel #define MAX_PKT_BURST 32 595c95261dSIntel #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */ 60af75078fSIntel 61af75078fSIntel /* Configure how many packets ahead to prefetch, when reading packets */ 62af75078fSIntel #define PREFETCH_OFFSET 3 63af75078fSIntel 64af75078fSIntel /* 65af75078fSIntel * Construct Ethernet multicast address from IPv4 multicast address. 66af75078fSIntel * Citing RFC 1112, section 6.4: 67af75078fSIntel * "An IP host group address is mapped to an Ethernet multicast address 68af75078fSIntel * by placing the low-order 23-bits of the IP address into the low-order 69af75078fSIntel * 23 bits of the Ethernet multicast address 01-00-5E-00-00-00 (hex)." 70af75078fSIntel */ 71af75078fSIntel #define ETHER_ADDR_FOR_IPV4_MCAST(x) \ 72af75078fSIntel (rte_cpu_to_be_64(0x01005e000000ULL | ((x) & 0x7fffff)) >> 16) 73af75078fSIntel 74af75078fSIntel /* 75af75078fSIntel * Configurable number of RX/TX ring descriptors 76af75078fSIntel */ 77867a6c66SKevin Laatz #define RTE_TEST_RX_DESC_DEFAULT 1024 78867a6c66SKevin Laatz #define RTE_TEST_TX_DESC_DEFAULT 1024 79af75078fSIntel static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; 80af75078fSIntel static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; 81af75078fSIntel 82af75078fSIntel /* ethernet addresses of ports */ 83af75078fSIntel static struct ether_addr ports_eth_addr[MAX_PORTS]; 84af75078fSIntel 85af75078fSIntel /* mask of enabled ports */ 86af75078fSIntel static uint32_t enabled_port_mask = 0; 87af75078fSIntel 88f8244c63SZhiyong Yang static uint16_t nb_ports; 89af75078fSIntel 90af75078fSIntel static int rx_queue_per_lcore = 1; 91af75078fSIntel 92af75078fSIntel struct mbuf_table { 93af75078fSIntel uint16_t len; 94af75078fSIntel struct rte_mbuf *m_table[MAX_PKT_BURST]; 95af75078fSIntel }; 96af75078fSIntel 97af75078fSIntel #define MAX_RX_QUEUE_PER_LCORE 16 98af75078fSIntel #define MAX_TX_QUEUE_PER_PORT 16 99af75078fSIntel struct lcore_queue_conf { 100af75078fSIntel uint64_t tx_tsc; 101af75078fSIntel uint16_t n_rx_queue; 102af75078fSIntel uint8_t rx_queue_list[MAX_RX_QUEUE_PER_LCORE]; 103af75078fSIntel uint16_t tx_queue_id[MAX_PORTS]; 104af75078fSIntel struct mbuf_table tx_mbufs[MAX_PORTS]; 105af75078fSIntel } __rte_cache_aligned; 106af75078fSIntel static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE]; 107af75078fSIntel 1085e470a66SAndriy Berestovskyy static struct rte_eth_conf port_conf = { 109af75078fSIntel .rxmode = { 110af75078fSIntel .max_rx_pkt_len = JUMBO_FRAME_MAX_SIZE, 111af75078fSIntel .split_hdr_size = 0, 112*323e7b66SFerruh Yigit .offloads = DEV_RX_OFFLOAD_JUMBO_FRAME, 113af75078fSIntel }, 114af75078fSIntel .txmode = { 11532e7aa0bSIntel .mq_mode = ETH_MQ_TX_NONE, 1166b85f708SShahaf Shuler .offloads = DEV_TX_OFFLOAD_MULTI_SEGS, 117af75078fSIntel }, 118af75078fSIntel }; 119af75078fSIntel 120af75078fSIntel static struct rte_mempool *packet_pool, *header_pool, *clone_pool; 121af75078fSIntel 122af75078fSIntel 123af75078fSIntel /* Multicast */ 124af75078fSIntel static struct rte_fbk_hash_params mcast_hash_params = { 125af75078fSIntel .name = "MCAST_HASH", 126af75078fSIntel .entries = 1024, 127af75078fSIntel .entries_per_bucket = 4, 128e60f71ebSIntel .socket_id = 0, 129af75078fSIntel .hash_func = NULL, 130af75078fSIntel .init_val = 0, 131af75078fSIntel }; 132af75078fSIntel 133af75078fSIntel struct rte_fbk_hash_table *mcast_hash = NULL; 134af75078fSIntel 135af75078fSIntel struct mcast_group_params { 136af75078fSIntel uint32_t ip; 137af75078fSIntel uint16_t port_mask; 138af75078fSIntel }; 139af75078fSIntel 140af75078fSIntel static struct mcast_group_params mcast_group_table[] = { 141af75078fSIntel {IPv4(224,0,0,101), 0x1}, 142af75078fSIntel {IPv4(224,0,0,102), 0x2}, 143af75078fSIntel {IPv4(224,0,0,103), 0x3}, 144af75078fSIntel {IPv4(224,0,0,104), 0x4}, 145af75078fSIntel {IPv4(224,0,0,105), 0x5}, 146af75078fSIntel {IPv4(224,0,0,106), 0x6}, 147af75078fSIntel {IPv4(224,0,0,107), 0x7}, 148af75078fSIntel {IPv4(224,0,0,108), 0x8}, 149af75078fSIntel {IPv4(224,0,0,109), 0x9}, 150af75078fSIntel {IPv4(224,0,0,110), 0xA}, 151af75078fSIntel {IPv4(224,0,0,111), 0xB}, 152af75078fSIntel {IPv4(224,0,0,112), 0xC}, 153af75078fSIntel {IPv4(224,0,0,113), 0xD}, 154af75078fSIntel {IPv4(224,0,0,114), 0xE}, 155af75078fSIntel {IPv4(224,0,0,115), 0xF}, 156af75078fSIntel }; 157af75078fSIntel 158af75078fSIntel #define N_MCAST_GROUPS \ 159af75078fSIntel (sizeof (mcast_group_table) / sizeof (mcast_group_table[0])) 160af75078fSIntel 161af75078fSIntel 162af75078fSIntel /* Send burst of packets on an output interface */ 163af75078fSIntel static void 164f8244c63SZhiyong Yang send_burst(struct lcore_queue_conf *qconf, uint16_t port) 165af75078fSIntel { 166af75078fSIntel struct rte_mbuf **m_table; 167af75078fSIntel uint16_t n, queueid; 168af75078fSIntel int ret; 169af75078fSIntel 170af75078fSIntel queueid = qconf->tx_queue_id[port]; 171af75078fSIntel m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table; 172af75078fSIntel n = qconf->tx_mbufs[port].len; 173af75078fSIntel 174af75078fSIntel ret = rte_eth_tx_burst(port, queueid, m_table, n); 175af75078fSIntel while (unlikely (ret < n)) { 176af75078fSIntel rte_pktmbuf_free(m_table[ret]); 177af75078fSIntel ret++; 178af75078fSIntel } 179af75078fSIntel 180af75078fSIntel qconf->tx_mbufs[port].len = 0; 181af75078fSIntel } 182af75078fSIntel 183af75078fSIntel /* Get number of bits set. */ 184af75078fSIntel static inline uint32_t 185af75078fSIntel bitcnt(uint32_t v) 186af75078fSIntel { 187af75078fSIntel uint32_t n; 188af75078fSIntel 189af75078fSIntel for (n = 0; v != 0; v &= v - 1, n++) 190af75078fSIntel ; 191af75078fSIntel 192693f715dSHuawei Xie return n; 193af75078fSIntel } 194af75078fSIntel 195af75078fSIntel /** 196af75078fSIntel * Create the output multicast packet based on the given input packet. 197af75078fSIntel * There are two approaches for creating outgoing packet, though both 198af75078fSIntel * are based on data zero-copy idea, they differ in few details: 199af75078fSIntel * First one creates a clone of the input packet, e.g - walk though all 200af75078fSIntel * segments of the input packet, and for each of them create a new packet 201af75078fSIntel * mbuf and attach that new mbuf to the segment (refer to rte_pktmbuf_clone() 202af75078fSIntel * for more details). Then new mbuf is allocated for the packet header 203af75078fSIntel * and is prepended to the 'clone' mbuf. 204af75078fSIntel * Second approach doesn't make a clone, it just increment refcnt for all 205af75078fSIntel * input packet segments. Then it allocates new mbuf for the packet header 206af75078fSIntel * and prepends it to the input packet. 207af75078fSIntel * Basically first approach reuses only input packet's data, but creates 208af75078fSIntel * it's own copy of packet's metadata. Second approach reuses both input's 209af75078fSIntel * packet data and metadata. 210af75078fSIntel * The advantage of first approach - is that each outgoing packet has it's 211af75078fSIntel * own copy of metadata, so we can safely modify data pointer of the 212af75078fSIntel * input packet. That allows us to skip creation if the output packet for 213af75078fSIntel * the last destination port, but instead modify input packet's header inplace, 214af75078fSIntel * e.g: for N destination ports we need to invoke mcast_out_pkt (N-1) times. 215af75078fSIntel * The advantage of second approach - less work for each outgoing packet, 216af75078fSIntel * e.g: we skip "clone" operation completely. Though it comes with a price - 217af75078fSIntel * input packet's metadata has to be intact. So for N destination ports we 218af75078fSIntel * need to invoke mcast_out_pkt N times. 219af75078fSIntel * So for small number of outgoing ports (and segments in the input packet) 220af75078fSIntel * first approach will be faster. 221af75078fSIntel * As number of outgoing ports (and/or input segments) will grow, 222af75078fSIntel * second way will become more preferable. 223af75078fSIntel * 224af75078fSIntel * @param pkt 225af75078fSIntel * Input packet mbuf. 226af75078fSIntel * @param use_clone 227af75078fSIntel * Control which of the two approaches described above should be used: 228af75078fSIntel * - 0 - use second approach: 229af75078fSIntel * Don't "clone" input packet. 230af75078fSIntel * Prepend new header directly to the input packet 231af75078fSIntel * - 1 - use first approach: 232af75078fSIntel * Make a "clone" of input packet first. 233af75078fSIntel * Prepend new header to the clone of the input packet 234af75078fSIntel * @return 235af75078fSIntel * - The pointer to the new outgoing packet. 236af75078fSIntel * - NULL if operation failed. 237af75078fSIntel */ 238af75078fSIntel static inline struct rte_mbuf * 239af75078fSIntel mcast_out_pkt(struct rte_mbuf *pkt, int use_clone) 240af75078fSIntel { 241af75078fSIntel struct rte_mbuf *hdr; 242af75078fSIntel 243af75078fSIntel /* Create new mbuf for the header. */ 244af75078fSIntel if (unlikely ((hdr = rte_pktmbuf_alloc(header_pool)) == NULL)) 245693f715dSHuawei Xie return NULL; 246af75078fSIntel 247af75078fSIntel /* If requested, then make a new clone packet. */ 248af75078fSIntel if (use_clone != 0 && 249af75078fSIntel unlikely ((pkt = rte_pktmbuf_clone(pkt, clone_pool)) == NULL)) { 250af75078fSIntel rte_pktmbuf_free(hdr); 251693f715dSHuawei Xie return NULL; 252af75078fSIntel } 253af75078fSIntel 254af75078fSIntel /* prepend new header */ 255ea672a8bSOlivier Matz hdr->next = pkt; 256af75078fSIntel 257af75078fSIntel 258af75078fSIntel /* update header's fields */ 259ea672a8bSOlivier Matz hdr->pkt_len = (uint16_t)(hdr->data_len + pkt->pkt_len); 2604c20622aSIlya V. Matveychikov hdr->nb_segs = pkt->nb_segs + 1; 261af75078fSIntel 262af75078fSIntel /* copy metadata from source packet*/ 263ca04aaeaSBruce Richardson hdr->port = pkt->port; 2647869536fSBruce Richardson hdr->vlan_tci = pkt->vlan_tci; 2651e685446SHelin Zhang hdr->vlan_tci_outer = pkt->vlan_tci_outer; 2664199fdeaSOlivier Matz hdr->tx_offload = pkt->tx_offload; 267ea672a8bSOlivier Matz hdr->hash = pkt->hash; 268af75078fSIntel 269af75078fSIntel hdr->ol_flags = pkt->ol_flags; 270af75078fSIntel 2719aaccf1aSOlivier Matz __rte_mbuf_sanity_check(hdr, 1); 272693f715dSHuawei Xie return hdr; 273af75078fSIntel } 274af75078fSIntel 275af75078fSIntel /* 276af75078fSIntel * Write new Ethernet header to the outgoing packet, 277af75078fSIntel * and put it into the outgoing queue for the given port. 278af75078fSIntel */ 279af75078fSIntel static inline void 280af75078fSIntel mcast_send_pkt(struct rte_mbuf *pkt, struct ether_addr *dest_addr, 281f8244c63SZhiyong Yang struct lcore_queue_conf *qconf, uint16_t port) 282af75078fSIntel { 283af75078fSIntel struct ether_hdr *ethdr; 284af75078fSIntel uint16_t len; 285af75078fSIntel 286af75078fSIntel /* Construct Ethernet header. */ 287af75078fSIntel ethdr = (struct ether_hdr *)rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(*ethdr)); 28850705e8eSThomas Monjalon RTE_ASSERT(ethdr != NULL); 289af75078fSIntel 290af75078fSIntel ether_addr_copy(dest_addr, ðdr->d_addr); 291af75078fSIntel ether_addr_copy(&ports_eth_addr[port], ðdr->s_addr); 292af75078fSIntel ethdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv4); 293af75078fSIntel 294af75078fSIntel /* Put new packet into the output queue */ 295af75078fSIntel len = qconf->tx_mbufs[port].len; 296af75078fSIntel qconf->tx_mbufs[port].m_table[len] = pkt; 297af75078fSIntel qconf->tx_mbufs[port].len = ++len; 298af75078fSIntel 299af75078fSIntel /* Transmit packets */ 300af75078fSIntel if (unlikely(MAX_PKT_BURST == len)) 301af75078fSIntel send_burst(qconf, port); 302af75078fSIntel } 303af75078fSIntel 304af75078fSIntel /* Multicast forward of the input packet */ 305af75078fSIntel static inline void 306af75078fSIntel mcast_forward(struct rte_mbuf *m, struct lcore_queue_conf *qconf) 307af75078fSIntel { 308af75078fSIntel struct rte_mbuf *mc; 309af75078fSIntel struct ipv4_hdr *iphdr; 310af75078fSIntel uint32_t dest_addr, port_mask, port_num, use_clone; 311af75078fSIntel int32_t hash; 312f8244c63SZhiyong Yang uint16_t port; 313af75078fSIntel union { 314af75078fSIntel uint64_t as_int; 315af75078fSIntel struct ether_addr as_addr; 316af75078fSIntel } dst_eth_addr; 317af75078fSIntel 318af75078fSIntel /* Remove the Ethernet header from the input packet */ 319af75078fSIntel iphdr = (struct ipv4_hdr *)rte_pktmbuf_adj(m, (uint16_t)sizeof(struct ether_hdr)); 32050705e8eSThomas Monjalon RTE_ASSERT(iphdr != NULL); 321af75078fSIntel 322af75078fSIntel dest_addr = rte_be_to_cpu_32(iphdr->dst_addr); 323af75078fSIntel 324af75078fSIntel /* 325af75078fSIntel * Check that it is a valid multicast address and 326af75078fSIntel * we have some active ports assigned to it. 327af75078fSIntel */ 328af75078fSIntel if(!IS_IPV4_MCAST(dest_addr) || 329af75078fSIntel (hash = rte_fbk_hash_lookup(mcast_hash, dest_addr)) <= 0 || 330af75078fSIntel (port_mask = hash & enabled_port_mask) == 0) { 331af75078fSIntel rte_pktmbuf_free(m); 332af75078fSIntel return; 333af75078fSIntel } 334af75078fSIntel 335af75078fSIntel /* Calculate number of destination ports. */ 336af75078fSIntel port_num = bitcnt(port_mask); 337af75078fSIntel 338af75078fSIntel /* Should we use rte_pktmbuf_clone() or not. */ 339af75078fSIntel use_clone = (port_num <= MCAST_CLONE_PORTS && 340ea672a8bSOlivier Matz m->nb_segs <= MCAST_CLONE_SEGS); 341af75078fSIntel 342af75078fSIntel /* Mark all packet's segments as referenced port_num times */ 343af75078fSIntel if (use_clone == 0) 344af75078fSIntel rte_pktmbuf_refcnt_update(m, (uint16_t)port_num); 345af75078fSIntel 346af75078fSIntel /* construct destination ethernet address */ 347af75078fSIntel dst_eth_addr.as_int = ETHER_ADDR_FOR_IPV4_MCAST(dest_addr); 348af75078fSIntel 349af75078fSIntel for (port = 0; use_clone != port_mask; port_mask >>= 1, port++) { 350af75078fSIntel 351af75078fSIntel /* Prepare output packet and send it out. */ 352af75078fSIntel if ((port_mask & 1) != 0) { 353af75078fSIntel if (likely ((mc = mcast_out_pkt(m, use_clone)) != NULL)) 354af75078fSIntel mcast_send_pkt(mc, &dst_eth_addr.as_addr, 355af75078fSIntel qconf, port); 356af75078fSIntel else if (use_clone == 0) 357af75078fSIntel rte_pktmbuf_free(m); 358af75078fSIntel } 359af75078fSIntel } 360af75078fSIntel 361af75078fSIntel /* 362af75078fSIntel * If we making clone packets, then, for the last destination port, 363af75078fSIntel * we can overwrite input packet's metadata. 364af75078fSIntel */ 365af75078fSIntel if (use_clone != 0) 366af75078fSIntel mcast_send_pkt(m, &dst_eth_addr.as_addr, qconf, port); 367af75078fSIntel else 368af75078fSIntel rte_pktmbuf_free(m); 369af75078fSIntel } 370af75078fSIntel 371af75078fSIntel /* Send burst of outgoing packet, if timeout expires. */ 372af75078fSIntel static inline void 373af75078fSIntel send_timeout_burst(struct lcore_queue_conf *qconf) 374af75078fSIntel { 375af75078fSIntel uint64_t cur_tsc; 376f8244c63SZhiyong Yang uint16_t portid; 3775c95261dSIntel const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; 378af75078fSIntel 379af75078fSIntel cur_tsc = rte_rdtsc(); 3805c95261dSIntel if (likely (cur_tsc < qconf->tx_tsc + drain_tsc)) 381af75078fSIntel return; 382af75078fSIntel 383af75078fSIntel for (portid = 0; portid < MAX_PORTS; portid++) { 384af75078fSIntel if (qconf->tx_mbufs[portid].len != 0) 385af75078fSIntel send_burst(qconf, portid); 386af75078fSIntel } 387af75078fSIntel qconf->tx_tsc = cur_tsc; 388af75078fSIntel } 389af75078fSIntel 390af75078fSIntel /* main processing loop */ 391cdfd5dbbSIntel static int 392af75078fSIntel main_loop(__rte_unused void *dummy) 393af75078fSIntel { 394af75078fSIntel struct rte_mbuf *pkts_burst[MAX_PKT_BURST]; 3956441b9f6SIntel unsigned lcore_id; 396af75078fSIntel int i, j, nb_rx; 397f8244c63SZhiyong Yang uint16_t portid; 398af75078fSIntel struct lcore_queue_conf *qconf; 399af75078fSIntel 400af75078fSIntel lcore_id = rte_lcore_id(); 401af75078fSIntel qconf = &lcore_queue_conf[lcore_id]; 402af75078fSIntel 403af75078fSIntel 404af75078fSIntel if (qconf->n_rx_queue == 0) { 405af75078fSIntel RTE_LOG(INFO, IPv4_MULTICAST, "lcore %u has nothing to do\n", 406af75078fSIntel lcore_id); 407cdfd5dbbSIntel return 0; 408af75078fSIntel } 409af75078fSIntel 410af75078fSIntel RTE_LOG(INFO, IPv4_MULTICAST, "entering main loop on lcore %u\n", 411af75078fSIntel lcore_id); 412af75078fSIntel 413af75078fSIntel for (i = 0; i < qconf->n_rx_queue; i++) { 414af75078fSIntel 415af75078fSIntel portid = qconf->rx_queue_list[i]; 416af75078fSIntel RTE_LOG(INFO, IPv4_MULTICAST, " -- lcoreid=%u portid=%d\n", 417f8244c63SZhiyong Yang lcore_id, portid); 418af75078fSIntel } 419af75078fSIntel 420af75078fSIntel while (1) { 421af75078fSIntel 422af75078fSIntel /* 423af75078fSIntel * Read packet from RX queues 424af75078fSIntel */ 425af75078fSIntel for (i = 0; i < qconf->n_rx_queue; i++) { 426af75078fSIntel 427af75078fSIntel portid = qconf->rx_queue_list[i]; 428af75078fSIntel nb_rx = rte_eth_rx_burst(portid, 0, pkts_burst, 429af75078fSIntel MAX_PKT_BURST); 430af75078fSIntel 431af75078fSIntel /* Prefetch first packets */ 432af75078fSIntel for (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++) { 433af75078fSIntel rte_prefetch0(rte_pktmbuf_mtod( 434af75078fSIntel pkts_burst[j], void *)); 435af75078fSIntel } 436af75078fSIntel 437af75078fSIntel /* Prefetch and forward already prefetched packets */ 438af75078fSIntel for (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) { 439af75078fSIntel rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[ 440af75078fSIntel j + PREFETCH_OFFSET], void *)); 441af75078fSIntel mcast_forward(pkts_burst[j], qconf); 442af75078fSIntel } 443af75078fSIntel 444af75078fSIntel /* Forward remaining prefetched packets */ 445af75078fSIntel for (; j < nb_rx; j++) { 446af75078fSIntel mcast_forward(pkts_burst[j], qconf); 447af75078fSIntel } 448af75078fSIntel } 449af75078fSIntel 450af75078fSIntel /* Send out packets from TX queues */ 451af75078fSIntel send_timeout_burst(qconf); 452af75078fSIntel } 453af75078fSIntel } 454af75078fSIntel 455af75078fSIntel /* display usage */ 456af75078fSIntel static void 457af75078fSIntel print_usage(const char *prgname) 458af75078fSIntel { 459af75078fSIntel printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n" 460af75078fSIntel " -p PORTMASK: hexadecimal bitmask of ports to configure\n" 461af75078fSIntel " -q NQ: number of queue (=ports) per lcore (default is 1)\n", 462af75078fSIntel prgname); 463af75078fSIntel } 464af75078fSIntel 465af75078fSIntel static uint32_t 466af75078fSIntel parse_portmask(const char *portmask) 467af75078fSIntel { 468af75078fSIntel char *end = NULL; 469af75078fSIntel unsigned long pm; 470af75078fSIntel 471af75078fSIntel /* parse hexadecimal string */ 472af75078fSIntel pm = strtoul(portmask, &end, 16); 473af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 474af75078fSIntel return 0; 475af75078fSIntel 476693f715dSHuawei Xie return (uint32_t)pm; 477af75078fSIntel } 478af75078fSIntel 479af75078fSIntel static int 480af75078fSIntel parse_nqueue(const char *q_arg) 481af75078fSIntel { 482af75078fSIntel char *end = NULL; 483af75078fSIntel unsigned long n; 484af75078fSIntel 485af75078fSIntel /* parse numerical string */ 486af75078fSIntel errno = 0; 487af75078fSIntel n = strtoul(q_arg, &end, 0); 488af75078fSIntel if (errno != 0 || end == NULL || *end != '\0' || 489af75078fSIntel n == 0 || n >= MAX_RX_QUEUE_PER_LCORE) 490693f715dSHuawei Xie return -1; 491af75078fSIntel 492693f715dSHuawei Xie return n; 493af75078fSIntel } 494af75078fSIntel 495af75078fSIntel /* Parse the argument given in the command line of the application */ 496af75078fSIntel static int 497af75078fSIntel parse_args(int argc, char **argv) 498af75078fSIntel { 499af75078fSIntel int opt, ret; 500af75078fSIntel char **argvopt; 501af75078fSIntel int option_index; 502af75078fSIntel char *prgname = argv[0]; 503af75078fSIntel static struct option lgopts[] = { 504af75078fSIntel {NULL, 0, 0, 0} 505af75078fSIntel }; 506af75078fSIntel 507af75078fSIntel argvopt = argv; 508af75078fSIntel 509af75078fSIntel while ((opt = getopt_long(argc, argvopt, "p:q:", 510af75078fSIntel lgopts, &option_index)) != EOF) { 511af75078fSIntel 512af75078fSIntel switch (opt) { 513af75078fSIntel /* portmask */ 514af75078fSIntel case 'p': 515af75078fSIntel enabled_port_mask = parse_portmask(optarg); 516af75078fSIntel if (enabled_port_mask == 0) { 517af75078fSIntel printf("invalid portmask\n"); 518af75078fSIntel print_usage(prgname); 519af75078fSIntel return -1; 520af75078fSIntel } 521af75078fSIntel break; 522af75078fSIntel 523af75078fSIntel /* nqueue */ 524af75078fSIntel case 'q': 525af75078fSIntel rx_queue_per_lcore = parse_nqueue(optarg); 526af75078fSIntel if (rx_queue_per_lcore < 0) { 527af75078fSIntel printf("invalid queue number\n"); 528af75078fSIntel print_usage(prgname); 529af75078fSIntel return -1; 530af75078fSIntel } 531af75078fSIntel break; 532af75078fSIntel 533af75078fSIntel default: 534af75078fSIntel print_usage(prgname); 535af75078fSIntel return -1; 536af75078fSIntel } 537af75078fSIntel } 538af75078fSIntel 539af75078fSIntel if (optind >= 0) 540af75078fSIntel argv[optind-1] = prgname; 541af75078fSIntel 542af75078fSIntel ret = optind-1; 5439d5ca532SKeith Wiles optind = 1; /* reset getopt lib */ 544af75078fSIntel return ret; 545af75078fSIntel } 546af75078fSIntel 547af75078fSIntel static void 548af75078fSIntel print_ethaddr(const char *name, struct ether_addr *eth_addr) 549af75078fSIntel { 550ec3d82dbSCunming Liang char buf[ETHER_ADDR_FMT_SIZE]; 551ec3d82dbSCunming Liang ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr); 552ec3d82dbSCunming Liang printf("%s%s", name, buf); 553af75078fSIntel } 554af75078fSIntel 555af75078fSIntel static int 556af75078fSIntel init_mcast_hash(void) 557af75078fSIntel { 558af75078fSIntel uint32_t i; 559af75078fSIntel 560e60f71ebSIntel mcast_hash_params.socket_id = rte_socket_id(); 561af75078fSIntel mcast_hash = rte_fbk_hash_create(&mcast_hash_params); 562af75078fSIntel if (mcast_hash == NULL){ 563af75078fSIntel return -1; 564af75078fSIntel } 565af75078fSIntel 566af75078fSIntel for (i = 0; i < N_MCAST_GROUPS; i ++){ 567af75078fSIntel if (rte_fbk_hash_add_key(mcast_hash, 568af75078fSIntel mcast_group_table[i].ip, 569af75078fSIntel mcast_group_table[i].port_mask) < 0) { 570af75078fSIntel return -1; 571af75078fSIntel } 572af75078fSIntel } 573af75078fSIntel 574af75078fSIntel return 0; 575af75078fSIntel } 576af75078fSIntel 577d3641ae8SIntel /* Check the link status of all ports in up to 9s, and print them finally */ 578d3641ae8SIntel static void 5798728ccf3SThomas Monjalon check_all_ports_link_status(uint32_t port_mask) 580d3641ae8SIntel { 581d3641ae8SIntel #define CHECK_INTERVAL 100 /* 100ms */ 582d3641ae8SIntel #define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ 583f8244c63SZhiyong Yang uint16_t portid; 584f8244c63SZhiyong Yang uint8_t count, all_ports_up, print_flag = 0; 585d3641ae8SIntel struct rte_eth_link link; 586d3641ae8SIntel 587d3641ae8SIntel printf("\nChecking link status"); 588d3641ae8SIntel fflush(stdout); 589d3641ae8SIntel for (count = 0; count <= MAX_CHECK_TIME; count++) { 590d3641ae8SIntel all_ports_up = 1; 5918728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(portid) { 592d3641ae8SIntel if ((port_mask & (1 << portid)) == 0) 593d3641ae8SIntel continue; 594d3641ae8SIntel memset(&link, 0, sizeof(link)); 595d3641ae8SIntel rte_eth_link_get_nowait(portid, &link); 596d3641ae8SIntel /* print link status if flag set */ 597d3641ae8SIntel if (print_flag == 1) { 598d3641ae8SIntel if (link.link_status) 599f8244c63SZhiyong Yang printf( 600f8244c63SZhiyong Yang "Port%d Link Up. Speed %u Mbps - %s\n", 601f8244c63SZhiyong Yang portid, link.link_speed, 602d3641ae8SIntel (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 603d3641ae8SIntel ("full-duplex") : ("half-duplex\n")); 604d3641ae8SIntel else 605f8244c63SZhiyong Yang printf("Port %d Link Down\n", portid); 606d3641ae8SIntel continue; 607d3641ae8SIntel } 608d3641ae8SIntel /* clear all_ports_up flag if any link down */ 60909419f23SThomas Monjalon if (link.link_status == ETH_LINK_DOWN) { 610d3641ae8SIntel all_ports_up = 0; 611d3641ae8SIntel break; 612d3641ae8SIntel } 613d3641ae8SIntel } 614d3641ae8SIntel /* after finally printing all link status, get out */ 615d3641ae8SIntel if (print_flag == 1) 616d3641ae8SIntel break; 617d3641ae8SIntel 618d3641ae8SIntel if (all_ports_up == 0) { 619d3641ae8SIntel printf("."); 620d3641ae8SIntel fflush(stdout); 621d3641ae8SIntel rte_delay_ms(CHECK_INTERVAL); 622d3641ae8SIntel } 623d3641ae8SIntel 624d3641ae8SIntel /* set the print_flag if all ports up or timeout */ 625d3641ae8SIntel if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) { 626d3641ae8SIntel print_flag = 1; 627d3641ae8SIntel printf("done\n"); 628d3641ae8SIntel } 629d3641ae8SIntel } 630d3641ae8SIntel } 631d3641ae8SIntel 632af75078fSIntel int 63398a16481SDavid Marchand main(int argc, char **argv) 634af75078fSIntel { 635af75078fSIntel struct lcore_queue_conf *qconf; 63681f7ecd9SPablo de Lara struct rte_eth_dev_info dev_info; 63781f7ecd9SPablo de Lara struct rte_eth_txconf *txconf; 638af75078fSIntel int ret; 639af75078fSIntel uint16_t queueid; 6409787d22fSIntel unsigned lcore_id = 0, rx_lcore_id = 0; 641af75078fSIntel uint32_t n_tx_queue, nb_lcores; 642f8244c63SZhiyong Yang uint16_t portid; 643af75078fSIntel 644af75078fSIntel /* init EAL */ 645af75078fSIntel ret = rte_eal_init(argc, argv); 646af75078fSIntel if (ret < 0) 647af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid EAL parameters\n"); 648af75078fSIntel argc -= ret; 649af75078fSIntel argv += ret; 650af75078fSIntel 651af75078fSIntel /* parse application arguments (after the EAL ones) */ 652af75078fSIntel ret = parse_args(argc, argv); 653af75078fSIntel if (ret < 0) 654af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid IPV4_MULTICAST parameters\n"); 655af75078fSIntel 656af75078fSIntel /* create the mbuf pools */ 657ea0c20eaSOlivier Matz packet_pool = rte_pktmbuf_pool_create("packet_pool", NB_PKT_MBUF, 32, 658ea0c20eaSOlivier Matz 0, PKT_MBUF_DATA_SIZE, rte_socket_id()); 659af75078fSIntel 660af75078fSIntel if (packet_pool == NULL) 661af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init packet mbuf pool\n"); 662af75078fSIntel 663ea0c20eaSOlivier Matz header_pool = rte_pktmbuf_pool_create("header_pool", NB_HDR_MBUF, 32, 664ea0c20eaSOlivier Matz 0, HDR_MBUF_DATA_SIZE, rte_socket_id()); 665af75078fSIntel 666af75078fSIntel if (header_pool == NULL) 667af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init header mbuf pool\n"); 668af75078fSIntel 669ea0c20eaSOlivier Matz clone_pool = rte_pktmbuf_pool_create("clone_pool", NB_CLONE_MBUF, 32, 670ea0c20eaSOlivier Matz 0, 0, rte_socket_id()); 671af75078fSIntel 672af75078fSIntel if (clone_pool == NULL) 673af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot init clone mbuf pool\n"); 674af75078fSIntel 675d9a42a69SThomas Monjalon nb_ports = rte_eth_dev_count_avail(); 676af75078fSIntel if (nb_ports == 0) 677af75078fSIntel rte_exit(EXIT_FAILURE, "No physical ports!\n"); 678af75078fSIntel if (nb_ports > MAX_PORTS) 679af75078fSIntel nb_ports = MAX_PORTS; 680af75078fSIntel 681af75078fSIntel nb_lcores = rte_lcore_count(); 682af75078fSIntel 683af75078fSIntel /* initialize all ports */ 6848728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(portid) { 6856b85f708SShahaf Shuler struct rte_eth_rxconf rxq_conf; 6866b85f708SShahaf Shuler struct rte_eth_conf local_port_conf = port_conf; 6876b85f708SShahaf Shuler 688af75078fSIntel /* skip ports that are not enabled */ 689af75078fSIntel if ((enabled_port_mask & (1 << portid)) == 0) { 690af75078fSIntel printf("Skipping disabled port %d\n", portid); 691af75078fSIntel continue; 692af75078fSIntel } 693af75078fSIntel 694af75078fSIntel qconf = &lcore_queue_conf[rx_lcore_id]; 695af75078fSIntel 6965e470a66SAndriy Berestovskyy /* limit the frame size to the maximum supported by NIC */ 6975e470a66SAndriy Berestovskyy rte_eth_dev_info_get(portid, &dev_info); 6986b85f708SShahaf Shuler local_port_conf.rxmode.max_rx_pkt_len = RTE_MIN( 6996b85f708SShahaf Shuler dev_info.max_rx_pktlen, 7006b85f708SShahaf Shuler local_port_conf.rxmode.max_rx_pkt_len); 7015e470a66SAndriy Berestovskyy 702af75078fSIntel /* get the lcore_id for this port */ 703af75078fSIntel while (rte_lcore_is_enabled(rx_lcore_id) == 0 || 704af75078fSIntel qconf->n_rx_queue == (unsigned)rx_queue_per_lcore) { 705af75078fSIntel 706af75078fSIntel rx_lcore_id ++; 707af75078fSIntel qconf = &lcore_queue_conf[rx_lcore_id]; 708af75078fSIntel 709af75078fSIntel if (rx_lcore_id >= RTE_MAX_LCORE) 710af75078fSIntel rte_exit(EXIT_FAILURE, "Not enough cores\n"); 711af75078fSIntel } 712af75078fSIntel qconf->rx_queue_list[qconf->n_rx_queue] = portid; 713af75078fSIntel qconf->n_rx_queue++; 714af75078fSIntel 715af75078fSIntel /* init port */ 716af75078fSIntel printf("Initializing port %d on lcore %u... ", portid, 717af75078fSIntel rx_lcore_id); 718af75078fSIntel fflush(stdout); 719af75078fSIntel 720af75078fSIntel n_tx_queue = nb_lcores; 721af75078fSIntel if (n_tx_queue > MAX_TX_QUEUE_PER_PORT) 722af75078fSIntel n_tx_queue = MAX_TX_QUEUE_PER_PORT; 7236b85f708SShahaf Shuler 724af75078fSIntel ret = rte_eth_dev_configure(portid, 1, (uint16_t)n_tx_queue, 7256b85f708SShahaf Shuler &local_port_conf); 726af75078fSIntel if (ret < 0) 727af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%d\n", 728af75078fSIntel ret, portid); 729af75078fSIntel 73060efb44fSRoman Zhukov ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &nb_rxd, 73160efb44fSRoman Zhukov &nb_txd); 73260efb44fSRoman Zhukov if (ret < 0) 73360efb44fSRoman Zhukov rte_exit(EXIT_FAILURE, 73460efb44fSRoman Zhukov "Cannot adjust number of descriptors: err=%d, port=%d\n", 73560efb44fSRoman Zhukov ret, portid); 73660efb44fSRoman Zhukov 737af75078fSIntel rte_eth_macaddr_get(portid, &ports_eth_addr[portid]); 738af75078fSIntel print_ethaddr(" Address:", &ports_eth_addr[portid]); 739af75078fSIntel printf(", "); 740af75078fSIntel 741af75078fSIntel /* init one RX queue */ 742af75078fSIntel queueid = 0; 743af75078fSIntel printf("rxq=%hu ", queueid); 744af75078fSIntel fflush(stdout); 7456b85f708SShahaf Shuler rxq_conf = dev_info.default_rxconf; 7466b85f708SShahaf Shuler rxq_conf.offloads = local_port_conf.rxmode.offloads; 747af75078fSIntel ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd, 74881f7ecd9SPablo de Lara rte_eth_dev_socket_id(portid), 7496b85f708SShahaf Shuler &rxq_conf, 750af75078fSIntel packet_pool); 751af75078fSIntel if (ret < 0) 752af75078fSIntel rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, port=%d\n", 753af75078fSIntel ret, portid); 754af75078fSIntel 755af75078fSIntel /* init one TX queue per couple (lcore,port) */ 756af75078fSIntel queueid = 0; 757af75078fSIntel 758af75078fSIntel RTE_LCORE_FOREACH(lcore_id) { 759af75078fSIntel if (rte_lcore_is_enabled(lcore_id) == 0) 760af75078fSIntel continue; 761af75078fSIntel printf("txq=%u,%hu ", lcore_id, queueid); 762af75078fSIntel fflush(stdout); 76381f7ecd9SPablo de Lara 76481f7ecd9SPablo de Lara txconf = &dev_info.default_txconf; 7656b85f708SShahaf Shuler txconf->offloads = local_port_conf.txmode.offloads; 766af75078fSIntel ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd, 76781f7ecd9SPablo de Lara rte_lcore_to_socket_id(lcore_id), txconf); 768af75078fSIntel if (ret < 0) 769af75078fSIntel rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, " 770af75078fSIntel "port=%d\n", ret, portid); 771af75078fSIntel 772af75078fSIntel qconf = &lcore_queue_conf[lcore_id]; 773af75078fSIntel qconf->tx_queue_id[portid] = queueid; 774af75078fSIntel queueid++; 775af75078fSIntel } 776af75078fSIntel 777af75078fSIntel /* Start device */ 778af75078fSIntel ret = rte_eth_dev_start(portid); 779af75078fSIntel if (ret < 0) 780af75078fSIntel rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%d\n", 781af75078fSIntel ret, portid); 782af75078fSIntel 783d3641ae8SIntel printf("done:\n"); 784af75078fSIntel } 785af75078fSIntel 7868728ccf3SThomas Monjalon check_all_ports_link_status(enabled_port_mask); 787af75078fSIntel 788af75078fSIntel /* initialize the multicast hash */ 789af75078fSIntel int retval = init_mcast_hash(); 790af75078fSIntel if (retval != 0) 791af75078fSIntel rte_exit(EXIT_FAILURE, "Cannot build the multicast hash\n"); 792af75078fSIntel 793af75078fSIntel /* launch per-lcore init on every lcore */ 794af75078fSIntel rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER); 795af75078fSIntel RTE_LCORE_FOREACH_SLAVE(lcore_id) { 796af75078fSIntel if (rte_eal_wait_lcore(lcore_id) < 0) 797af75078fSIntel return -1; 798af75078fSIntel } 799af75078fSIntel 800af75078fSIntel return 0; 801af75078fSIntel } 802