16d239dd5SPavan Nikhilesh /* SPDX-License-Identifier: BSD-3-Clause 26d239dd5SPavan Nikhilesh * Copyright(c) 2016-2017 Intel Corporation 36d239dd5SPavan Nikhilesh */ 46d239dd5SPavan Nikhilesh 56d239dd5SPavan Nikhilesh #include <getopt.h> 66d239dd5SPavan Nikhilesh #include <stdint.h> 76d239dd5SPavan Nikhilesh #include <stdio.h> 86d239dd5SPavan Nikhilesh #include <signal.h> 96d239dd5SPavan Nikhilesh #include <sched.h> 106d239dd5SPavan Nikhilesh 116d239dd5SPavan Nikhilesh #include "pipeline_common.h" 126d239dd5SPavan Nikhilesh 136d239dd5SPavan Nikhilesh struct config_data cdata = { 146d239dd5SPavan Nikhilesh .num_packets = (1L << 25), /* do ~32M packets */ 156d239dd5SPavan Nikhilesh .num_fids = 512, 166d239dd5SPavan Nikhilesh .queue_type = RTE_SCHED_TYPE_ATOMIC, 176d239dd5SPavan Nikhilesh .next_qid = {-1}, 186d239dd5SPavan Nikhilesh .qid = {-1}, 196d239dd5SPavan Nikhilesh .num_stages = 1, 206d239dd5SPavan Nikhilesh .worker_cq_depth = 16 216d239dd5SPavan Nikhilesh }; 226d239dd5SPavan Nikhilesh 236d239dd5SPavan Nikhilesh static bool 246d239dd5SPavan Nikhilesh core_in_use(unsigned int lcore_id) { 256d239dd5SPavan Nikhilesh return (fdata->rx_core[lcore_id] || fdata->sched_core[lcore_id] || 266d239dd5SPavan Nikhilesh fdata->tx_core[lcore_id] || fdata->worker_core[lcore_id]); 276d239dd5SPavan Nikhilesh } 286d239dd5SPavan Nikhilesh 296d239dd5SPavan Nikhilesh static void 306d239dd5SPavan Nikhilesh eth_tx_buffer_retry(struct rte_mbuf **pkts, uint16_t unsent, 316d239dd5SPavan Nikhilesh void *userdata) 326d239dd5SPavan Nikhilesh { 336d239dd5SPavan Nikhilesh int port_id = (uintptr_t) userdata; 346d239dd5SPavan Nikhilesh unsigned int _sent = 0; 356d239dd5SPavan Nikhilesh 366d239dd5SPavan Nikhilesh do { 376d239dd5SPavan Nikhilesh /* Note: hard-coded TX queue */ 386d239dd5SPavan Nikhilesh _sent += rte_eth_tx_burst(port_id, 0, &pkts[_sent], 396d239dd5SPavan Nikhilesh unsent - _sent); 406d239dd5SPavan Nikhilesh } while (_sent != unsent); 416d239dd5SPavan Nikhilesh } 426d239dd5SPavan Nikhilesh 436d239dd5SPavan Nikhilesh /* 446d239dd5SPavan Nikhilesh * Parse the coremask given as argument (hexadecimal string) and fill 456d239dd5SPavan Nikhilesh * the global configuration (core role and core count) with the parsed 466d239dd5SPavan Nikhilesh * value. 476d239dd5SPavan Nikhilesh */ 486d239dd5SPavan Nikhilesh static int xdigit2val(unsigned char c) 496d239dd5SPavan Nikhilesh { 506d239dd5SPavan Nikhilesh int val; 516d239dd5SPavan Nikhilesh 526d239dd5SPavan Nikhilesh if (isdigit(c)) 536d239dd5SPavan Nikhilesh val = c - '0'; 546d239dd5SPavan Nikhilesh else if (isupper(c)) 556d239dd5SPavan Nikhilesh val = c - 'A' + 10; 566d239dd5SPavan Nikhilesh else 576d239dd5SPavan Nikhilesh val = c - 'a' + 10; 586d239dd5SPavan Nikhilesh return val; 596d239dd5SPavan Nikhilesh } 606d239dd5SPavan Nikhilesh 616d239dd5SPavan Nikhilesh static uint64_t 626d239dd5SPavan Nikhilesh parse_coremask(const char *coremask) 636d239dd5SPavan Nikhilesh { 646d239dd5SPavan Nikhilesh int i, j, idx = 0; 656d239dd5SPavan Nikhilesh unsigned int count = 0; 666d239dd5SPavan Nikhilesh char c; 676d239dd5SPavan Nikhilesh int val; 686d239dd5SPavan Nikhilesh uint64_t mask = 0; 696d239dd5SPavan Nikhilesh const int32_t BITS_HEX = 4; 706d239dd5SPavan Nikhilesh 716d239dd5SPavan Nikhilesh if (coremask == NULL) 726d239dd5SPavan Nikhilesh return -1; 736d239dd5SPavan Nikhilesh /* Remove all blank characters ahead and after . 746d239dd5SPavan Nikhilesh * Remove 0x/0X if exists. 756d239dd5SPavan Nikhilesh */ 766d239dd5SPavan Nikhilesh while (isblank(*coremask)) 776d239dd5SPavan Nikhilesh coremask++; 786d239dd5SPavan Nikhilesh if (coremask[0] == '0' && ((coremask[1] == 'x') 796d239dd5SPavan Nikhilesh || (coremask[1] == 'X'))) 806d239dd5SPavan Nikhilesh coremask += 2; 816d239dd5SPavan Nikhilesh i = strlen(coremask); 826d239dd5SPavan Nikhilesh while ((i > 0) && isblank(coremask[i - 1])) 836d239dd5SPavan Nikhilesh i--; 846d239dd5SPavan Nikhilesh if (i == 0) 856d239dd5SPavan Nikhilesh return -1; 866d239dd5SPavan Nikhilesh 876d239dd5SPavan Nikhilesh for (i = i - 1; i >= 0 && idx < MAX_NUM_CORE; i--) { 886d239dd5SPavan Nikhilesh c = coremask[i]; 896d239dd5SPavan Nikhilesh if (isxdigit(c) == 0) { 906d239dd5SPavan Nikhilesh /* invalid characters */ 916d239dd5SPavan Nikhilesh return -1; 926d239dd5SPavan Nikhilesh } 936d239dd5SPavan Nikhilesh val = xdigit2val(c); 946d239dd5SPavan Nikhilesh for (j = 0; j < BITS_HEX && idx < MAX_NUM_CORE; j++, idx++) { 956d239dd5SPavan Nikhilesh if ((1 << j) & val) { 966d239dd5SPavan Nikhilesh mask |= (1UL << idx); 976d239dd5SPavan Nikhilesh count++; 986d239dd5SPavan Nikhilesh } 996d239dd5SPavan Nikhilesh } 1006d239dd5SPavan Nikhilesh } 1016d239dd5SPavan Nikhilesh for (; i >= 0; i--) 1026d239dd5SPavan Nikhilesh if (coremask[i] != '0') 1036d239dd5SPavan Nikhilesh return -1; 1046d239dd5SPavan Nikhilesh if (count == 0) 1056d239dd5SPavan Nikhilesh return -1; 1066d239dd5SPavan Nikhilesh return mask; 1076d239dd5SPavan Nikhilesh } 1086d239dd5SPavan Nikhilesh 1096d239dd5SPavan Nikhilesh static struct option long_options[] = { 1106d239dd5SPavan Nikhilesh {"workers", required_argument, 0, 'w'}, 1116d239dd5SPavan Nikhilesh {"packets", required_argument, 0, 'n'}, 1126d239dd5SPavan Nikhilesh {"atomic-flows", required_argument, 0, 'f'}, 1136d239dd5SPavan Nikhilesh {"num_stages", required_argument, 0, 's'}, 1146d239dd5SPavan Nikhilesh {"rx-mask", required_argument, 0, 'r'}, 1156d239dd5SPavan Nikhilesh {"tx-mask", required_argument, 0, 't'}, 1166d239dd5SPavan Nikhilesh {"sched-mask", required_argument, 0, 'e'}, 1176d239dd5SPavan Nikhilesh {"cq-depth", required_argument, 0, 'c'}, 1186d239dd5SPavan Nikhilesh {"work-cycles", required_argument, 0, 'W'}, 1196d239dd5SPavan Nikhilesh {"mempool-size", required_argument, 0, 'm'}, 1206d239dd5SPavan Nikhilesh {"queue-priority", no_argument, 0, 'P'}, 1216d239dd5SPavan Nikhilesh {"parallel", no_argument, 0, 'p'}, 1226d239dd5SPavan Nikhilesh {"ordered", no_argument, 0, 'o'}, 1236d239dd5SPavan Nikhilesh {"quiet", no_argument, 0, 'q'}, 1246d239dd5SPavan Nikhilesh {"use-atq", no_argument, 0, 'a'}, 1256d239dd5SPavan Nikhilesh {"dump", no_argument, 0, 'D'}, 1266d239dd5SPavan Nikhilesh {0, 0, 0, 0} 1276d239dd5SPavan Nikhilesh }; 1286d239dd5SPavan Nikhilesh 1296d239dd5SPavan Nikhilesh static void 1306d239dd5SPavan Nikhilesh usage(void) 1316d239dd5SPavan Nikhilesh { 1326d239dd5SPavan Nikhilesh const char *usage_str = 1336d239dd5SPavan Nikhilesh " Usage: eventdev_demo [options]\n" 1346d239dd5SPavan Nikhilesh " Options:\n" 1356d239dd5SPavan Nikhilesh " -n, --packets=N Send N packets (default ~32M), 0 implies no limit\n" 1366d239dd5SPavan Nikhilesh " -f, --atomic-flows=N Use N random flows from 1 to N (default 16)\n" 1376d239dd5SPavan Nikhilesh " -s, --num_stages=N Use N atomic stages (default 1)\n" 1386d239dd5SPavan Nikhilesh " -r, --rx-mask=core mask Run NIC rx on CPUs in core mask\n" 1396d239dd5SPavan Nikhilesh " -w, --worker-mask=core mask Run worker on CPUs in core mask\n" 1406d239dd5SPavan Nikhilesh " -t, --tx-mask=core mask Run NIC tx on CPUs in core mask\n" 1416d239dd5SPavan Nikhilesh " -e --sched-mask=core mask Run scheduler on CPUs in core mask\n" 1426d239dd5SPavan Nikhilesh " -c --cq-depth=N Worker CQ depth (default 16)\n" 1436d239dd5SPavan Nikhilesh " -W --work-cycles=N Worker cycles (default 0)\n" 1446d239dd5SPavan Nikhilesh " -P --queue-priority Enable scheduler queue prioritization\n" 1456d239dd5SPavan Nikhilesh " -o, --ordered Use ordered scheduling\n" 1466d239dd5SPavan Nikhilesh " -p, --parallel Use parallel scheduling\n" 1476d239dd5SPavan Nikhilesh " -q, --quiet Minimize printed output\n" 1486d239dd5SPavan Nikhilesh " -a, --use-atq Use all type queues\n" 1496d239dd5SPavan Nikhilesh " -m, --mempool-size=N Dictate the mempool size\n" 1506d239dd5SPavan Nikhilesh " -D, --dump Print detailed statistics before exit" 1516d239dd5SPavan Nikhilesh "\n"; 1526d239dd5SPavan Nikhilesh fprintf(stderr, "%s", usage_str); 1536d239dd5SPavan Nikhilesh exit(1); 1546d239dd5SPavan Nikhilesh } 1556d239dd5SPavan Nikhilesh 1566d239dd5SPavan Nikhilesh static void 1576d239dd5SPavan Nikhilesh parse_app_args(int argc, char **argv) 1586d239dd5SPavan Nikhilesh { 1596d239dd5SPavan Nikhilesh /* Parse cli options*/ 1606d239dd5SPavan Nikhilesh int option_index; 1616d239dd5SPavan Nikhilesh int c; 1626d239dd5SPavan Nikhilesh opterr = 0; 1636d239dd5SPavan Nikhilesh uint64_t rx_lcore_mask = 0; 1646d239dd5SPavan Nikhilesh uint64_t tx_lcore_mask = 0; 1656d239dd5SPavan Nikhilesh uint64_t sched_lcore_mask = 0; 1666d239dd5SPavan Nikhilesh uint64_t worker_lcore_mask = 0; 1676d239dd5SPavan Nikhilesh int i; 1686d239dd5SPavan Nikhilesh 1696d239dd5SPavan Nikhilesh for (;;) { 1706d239dd5SPavan Nikhilesh c = getopt_long(argc, argv, "r:t:e:c:w:n:f:s:m:paoPqDW:", 1716d239dd5SPavan Nikhilesh long_options, &option_index); 1726d239dd5SPavan Nikhilesh if (c == -1) 1736d239dd5SPavan Nikhilesh break; 1746d239dd5SPavan Nikhilesh 1756d239dd5SPavan Nikhilesh int popcnt = 0; 1766d239dd5SPavan Nikhilesh switch (c) { 1776d239dd5SPavan Nikhilesh case 'n': 1786d239dd5SPavan Nikhilesh cdata.num_packets = (int64_t)atol(optarg); 1796d239dd5SPavan Nikhilesh if (cdata.num_packets == 0) 1806d239dd5SPavan Nikhilesh cdata.num_packets = INT64_MAX; 1816d239dd5SPavan Nikhilesh break; 1826d239dd5SPavan Nikhilesh case 'f': 1836d239dd5SPavan Nikhilesh cdata.num_fids = (unsigned int)atoi(optarg); 1846d239dd5SPavan Nikhilesh break; 1856d239dd5SPavan Nikhilesh case 's': 1866d239dd5SPavan Nikhilesh cdata.num_stages = (unsigned int)atoi(optarg); 1876d239dd5SPavan Nikhilesh break; 1886d239dd5SPavan Nikhilesh case 'c': 1896d239dd5SPavan Nikhilesh cdata.worker_cq_depth = (unsigned int)atoi(optarg); 1906d239dd5SPavan Nikhilesh break; 1916d239dd5SPavan Nikhilesh case 'W': 1926d239dd5SPavan Nikhilesh cdata.worker_cycles = (unsigned int)atoi(optarg); 1936d239dd5SPavan Nikhilesh break; 1946d239dd5SPavan Nikhilesh case 'P': 1956d239dd5SPavan Nikhilesh cdata.enable_queue_priorities = 1; 1966d239dd5SPavan Nikhilesh break; 1976d239dd5SPavan Nikhilesh case 'o': 1986d239dd5SPavan Nikhilesh cdata.queue_type = RTE_SCHED_TYPE_ORDERED; 1996d239dd5SPavan Nikhilesh break; 2006d239dd5SPavan Nikhilesh case 'p': 2016d239dd5SPavan Nikhilesh cdata.queue_type = RTE_SCHED_TYPE_PARALLEL; 2026d239dd5SPavan Nikhilesh break; 2036d239dd5SPavan Nikhilesh case 'a': 2046d239dd5SPavan Nikhilesh cdata.all_type_queues = 1; 2056d239dd5SPavan Nikhilesh break; 2066d239dd5SPavan Nikhilesh case 'q': 2076d239dd5SPavan Nikhilesh cdata.quiet = 1; 2086d239dd5SPavan Nikhilesh break; 2096d239dd5SPavan Nikhilesh case 'D': 2106d239dd5SPavan Nikhilesh cdata.dump_dev = 1; 2116d239dd5SPavan Nikhilesh break; 2126d239dd5SPavan Nikhilesh case 'w': 2136d239dd5SPavan Nikhilesh worker_lcore_mask = parse_coremask(optarg); 2146d239dd5SPavan Nikhilesh break; 2156d239dd5SPavan Nikhilesh case 'r': 2166d239dd5SPavan Nikhilesh rx_lcore_mask = parse_coremask(optarg); 2176d239dd5SPavan Nikhilesh popcnt = __builtin_popcountll(rx_lcore_mask); 2186d239dd5SPavan Nikhilesh fdata->rx_single = (popcnt == 1); 2196d239dd5SPavan Nikhilesh break; 2206d239dd5SPavan Nikhilesh case 't': 2216d239dd5SPavan Nikhilesh tx_lcore_mask = parse_coremask(optarg); 2226d239dd5SPavan Nikhilesh popcnt = __builtin_popcountll(tx_lcore_mask); 2236d239dd5SPavan Nikhilesh fdata->tx_single = (popcnt == 1); 2246d239dd5SPavan Nikhilesh break; 2256d239dd5SPavan Nikhilesh case 'e': 2266d239dd5SPavan Nikhilesh sched_lcore_mask = parse_coremask(optarg); 2276d239dd5SPavan Nikhilesh popcnt = __builtin_popcountll(sched_lcore_mask); 2286d239dd5SPavan Nikhilesh fdata->sched_single = (popcnt == 1); 2296d239dd5SPavan Nikhilesh break; 2306d239dd5SPavan Nikhilesh case 'm': 2316d239dd5SPavan Nikhilesh cdata.num_mbuf = (uint64_t)atol(optarg); 2326d239dd5SPavan Nikhilesh break; 2336d239dd5SPavan Nikhilesh default: 2346d239dd5SPavan Nikhilesh usage(); 2356d239dd5SPavan Nikhilesh } 2366d239dd5SPavan Nikhilesh } 2376d239dd5SPavan Nikhilesh 2386d239dd5SPavan Nikhilesh cdata.worker_lcore_mask = worker_lcore_mask; 2396d239dd5SPavan Nikhilesh cdata.sched_lcore_mask = sched_lcore_mask; 2406d239dd5SPavan Nikhilesh cdata.rx_lcore_mask = rx_lcore_mask; 2416d239dd5SPavan Nikhilesh cdata.tx_lcore_mask = tx_lcore_mask; 2426d239dd5SPavan Nikhilesh 2436d239dd5SPavan Nikhilesh if (cdata.num_stages == 0 || cdata.num_stages > MAX_NUM_STAGES) 2446d239dd5SPavan Nikhilesh usage(); 2456d239dd5SPavan Nikhilesh 2466d239dd5SPavan Nikhilesh for (i = 0; i < MAX_NUM_CORE; i++) { 2476d239dd5SPavan Nikhilesh fdata->rx_core[i] = !!(rx_lcore_mask & (1UL << i)); 2486d239dd5SPavan Nikhilesh fdata->tx_core[i] = !!(tx_lcore_mask & (1UL << i)); 2496d239dd5SPavan Nikhilesh fdata->sched_core[i] = !!(sched_lcore_mask & (1UL << i)); 2506d239dd5SPavan Nikhilesh fdata->worker_core[i] = !!(worker_lcore_mask & (1UL << i)); 2516d239dd5SPavan Nikhilesh 2526d239dd5SPavan Nikhilesh if (fdata->worker_core[i]) 2536d239dd5SPavan Nikhilesh cdata.num_workers++; 2546d239dd5SPavan Nikhilesh if (core_in_use(i)) 2556d239dd5SPavan Nikhilesh cdata.active_cores++; 2566d239dd5SPavan Nikhilesh } 2576d239dd5SPavan Nikhilesh } 2586d239dd5SPavan Nikhilesh 2596d239dd5SPavan Nikhilesh /* 2606d239dd5SPavan Nikhilesh * Initializes a given port using global settings and with the RX buffers 2616d239dd5SPavan Nikhilesh * coming from the mbuf_pool passed as a parameter. 2626d239dd5SPavan Nikhilesh */ 2636d239dd5SPavan Nikhilesh static inline int 2646d239dd5SPavan Nikhilesh port_init(uint8_t port, struct rte_mempool *mbuf_pool) 2656d239dd5SPavan Nikhilesh { 2666d239dd5SPavan Nikhilesh static const struct rte_eth_conf port_conf_default = { 2676d239dd5SPavan Nikhilesh .rxmode = { 2686d239dd5SPavan Nikhilesh .mq_mode = ETH_MQ_RX_RSS, 2696d239dd5SPavan Nikhilesh .max_rx_pkt_len = ETHER_MAX_LEN, 2706d239dd5SPavan Nikhilesh .ignore_offload_bitfield = 1, 2716d239dd5SPavan Nikhilesh }, 2726d239dd5SPavan Nikhilesh .rx_adv_conf = { 2736d239dd5SPavan Nikhilesh .rss_conf = { 2746d239dd5SPavan Nikhilesh .rss_hf = ETH_RSS_IP | 2756d239dd5SPavan Nikhilesh ETH_RSS_TCP | 2766d239dd5SPavan Nikhilesh ETH_RSS_UDP, 2776d239dd5SPavan Nikhilesh } 2786d239dd5SPavan Nikhilesh } 2796d239dd5SPavan Nikhilesh }; 2806d239dd5SPavan Nikhilesh const uint16_t rx_rings = 1, tx_rings = 1; 2816d239dd5SPavan Nikhilesh const uint16_t rx_ring_size = 512, tx_ring_size = 512; 2826d239dd5SPavan Nikhilesh struct rte_eth_conf port_conf = port_conf_default; 2836d239dd5SPavan Nikhilesh int retval; 2846d239dd5SPavan Nikhilesh uint16_t q; 2856d239dd5SPavan Nikhilesh struct rte_eth_dev_info dev_info; 2866d239dd5SPavan Nikhilesh struct rte_eth_txconf txconf; 2876d239dd5SPavan Nikhilesh 2886d239dd5SPavan Nikhilesh if (port >= rte_eth_dev_count()) 2896d239dd5SPavan Nikhilesh return -1; 2906d239dd5SPavan Nikhilesh 2916d239dd5SPavan Nikhilesh rte_eth_dev_info_get(port, &dev_info); 2926d239dd5SPavan Nikhilesh if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 2936d239dd5SPavan Nikhilesh port_conf.txmode.offloads |= 2946d239dd5SPavan Nikhilesh DEV_TX_OFFLOAD_MBUF_FAST_FREE; 2956d239dd5SPavan Nikhilesh 2966d239dd5SPavan Nikhilesh /* Configure the Ethernet device. */ 2976d239dd5SPavan Nikhilesh retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf); 2986d239dd5SPavan Nikhilesh if (retval != 0) 2996d239dd5SPavan Nikhilesh return retval; 3006d239dd5SPavan Nikhilesh 3016d239dd5SPavan Nikhilesh /* Allocate and set up 1 RX queue per Ethernet port. */ 3026d239dd5SPavan Nikhilesh for (q = 0; q < rx_rings; q++) { 3036d239dd5SPavan Nikhilesh retval = rte_eth_rx_queue_setup(port, q, rx_ring_size, 3046d239dd5SPavan Nikhilesh rte_eth_dev_socket_id(port), NULL, mbuf_pool); 3056d239dd5SPavan Nikhilesh if (retval < 0) 3066d239dd5SPavan Nikhilesh return retval; 3076d239dd5SPavan Nikhilesh } 3086d239dd5SPavan Nikhilesh 3096d239dd5SPavan Nikhilesh txconf = dev_info.default_txconf; 3106d239dd5SPavan Nikhilesh txconf.txq_flags = ETH_TXQ_FLAGS_IGNORE; 3116d239dd5SPavan Nikhilesh txconf.offloads = port_conf_default.txmode.offloads; 3126d239dd5SPavan Nikhilesh /* Allocate and set up 1 TX queue per Ethernet port. */ 3136d239dd5SPavan Nikhilesh for (q = 0; q < tx_rings; q++) { 3146d239dd5SPavan Nikhilesh retval = rte_eth_tx_queue_setup(port, q, tx_ring_size, 3156d239dd5SPavan Nikhilesh rte_eth_dev_socket_id(port), &txconf); 3166d239dd5SPavan Nikhilesh if (retval < 0) 3176d239dd5SPavan Nikhilesh return retval; 3186d239dd5SPavan Nikhilesh } 3196d239dd5SPavan Nikhilesh 3206d239dd5SPavan Nikhilesh /* Start the Ethernet port. */ 3216d239dd5SPavan Nikhilesh retval = rte_eth_dev_start(port); 3226d239dd5SPavan Nikhilesh if (retval < 0) 3236d239dd5SPavan Nikhilesh return retval; 3246d239dd5SPavan Nikhilesh 3256d239dd5SPavan Nikhilesh /* Display the port MAC address. */ 3266d239dd5SPavan Nikhilesh struct ether_addr addr; 3276d239dd5SPavan Nikhilesh rte_eth_macaddr_get(port, &addr); 3286d239dd5SPavan Nikhilesh printf("Port %u MAC: %02" PRIx8 " %02" PRIx8 " %02" PRIx8 3296d239dd5SPavan Nikhilesh " %02" PRIx8 " %02" PRIx8 " %02" PRIx8 "\n", 3306d239dd5SPavan Nikhilesh (unsigned int)port, 3316d239dd5SPavan Nikhilesh addr.addr_bytes[0], addr.addr_bytes[1], 3326d239dd5SPavan Nikhilesh addr.addr_bytes[2], addr.addr_bytes[3], 3336d239dd5SPavan Nikhilesh addr.addr_bytes[4], addr.addr_bytes[5]); 3346d239dd5SPavan Nikhilesh 3356d239dd5SPavan Nikhilesh /* Enable RX in promiscuous mode for the Ethernet device. */ 3366d239dd5SPavan Nikhilesh rte_eth_promiscuous_enable(port); 3376d239dd5SPavan Nikhilesh 3386d239dd5SPavan Nikhilesh return 0; 3396d239dd5SPavan Nikhilesh } 3406d239dd5SPavan Nikhilesh 3416d239dd5SPavan Nikhilesh static int 342*8728ccf3SThomas Monjalon init_ports(uint16_t num_ports) 3436d239dd5SPavan Nikhilesh { 344*8728ccf3SThomas Monjalon uint16_t portid, i; 3456d239dd5SPavan Nikhilesh 3466d239dd5SPavan Nikhilesh if (!cdata.num_mbuf) 3476d239dd5SPavan Nikhilesh cdata.num_mbuf = 16384 * num_ports; 3486d239dd5SPavan Nikhilesh 3496d239dd5SPavan Nikhilesh struct rte_mempool *mp = rte_pktmbuf_pool_create("packet_pool", 3506d239dd5SPavan Nikhilesh /* mbufs */ cdata.num_mbuf, 3516d239dd5SPavan Nikhilesh /* cache_size */ 512, 3526d239dd5SPavan Nikhilesh /* priv_size*/ 0, 3536d239dd5SPavan Nikhilesh /* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE, 3546d239dd5SPavan Nikhilesh rte_socket_id()); 3556d239dd5SPavan Nikhilesh 356*8728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(portid) 3576d239dd5SPavan Nikhilesh if (port_init(portid, mp) != 0) 358*8728ccf3SThomas Monjalon rte_exit(EXIT_FAILURE, "Cannot init port %"PRIu16 "\n", 3596d239dd5SPavan Nikhilesh portid); 3606d239dd5SPavan Nikhilesh 361*8728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(i) { 3626d239dd5SPavan Nikhilesh void *userdata = (void *)(uintptr_t) i; 3636d239dd5SPavan Nikhilesh fdata->tx_buf[i] = 3646d239dd5SPavan Nikhilesh rte_malloc(NULL, RTE_ETH_TX_BUFFER_SIZE(32), 0); 3656d239dd5SPavan Nikhilesh if (fdata->tx_buf[i] == NULL) 3666d239dd5SPavan Nikhilesh rte_panic("Out of memory\n"); 3676d239dd5SPavan Nikhilesh rte_eth_tx_buffer_init(fdata->tx_buf[i], 32); 3686d239dd5SPavan Nikhilesh rte_eth_tx_buffer_set_err_callback(fdata->tx_buf[i], 3696d239dd5SPavan Nikhilesh eth_tx_buffer_retry, 3706d239dd5SPavan Nikhilesh userdata); 3716d239dd5SPavan Nikhilesh } 3726d239dd5SPavan Nikhilesh 3736d239dd5SPavan Nikhilesh return 0; 3746d239dd5SPavan Nikhilesh } 3756d239dd5SPavan Nikhilesh 3766d239dd5SPavan Nikhilesh static void 377*8728ccf3SThomas Monjalon do_capability_setup(uint8_t eventdev_id) 3786d239dd5SPavan Nikhilesh { 379*8728ccf3SThomas Monjalon uint16_t i; 3806d239dd5SPavan Nikhilesh uint8_t mt_unsafe = 0; 3816d239dd5SPavan Nikhilesh uint8_t burst = 0; 3826d239dd5SPavan Nikhilesh 383*8728ccf3SThomas Monjalon RTE_ETH_FOREACH_DEV(i) { 3846d239dd5SPavan Nikhilesh struct rte_eth_dev_info dev_info; 3856d239dd5SPavan Nikhilesh memset(&dev_info, 0, sizeof(struct rte_eth_dev_info)); 3866d239dd5SPavan Nikhilesh 3876d239dd5SPavan Nikhilesh rte_eth_dev_info_get(i, &dev_info); 3886d239dd5SPavan Nikhilesh /* Check if it is safe ask worker to tx. */ 3896d239dd5SPavan Nikhilesh mt_unsafe |= !(dev_info.tx_offload_capa & 3906d239dd5SPavan Nikhilesh DEV_TX_OFFLOAD_MT_LOCKFREE); 3916d239dd5SPavan Nikhilesh } 3926d239dd5SPavan Nikhilesh 3936d239dd5SPavan Nikhilesh struct rte_event_dev_info eventdev_info; 3946d239dd5SPavan Nikhilesh memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info)); 3956d239dd5SPavan Nikhilesh 3966d239dd5SPavan Nikhilesh rte_event_dev_info_get(eventdev_id, &eventdev_info); 3976d239dd5SPavan Nikhilesh burst = eventdev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE ? 1 : 3986d239dd5SPavan Nikhilesh 0; 3996d239dd5SPavan Nikhilesh 4006d239dd5SPavan Nikhilesh if (mt_unsafe) 4016d239dd5SPavan Nikhilesh set_worker_generic_setup_data(&fdata->cap, burst); 4026d239dd5SPavan Nikhilesh else 4036d239dd5SPavan Nikhilesh set_worker_tx_setup_data(&fdata->cap, burst); 4046d239dd5SPavan Nikhilesh } 4056d239dd5SPavan Nikhilesh 4066d239dd5SPavan Nikhilesh static void 4076d239dd5SPavan Nikhilesh signal_handler(int signum) 4086d239dd5SPavan Nikhilesh { 4096d239dd5SPavan Nikhilesh if (fdata->done) 4106d239dd5SPavan Nikhilesh rte_exit(1, "Exiting on signal %d\n", signum); 4116d239dd5SPavan Nikhilesh if (signum == SIGINT || signum == SIGTERM) { 4126d239dd5SPavan Nikhilesh printf("\n\nSignal %d received, preparing to exit...\n", 4136d239dd5SPavan Nikhilesh signum); 4146d239dd5SPavan Nikhilesh fdata->done = 1; 4156d239dd5SPavan Nikhilesh } 4166d239dd5SPavan Nikhilesh if (signum == SIGTSTP) 4176d239dd5SPavan Nikhilesh rte_event_dev_dump(0, stdout); 4186d239dd5SPavan Nikhilesh } 4196d239dd5SPavan Nikhilesh 4206d239dd5SPavan Nikhilesh static inline uint64_t 4216d239dd5SPavan Nikhilesh port_stat(int dev_id, int32_t p) 4226d239dd5SPavan Nikhilesh { 4236d239dd5SPavan Nikhilesh char statname[64]; 4246d239dd5SPavan Nikhilesh snprintf(statname, sizeof(statname), "port_%u_rx", p); 4256d239dd5SPavan Nikhilesh return rte_event_dev_xstats_by_name_get(dev_id, statname, NULL); 4266d239dd5SPavan Nikhilesh } 4276d239dd5SPavan Nikhilesh 4286d239dd5SPavan Nikhilesh int 4296d239dd5SPavan Nikhilesh main(int argc, char **argv) 4306d239dd5SPavan Nikhilesh { 4316d239dd5SPavan Nikhilesh struct worker_data *worker_data; 4326d239dd5SPavan Nikhilesh unsigned int num_ports; 4336d239dd5SPavan Nikhilesh int lcore_id; 4346d239dd5SPavan Nikhilesh int err; 4356d239dd5SPavan Nikhilesh 4366d239dd5SPavan Nikhilesh signal(SIGINT, signal_handler); 4376d239dd5SPavan Nikhilesh signal(SIGTERM, signal_handler); 4386d239dd5SPavan Nikhilesh signal(SIGTSTP, signal_handler); 4396d239dd5SPavan Nikhilesh 4406d239dd5SPavan Nikhilesh err = rte_eal_init(argc, argv); 4416d239dd5SPavan Nikhilesh if (err < 0) 4426d239dd5SPavan Nikhilesh rte_panic("Invalid EAL arguments\n"); 4436d239dd5SPavan Nikhilesh 4446d239dd5SPavan Nikhilesh argc -= err; 4456d239dd5SPavan Nikhilesh argv += err; 4466d239dd5SPavan Nikhilesh 4476d239dd5SPavan Nikhilesh fdata = rte_malloc(NULL, sizeof(struct fastpath_data), 0); 4486d239dd5SPavan Nikhilesh if (fdata == NULL) 4496d239dd5SPavan Nikhilesh rte_panic("Out of memory\n"); 4506d239dd5SPavan Nikhilesh 4516d239dd5SPavan Nikhilesh /* Parse cli options*/ 4526d239dd5SPavan Nikhilesh parse_app_args(argc, argv); 4536d239dd5SPavan Nikhilesh 4546d239dd5SPavan Nikhilesh num_ports = rte_eth_dev_count(); 4556d239dd5SPavan Nikhilesh if (num_ports == 0) 4566d239dd5SPavan Nikhilesh rte_panic("No ethernet ports found\n"); 4576d239dd5SPavan Nikhilesh 4586d239dd5SPavan Nikhilesh const unsigned int cores_needed = cdata.active_cores; 4596d239dd5SPavan Nikhilesh 4606d239dd5SPavan Nikhilesh if (!cdata.quiet) { 4616d239dd5SPavan Nikhilesh printf(" Config:\n"); 4626d239dd5SPavan Nikhilesh printf("\tports: %u\n", num_ports); 4636d239dd5SPavan Nikhilesh printf("\tworkers: %u\n", cdata.num_workers); 4646d239dd5SPavan Nikhilesh printf("\tpackets: %"PRIi64"\n", cdata.num_packets); 4656d239dd5SPavan Nikhilesh printf("\tQueue-prio: %u\n", cdata.enable_queue_priorities); 4666d239dd5SPavan Nikhilesh if (cdata.queue_type == RTE_SCHED_TYPE_ORDERED) 4676d239dd5SPavan Nikhilesh printf("\tqid0 type: ordered\n"); 4686d239dd5SPavan Nikhilesh if (cdata.queue_type == RTE_SCHED_TYPE_ATOMIC) 4696d239dd5SPavan Nikhilesh printf("\tqid0 type: atomic\n"); 4706d239dd5SPavan Nikhilesh printf("\tCores available: %u\n", rte_lcore_count()); 4716d239dd5SPavan Nikhilesh printf("\tCores used: %u\n", cores_needed); 4726d239dd5SPavan Nikhilesh } 4736d239dd5SPavan Nikhilesh 4746d239dd5SPavan Nikhilesh if (rte_lcore_count() < cores_needed) 4756d239dd5SPavan Nikhilesh rte_panic("Too few cores (%d < %d)\n", rte_lcore_count(), 4766d239dd5SPavan Nikhilesh cores_needed); 4776d239dd5SPavan Nikhilesh 4786d239dd5SPavan Nikhilesh const unsigned int ndevs = rte_event_dev_count(); 4796d239dd5SPavan Nikhilesh if (ndevs == 0) 4806d239dd5SPavan Nikhilesh rte_panic("No dev_id devs found. Pasl in a --vdev eventdev.\n"); 4816d239dd5SPavan Nikhilesh if (ndevs > 1) 4826d239dd5SPavan Nikhilesh fprintf(stderr, "Warning: More than one eventdev, using idx 0"); 4836d239dd5SPavan Nikhilesh 4846d239dd5SPavan Nikhilesh 485*8728ccf3SThomas Monjalon do_capability_setup(0); 4866d239dd5SPavan Nikhilesh fdata->cap.check_opt(); 4876d239dd5SPavan Nikhilesh 4886d239dd5SPavan Nikhilesh worker_data = rte_calloc(0, cdata.num_workers, 4896d239dd5SPavan Nikhilesh sizeof(worker_data[0]), 0); 4906d239dd5SPavan Nikhilesh if (worker_data == NULL) 4916d239dd5SPavan Nikhilesh rte_panic("rte_calloc failed\n"); 4926d239dd5SPavan Nikhilesh 4936d239dd5SPavan Nikhilesh int dev_id = fdata->cap.evdev_setup(&cons_data, worker_data); 4946d239dd5SPavan Nikhilesh if (dev_id < 0) 4956d239dd5SPavan Nikhilesh rte_exit(EXIT_FAILURE, "Error setting up eventdev\n"); 4966d239dd5SPavan Nikhilesh 4976d239dd5SPavan Nikhilesh init_ports(num_ports); 4986d239dd5SPavan Nikhilesh fdata->cap.adptr_setup(num_ports); 4996d239dd5SPavan Nikhilesh 5006d239dd5SPavan Nikhilesh int worker_idx = 0; 5016d239dd5SPavan Nikhilesh RTE_LCORE_FOREACH_SLAVE(lcore_id) { 5026d239dd5SPavan Nikhilesh if (lcore_id >= MAX_NUM_CORE) 5036d239dd5SPavan Nikhilesh break; 5046d239dd5SPavan Nikhilesh 5056d239dd5SPavan Nikhilesh if (!fdata->rx_core[lcore_id] && 5066d239dd5SPavan Nikhilesh !fdata->worker_core[lcore_id] && 5076d239dd5SPavan Nikhilesh !fdata->tx_core[lcore_id] && 5086d239dd5SPavan Nikhilesh !fdata->sched_core[lcore_id]) 5096d239dd5SPavan Nikhilesh continue; 5106d239dd5SPavan Nikhilesh 5116d239dd5SPavan Nikhilesh if (fdata->rx_core[lcore_id]) 5126d239dd5SPavan Nikhilesh printf( 5136d239dd5SPavan Nikhilesh "[%s()] lcore %d executing NIC Rx\n", 5146d239dd5SPavan Nikhilesh __func__, lcore_id); 5156d239dd5SPavan Nikhilesh 5166d239dd5SPavan Nikhilesh if (fdata->tx_core[lcore_id]) 5176d239dd5SPavan Nikhilesh printf( 5186d239dd5SPavan Nikhilesh "[%s()] lcore %d executing NIC Tx, and using eventdev port %u\n", 5196d239dd5SPavan Nikhilesh __func__, lcore_id, cons_data.port_id); 5206d239dd5SPavan Nikhilesh 5216d239dd5SPavan Nikhilesh if (fdata->sched_core[lcore_id]) 5226d239dd5SPavan Nikhilesh printf("[%s()] lcore %d executing scheduler\n", 5236d239dd5SPavan Nikhilesh __func__, lcore_id); 5246d239dd5SPavan Nikhilesh 5256d239dd5SPavan Nikhilesh if (fdata->worker_core[lcore_id]) 5266d239dd5SPavan Nikhilesh printf( 5276d239dd5SPavan Nikhilesh "[%s()] lcore %d executing worker, using eventdev port %u\n", 5286d239dd5SPavan Nikhilesh __func__, lcore_id, 5296d239dd5SPavan Nikhilesh worker_data[worker_idx].port_id); 5306d239dd5SPavan Nikhilesh 5316d239dd5SPavan Nikhilesh err = rte_eal_remote_launch(fdata->cap.worker, 5326d239dd5SPavan Nikhilesh &worker_data[worker_idx], lcore_id); 5336d239dd5SPavan Nikhilesh if (err) { 5346d239dd5SPavan Nikhilesh rte_panic("Failed to launch worker on core %d\n", 5356d239dd5SPavan Nikhilesh lcore_id); 5366d239dd5SPavan Nikhilesh continue; 5376d239dd5SPavan Nikhilesh } 5386d239dd5SPavan Nikhilesh if (fdata->worker_core[lcore_id]) 5396d239dd5SPavan Nikhilesh worker_idx++; 5406d239dd5SPavan Nikhilesh } 5416d239dd5SPavan Nikhilesh 5426d239dd5SPavan Nikhilesh lcore_id = rte_lcore_id(); 5436d239dd5SPavan Nikhilesh 5446d239dd5SPavan Nikhilesh if (core_in_use(lcore_id)) 5456d239dd5SPavan Nikhilesh fdata->cap.worker(&worker_data[worker_idx++]); 5466d239dd5SPavan Nikhilesh 5476d239dd5SPavan Nikhilesh rte_eal_mp_wait_lcore(); 5486d239dd5SPavan Nikhilesh 5496d239dd5SPavan Nikhilesh if (cdata.dump_dev) 5506d239dd5SPavan Nikhilesh rte_event_dev_dump(dev_id, stdout); 5516d239dd5SPavan Nikhilesh 5526d239dd5SPavan Nikhilesh if (!cdata.quiet && (port_stat(dev_id, worker_data[0].port_id) != 5536d239dd5SPavan Nikhilesh (uint64_t)-ENOTSUP)) { 5546d239dd5SPavan Nikhilesh printf("\nPort Workload distribution:\n"); 5556d239dd5SPavan Nikhilesh uint32_t i; 5566d239dd5SPavan Nikhilesh uint64_t tot_pkts = 0; 5576d239dd5SPavan Nikhilesh uint64_t pkts_per_wkr[RTE_MAX_LCORE] = {0}; 5586d239dd5SPavan Nikhilesh for (i = 0; i < cdata.num_workers; i++) { 5596d239dd5SPavan Nikhilesh pkts_per_wkr[i] = 5606d239dd5SPavan Nikhilesh port_stat(dev_id, worker_data[i].port_id); 5616d239dd5SPavan Nikhilesh tot_pkts += pkts_per_wkr[i]; 5626d239dd5SPavan Nikhilesh } 5636d239dd5SPavan Nikhilesh for (i = 0; i < cdata.num_workers; i++) { 5646d239dd5SPavan Nikhilesh float pc = pkts_per_wkr[i] * 100 / 5656d239dd5SPavan Nikhilesh ((float)tot_pkts); 5666d239dd5SPavan Nikhilesh printf("worker %i :\t%.1f %% (%"PRIu64" pkts)\n", 5676d239dd5SPavan Nikhilesh i, pc, pkts_per_wkr[i]); 5686d239dd5SPavan Nikhilesh } 5696d239dd5SPavan Nikhilesh 5706d239dd5SPavan Nikhilesh } 5716d239dd5SPavan Nikhilesh 5726d239dd5SPavan Nikhilesh return 0; 5736d239dd5SPavan Nikhilesh } 574