1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016-2017 Intel Corporation
3 */
4
5 #include <ctype.h>
6 #include <getopt.h>
7 #include <stdint.h>
8 #include <stdio.h>
9 #include <stdlib.h>
10 #include <signal.h>
11 #include <sched.h>
12
13 #include "pipeline_common.h"
14
15 struct fastpath_data *fdata;
16
17 struct config_data cdata = {
18 .num_packets = (1L << 25), /* do ~32M packets */
19 .num_fids = 512,
20 .queue_type = RTE_SCHED_TYPE_ATOMIC,
21 .next_qid = {-1},
22 .qid = {-1},
23 .num_stages = 1,
24 .worker_cq_depth = 16
25 };
26
27 static void
dump_core_info(unsigned int lcore_id,struct worker_data * data,unsigned int worker_idx)28 dump_core_info(unsigned int lcore_id, struct worker_data *data,
29 unsigned int worker_idx)
30 {
31 if (fdata->rx_core[lcore_id])
32 printf(
33 "[%s()] lcore %d executing NIC Rx\n",
34 __func__, lcore_id);
35
36 if (fdata->tx_core[lcore_id])
37 printf(
38 "[%s()] lcore %d executing NIC Tx\n",
39 __func__, lcore_id);
40
41 if (fdata->sched_core[lcore_id])
42 printf(
43 "[%s()] lcore %d executing scheduler\n",
44 __func__, lcore_id);
45
46 if (fdata->worker_core[lcore_id])
47 printf(
48 "[%s()] lcore %d executing worker, using eventdev port %u\n",
49 __func__, lcore_id,
50 data[worker_idx].port_id);
51 }
52
53 static bool
core_in_use(unsigned int lcore_id)54 core_in_use(unsigned int lcore_id) {
55 return (fdata->rx_core[lcore_id] || fdata->sched_core[lcore_id] ||
56 fdata->tx_core[lcore_id] || fdata->worker_core[lcore_id]);
57 }
58
59 /*
60 * Parse the coremask given as argument (hexadecimal string) and fill
61 * the global configuration (core role and core count) with the parsed
62 * value.
63 */
xdigit2val(unsigned char c)64 static int xdigit2val(unsigned char c)
65 {
66 int val;
67
68 if (isdigit(c))
69 val = c - '0';
70 else if (isupper(c))
71 val = c - 'A' + 10;
72 else
73 val = c - 'a' + 10;
74 return val;
75 }
76
77 static uint64_t
parse_coremask(const char * coremask)78 parse_coremask(const char *coremask)
79 {
80 int i, j, idx = 0;
81 unsigned int count = 0;
82 char c;
83 int val;
84 uint64_t mask = 0;
85 const int32_t BITS_HEX = 4;
86
87 if (coremask == NULL)
88 return -1;
89 /* Remove all blank characters ahead and after .
90 * Remove 0x/0X if exists.
91 */
92 while (isblank(*coremask))
93 coremask++;
94 if (coremask[0] == '0' && ((coremask[1] == 'x')
95 || (coremask[1] == 'X')))
96 coremask += 2;
97 i = strlen(coremask);
98 while ((i > 0) && isblank(coremask[i - 1]))
99 i--;
100 if (i == 0)
101 return -1;
102
103 for (i = i - 1; i >= 0 && idx < MAX_NUM_CORE; i--) {
104 c = coremask[i];
105 if (isxdigit(c) == 0) {
106 /* invalid characters */
107 return -1;
108 }
109 val = xdigit2val(c);
110 for (j = 0; j < BITS_HEX && idx < MAX_NUM_CORE; j++, idx++) {
111 if ((1 << j) & val) {
112 mask |= (1ULL << idx);
113 count++;
114 }
115 }
116 }
117 for (; i >= 0; i--)
118 if (coremask[i] != '0')
119 return -1;
120 if (count == 0)
121 return -1;
122 return mask;
123 }
124
125 static struct option long_options[] = {
126 {"workers", required_argument, 0, 'w'},
127 {"packets", required_argument, 0, 'n'},
128 {"atomic-flows", required_argument, 0, 'f'},
129 {"num_stages", required_argument, 0, 's'},
130 {"rx-mask", required_argument, 0, 'r'},
131 {"tx-mask", required_argument, 0, 't'},
132 {"sched-mask", required_argument, 0, 'e'},
133 {"cq-depth", required_argument, 0, 'c'},
134 {"work-cycles", required_argument, 0, 'W'},
135 {"mempool-size", required_argument, 0, 'm'},
136 {"queue-priority", no_argument, 0, 'P'},
137 {"parallel", no_argument, 0, 'p'},
138 {"ordered", no_argument, 0, 'o'},
139 {"quiet", no_argument, 0, 'q'},
140 {"use-atq", no_argument, 0, 'a'},
141 {"dump", no_argument, 0, 'D'},
142 {0, 0, 0, 0}
143 };
144
145 static void
usage(void)146 usage(void)
147 {
148 const char *usage_str =
149 " Usage: eventdev_demo [options]\n"
150 " Options:\n"
151 " -n, --packets=N Send N packets (default ~32M), 0 implies no limit\n"
152 " -f, --atomic-flows=N Use N random flows from 1 to N (default 16)\n"
153 " -s, --num_stages=N Use N atomic stages (default 1)\n"
154 " -r, --rx-mask=core mask Run NIC rx on CPUs in core mask\n"
155 " -w, --worker-mask=core mask Run worker on CPUs in core mask\n"
156 " -t, --tx-mask=core mask Run NIC tx on CPUs in core mask\n"
157 " -e --sched-mask=core mask Run scheduler on CPUs in core mask\n"
158 " -c --cq-depth=N Worker CQ depth (default 16)\n"
159 " -W --work-cycles=N Worker cycles (default 0)\n"
160 " -P --queue-priority Enable scheduler queue prioritization\n"
161 " -o, --ordered Use ordered scheduling\n"
162 " -p, --parallel Use parallel scheduling\n"
163 " -q, --quiet Minimize printed output\n"
164 " -a, --use-atq Use all type queues\n"
165 " -m, --mempool-size=N Dictate the mempool size\n"
166 " -D, --dump Print detailed statistics before exit"
167 "\n";
168 fprintf(stderr, "%s", usage_str);
169 exit(1);
170 }
171
172 static void
parse_app_args(int argc,char ** argv)173 parse_app_args(int argc, char **argv)
174 {
175 /* Parse cli options*/
176 int option_index;
177 int c;
178 opterr = 0;
179 uint64_t rx_lcore_mask = 0;
180 uint64_t tx_lcore_mask = 0;
181 uint64_t sched_lcore_mask = 0;
182 uint64_t worker_lcore_mask = 0;
183 int i;
184
185 for (;;) {
186 c = getopt_long(argc, argv, "r:t:e:c:w:n:f:s:m:paoPqDW:",
187 long_options, &option_index);
188 if (c == -1)
189 break;
190
191 int popcnt = 0;
192 switch (c) {
193 case 'n':
194 cdata.num_packets = (int64_t)atol(optarg);
195 if (cdata.num_packets == 0)
196 cdata.num_packets = INT64_MAX;
197 break;
198 case 'f':
199 cdata.num_fids = (unsigned int)atoi(optarg);
200 break;
201 case 's':
202 cdata.num_stages = (unsigned int)atoi(optarg);
203 break;
204 case 'c':
205 cdata.worker_cq_depth = (unsigned int)atoi(optarg);
206 break;
207 case 'W':
208 cdata.worker_cycles = (unsigned int)atoi(optarg);
209 break;
210 case 'P':
211 cdata.enable_queue_priorities = 1;
212 break;
213 case 'o':
214 cdata.queue_type = RTE_SCHED_TYPE_ORDERED;
215 break;
216 case 'p':
217 cdata.queue_type = RTE_SCHED_TYPE_PARALLEL;
218 break;
219 case 'a':
220 cdata.all_type_queues = 1;
221 break;
222 case 'q':
223 cdata.quiet = 1;
224 break;
225 case 'D':
226 cdata.dump_dev = 1;
227 break;
228 case 'w':
229 worker_lcore_mask = parse_coremask(optarg);
230 break;
231 case 'r':
232 rx_lcore_mask = parse_coremask(optarg);
233 popcnt = rte_popcount64(rx_lcore_mask);
234 fdata->rx_single = (popcnt == 1);
235 break;
236 case 't':
237 tx_lcore_mask = parse_coremask(optarg);
238 popcnt = rte_popcount64(tx_lcore_mask);
239 fdata->tx_single = (popcnt == 1);
240 break;
241 case 'e':
242 sched_lcore_mask = parse_coremask(optarg);
243 popcnt = rte_popcount64(sched_lcore_mask);
244 fdata->sched_single = (popcnt == 1);
245 break;
246 case 'm':
247 cdata.num_mbuf = (uint64_t)atol(optarg);
248 break;
249 default:
250 usage();
251 }
252 }
253
254 cdata.worker_lcore_mask = worker_lcore_mask;
255 cdata.sched_lcore_mask = sched_lcore_mask;
256 cdata.rx_lcore_mask = rx_lcore_mask;
257 cdata.tx_lcore_mask = tx_lcore_mask;
258
259 if (cdata.num_stages == 0 || cdata.num_stages > MAX_NUM_STAGES)
260 usage();
261
262 for (i = 0; i < MAX_NUM_CORE; i++) {
263 fdata->rx_core[i] = !!(rx_lcore_mask & (1ULL << i));
264 fdata->tx_core[i] = !!(tx_lcore_mask & (1ULL << i));
265 fdata->sched_core[i] = !!(sched_lcore_mask & (1ULL << i));
266 fdata->worker_core[i] = !!(worker_lcore_mask & (1ULL << i));
267
268 if (fdata->worker_core[i])
269 cdata.num_workers++;
270 if (core_in_use(i)) {
271 if (!rte_lcore_is_enabled(i)) {
272 printf("lcore %d is not enabled in lcore list\n",
273 i);
274 rte_exit(EXIT_FAILURE,
275 "check lcore params failed\n");
276 }
277 cdata.active_cores++;
278 }
279 }
280 }
281
282 static void
do_capability_setup(uint8_t eventdev_id)283 do_capability_setup(uint8_t eventdev_id)
284 {
285 int ret;
286 uint16_t i;
287 uint8_t generic_pipeline = 0;
288 uint8_t burst = 0;
289
290 RTE_ETH_FOREACH_DEV(i) {
291 uint32_t caps = 0;
292
293 ret = rte_event_eth_tx_adapter_caps_get(eventdev_id, i, &caps);
294 if (ret)
295 rte_exit(EXIT_FAILURE,
296 "Invalid capability for Tx adptr port %d\n", i);
297 generic_pipeline |= !(caps &
298 RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT);
299 }
300
301 struct rte_event_dev_info eventdev_info;
302 memset(&eventdev_info, 0, sizeof(struct rte_event_dev_info));
303
304 rte_event_dev_info_get(eventdev_id, &eventdev_info);
305 burst = eventdev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE ? 1 :
306 0;
307
308 if (generic_pipeline)
309 set_worker_generic_setup_data(&fdata->cap, burst);
310 else
311 set_worker_tx_enq_setup_data(&fdata->cap, burst);
312 }
313
314 static void
signal_handler(int signum)315 signal_handler(int signum)
316 {
317 static uint8_t once;
318
319 if (fdata->done)
320 rte_exit(1, "Exiting on signal %d\n", signum);
321 if ((signum == SIGINT || signum == SIGTERM) && !once) {
322 printf("\n\nSignal %d received, preparing to exit...\n",
323 signum);
324 if (cdata.dump_dev)
325 rte_event_dev_dump(0, stdout);
326 once = 1;
327 fdata->done = 1;
328 }
329 if (signum == SIGTSTP)
330 rte_event_dev_dump(0, stdout);
331 }
332
333 static inline uint64_t
port_stat(int dev_id,int32_t p)334 port_stat(int dev_id, int32_t p)
335 {
336 char statname[64];
337 snprintf(statname, sizeof(statname), "port_%u_rx", p);
338 return rte_event_dev_xstats_by_name_get(dev_id, statname, NULL);
339 }
340
341 int
main(int argc,char ** argv)342 main(int argc, char **argv)
343 {
344 struct worker_data *worker_data;
345 uint16_t num_ports;
346 uint16_t portid;
347 int lcore_id;
348 int err;
349
350 signal(SIGINT, signal_handler);
351 signal(SIGTERM, signal_handler);
352 signal(SIGTSTP, signal_handler);
353
354 err = rte_eal_init(argc, argv);
355 if (err < 0)
356 rte_panic("Invalid EAL arguments\n");
357
358 argc -= err;
359 argv += err;
360
361 fdata = rte_malloc(NULL, sizeof(struct fastpath_data), 0);
362 if (fdata == NULL)
363 rte_panic("Out of memory\n");
364
365 /* Parse cli options*/
366 parse_app_args(argc, argv);
367
368 num_ports = rte_eth_dev_count_avail();
369 if (num_ports == 0)
370 rte_panic("No ethernet ports found\n");
371
372 const unsigned int cores_needed = cdata.active_cores;
373
374 if (!cdata.quiet) {
375 printf(" Config:\n");
376 printf("\tports: %u\n", num_ports);
377 printf("\tworkers: %u\n", cdata.num_workers);
378 printf("\tpackets: %"PRIi64"\n", cdata.num_packets);
379 printf("\tQueue-prio: %u\n", cdata.enable_queue_priorities);
380 if (cdata.queue_type == RTE_SCHED_TYPE_ORDERED)
381 printf("\tqid0 type: ordered\n");
382 if (cdata.queue_type == RTE_SCHED_TYPE_ATOMIC)
383 printf("\tqid0 type: atomic\n");
384 printf("\tCores available: %u\n", rte_lcore_count());
385 printf("\tCores used: %u\n", cores_needed);
386 }
387
388 if (rte_lcore_count() < cores_needed)
389 rte_panic("Too few cores (%d < %d)\n", rte_lcore_count(),
390 cores_needed);
391
392 const unsigned int ndevs = rte_event_dev_count();
393 if (ndevs == 0)
394 rte_panic("No dev_id devs found. Pasl in a --vdev eventdev.\n");
395 if (ndevs > 1)
396 fprintf(stderr, "Warning: More than one eventdev, using idx 0");
397
398
399 do_capability_setup(0);
400 fdata->cap.check_opt();
401
402 worker_data = rte_calloc(0, cdata.num_workers,
403 sizeof(worker_data[0]), 0);
404 if (worker_data == NULL)
405 rte_panic("rte_calloc failed\n");
406
407 int dev_id = fdata->cap.evdev_setup(worker_data);
408 if (dev_id < 0)
409 rte_exit(EXIT_FAILURE, "Error setting up eventdev\n");
410
411 fdata->cap.adptr_setup(num_ports);
412
413 /* Start the Ethernet port. */
414 RTE_ETH_FOREACH_DEV(portid) {
415 err = rte_eth_dev_start(portid);
416 if (err < 0)
417 rte_exit(EXIT_FAILURE, "Error starting ethdev %d\n",
418 portid);
419 }
420
421 int worker_idx = 0;
422 RTE_LCORE_FOREACH_WORKER(lcore_id) {
423 if (lcore_id >= MAX_NUM_CORE)
424 break;
425
426 if (!fdata->rx_core[lcore_id] &&
427 !fdata->worker_core[lcore_id] &&
428 !fdata->tx_core[lcore_id] &&
429 !fdata->sched_core[lcore_id])
430 continue;
431
432 dump_core_info(lcore_id, worker_data, worker_idx);
433
434 err = rte_eal_remote_launch(fdata->cap.worker,
435 &worker_data[worker_idx], lcore_id);
436 if (err) {
437 rte_panic("Failed to launch worker on core %d\n",
438 lcore_id);
439 continue;
440 }
441 if (fdata->worker_core[lcore_id])
442 worker_idx++;
443 }
444
445 lcore_id = rte_lcore_id();
446
447 if (core_in_use(lcore_id)) {
448 dump_core_info(lcore_id, worker_data, worker_idx);
449 fdata->cap.worker(&worker_data[worker_idx]);
450
451 if (fdata->worker_core[lcore_id])
452 worker_idx++;
453 }
454
455 rte_eal_mp_wait_lcore();
456
457 if (!cdata.quiet && (port_stat(dev_id, worker_data[0].port_id) !=
458 (uint64_t)-ENOTSUP)) {
459 printf("\nPort Workload distribution:\n");
460 uint32_t i;
461 uint64_t tot_pkts = 0;
462 uint64_t pkts_per_wkr[RTE_MAX_LCORE] = {0};
463 for (i = 0; i < cdata.num_workers; i++) {
464 pkts_per_wkr[i] =
465 port_stat(dev_id, worker_data[i].port_id);
466 tot_pkts += pkts_per_wkr[i];
467 }
468 for (i = 0; i < cdata.num_workers; i++) {
469 float pc = pkts_per_wkr[i] * 100 /
470 ((float)tot_pkts);
471 printf("worker %i :\t%.1f %% (%"PRIu64" pkts)\n",
472 i, pc, pkts_per_wkr[i]);
473 }
474
475 }
476
477 RTE_ETH_FOREACH_DEV(portid) {
478 rte_event_eth_rx_adapter_stop(portid);
479 rte_event_eth_tx_adapter_stop(portid);
480 if (rte_eth_dev_stop(portid) < 0)
481 printf("Failed to stop port %u", portid);
482 rte_eth_dev_close(portid);
483 }
484
485 rte_event_dev_stop(0);
486 rte_event_dev_close(0);
487
488 rte_eal_cleanup();
489
490 return 0;
491 }
492