1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #ifndef RTE_PMD_MLX5_REGEX_RXP_H_ 6 #define RTE_PMD_MLX5_REGEX_RXP_H_ 7 8 #define MLX5_RXP_BF2_IDENTIFIER 0x0 9 #define MLX5_RXP_BF3_IDENTIFIER 0x1 10 #define MLX5_RXP_MAX_JOB_LENGTH 16384 11 #define MLX5_RXP_MAX_SUBSETS 4095 12 #define MLX5_RXP_CSR_NUM_ENTRIES 31 13 #define MLX5_RXP_BF2_ROF_VERSION_STRING 0x07055254 14 #define MLX5_RXP_BF3_ROF_VERSION_STRING 0x00065254 15 #define MLX5_RXP_BF4_ROF_VERSION_STRING 0x00075254 16 17 #define MLX5_RXP_CTRL_TYPE_MASK 7 18 #define MLX5_RXP_CTRL_TYPE_JOB_DESCRIPTOR 0 19 #define MLX5_RXP_CTRL_TYPE_RESPONSE_DESCRIPTOR 1 20 #define MLX5_RXP_CTRL_TYPE_MEMORY_WRITE 4 21 #define MLX5_RXP_CSR_CTRL_DISABLE_L2C (1 << 7) 22 23 #define MLX5_RXP_CTRL_JOB_DESC_SOF 0x0010 24 #define MLX5_RXP_CTRL_JOB_DESC_EOF 0x0020 25 #define MLX5_RXP_CTRL_JOB_DESC_HPM_ENABLE 0x0100 26 #define MLX5_RXP_CTRL_JOB_DESC_ANYMATCH_ENABLE 0x0200 27 #define MLX5_RXP_CTRL_JOB_DESC_FLAGS (MLX5_RXP_CTRL_JOB_DESC_SOF | \ 28 MLX5_RXP_CTRL_JOB_DESC_EOF | \ 29 MLX5_RXP_CTRL_JOB_DESC_HPM_ENABLE | \ 30 MLX5_RXP_CTRL_JOB_DESC_ANYMATCH_ENABLE) 31 32 #define MLX5_RXP_CTRL_VALID 0x8000 33 34 #define MLX5_RXP_RESP_STATUS_MAX_PRI_THREADS (1 << 3) 35 #define MLX5_RXP_RESP_STATUS_MAX_SEC_THREADS (1 << 4) 36 #define MLX5_RXP_RESP_STATUS_MAX_LATENCY (1 << 5) 37 #define MLX5_RXP_RESP_STATUS_MAX_MATCH (1 << 6) 38 #define MLX5_RXP_RESP_STATUS_MAX_PREFIX (1 << 7) 39 #define MLX5_RXP_RESP_STATUS_HPM (1 << 8) 40 #define MLX5_RXP_RESP_STATUS_ANYMATCH (1 << 9) 41 #define MLX5_RXP_RESP_STATUS_PMI_SOJ (1 << 13) 42 #define MLX5_RXP_RESP_STATUS_PMI_EOJ (1 << 14) 43 44 /* This describes the header the RXP expects for any search data. */ 45 struct __rte_packed_begin mlx5_rxp_job_desc { 46 uint32_t job_id; 47 uint16_t ctrl; 48 uint16_t len; 49 uint16_t subset[4]; 50 } __rte_packed_end; 51 52 struct __rte_packed_begin mlx5_rxp_response_desc { 53 uint32_t job_id; 54 uint16_t status; 55 uint8_t detected_match_count; 56 uint8_t match_count; 57 uint16_t primary_thread_count; 58 uint16_t instruction_count; 59 uint16_t latency_count; 60 uint16_t pmi_min_byte_ptr; 61 } __rte_packed_end; 62 63 struct __rte_packed_begin mlx5_rxp_match_tuple { 64 uint32_t rule_id; 65 uint16_t start_ptr; 66 uint16_t length; 67 } __rte_packed_end; 68 69 struct mlx5_rxp_response { 70 struct mlx5_rxp_response_desc header; 71 struct mlx5_rxp_match_tuple matches[]; 72 }; 73 74 #define MLX5_RXP_MAX_MATCHES 254 75 76 #define MLX5_RXP_CTL_RULES_PGM 1 77 #define MLX5_RXP_CTL_RULES_PGM_INCR 2 78 79 #define MLX5_RXP_ROF_ENTRY_INST 0 80 #define MLX5_RXP_ROF_ENTRY_EQ 1 81 #define MLX5_RXP_ROF_ENTRY_GTE 2 82 #define MLX5_RXP_ROF_ENTRY_LTE 3 83 #define MLX5_RXP_ROF_ENTRY_CHECKSUM 4 84 #define MLX5_RXP_ROF_ENTRY_CHECKSUM_EX_EM 5 85 #define MLX5_RXP_ROF_ENTRY_IM 6 86 #define MLX5_RXP_ROF_ENTRY_EM 7 87 #define MLX5_RXP_ROF_ENTRY_TYPE_MAX 7 88 89 #define MLX5_RXP_INST_OFFSET 3 90 #define MLX5_RXP_INST_BLOCK_SIZE 8 91 #define MLX5_MAX_SIZE_RES_DES (sizeof(struct mlx5_rxp_response_desc)) 92 #define MLX5_MAX_DB_SIZE (1u << 27u) 93 #define MLX5_MAX_SIZE_MATCH_RESP (254 * sizeof(struct mlx5_rxp_match_tuple)) 94 #define MLX5_RXP_SQ_NOT_BUSY false 95 #define MLX5_RXP_SQ_BUSY true 96 97 98 struct mlx5_rxp_ctl_hdr { 99 uint16_t cmd; 100 uint32_t len; 101 }; 102 103 struct mlx5_rxp_rof_entry { 104 uint8_t type; 105 uint32_t addr; 106 uint64_t value; 107 }; 108 109 struct mlx5_rxp_rof { 110 uint32_t rof_version; 111 char *timestamp; 112 char *rxp_compiler_version; 113 uint32_t rof_revision; 114 uint32_t number_of_entries; 115 struct mlx5_rxp_rof_entry *rof_entries; 116 }; 117 118 struct __rte_packed_begin mlx5_rxp_ctl_rules_pgm { 119 struct mlx5_rxp_ctl_hdr hdr; 120 uint32_t count; 121 struct mlx5_rxp_rof_entry rules[]; 122 } __rte_packed_end; 123 124 /* RXP programming mode setting. */ 125 enum mlx5_rxp_program_mode { 126 MLX5_RXP_MODE_NOT_DEFINED = 0, 127 MLX5_RXP_SHARED_PROG_MODE, 128 MLX5_RXP_PRIVATE_PROG_MODE, 129 }; 130 131 #define MLX5_RXP_POLL_CSR_FOR_VALUE_TIMEOUT 3000 /* Poll timeout in ms. */ 132 #define MLX5_RXP_INITIALIZATION_TIMEOUT 60000 /* Initialize timeout in ms. */ 133 #define MLX5_RXP_MAX_ENGINES 2u /* Number of RXP engines. */ 134 #define MLX5_RXP_EM_COUNT 1u /* Extra External Memories to use. */ 135 #define MLX5_RXP_DB_NOT_ASSIGNED 0xFF 136 137 struct mlx5_regex_mkey { 138 struct mlx5dv_devx_umem *umem; 139 struct mlx5_devx_obj *mkey; 140 uint64_t offset; 141 }; 142 143 #endif /* RTE_PMD_MLX5_REGEX_RXP_H_ */ 144