1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #ifndef MLX5_REGEX_H 6 #define MLX5_REGEX_H 7 8 #include <rte_regexdev.h> 9 10 #include <infiniband/verbs.h> 11 #include <infiniband/mlx5dv.h> 12 13 #include <mlx5_common.h> 14 #include <mlx5_common_mr.h> 15 16 #include "mlx5_rxp.h" 17 18 struct mlx5_regex_sq { 19 uint16_t log_nb_desc; /* Log 2 number of desc for this object. */ 20 struct mlx5_devx_obj *obj; /* The SQ DevX object. */ 21 int64_t dbr_offset; /* Door bell record offset. */ 22 uint32_t dbr_umem; /* Door bell record umem id. */ 23 uint8_t *wqe; /* The SQ ring buffer. */ 24 struct mlx5dv_devx_umem *wqe_umem; /* SQ buffer umem. */ 25 size_t pi, db_pi; 26 size_t ci; 27 uint32_t sqn; 28 uint32_t *dbr; 29 }; 30 31 struct mlx5_regex_cq { 32 uint32_t log_nb_desc; /* Log 2 number of desc for this object. */ 33 struct mlx5_devx_obj *obj; /* The CQ DevX object. */ 34 int64_t dbr_offset; /* Door bell record offset. */ 35 uint32_t dbr_umem; /* Door bell record umem id. */ 36 volatile struct mlx5_cqe *cqe; /* The CQ ring buffer. */ 37 struct mlx5dv_devx_umem *cqe_umem; /* CQ buffer umem. */ 38 size_t ci; 39 uint32_t *dbr; 40 }; 41 42 struct mlx5_regex_qp { 43 uint32_t flags; /* QP user flags. */ 44 uint32_t nb_desc; /* Total number of desc for this qp. */ 45 struct mlx5_regex_sq *sqs; /* Pointer to sq array. */ 46 uint16_t nb_obj; /* Number of sq objects. */ 47 struct mlx5_regex_cq cq; /* CQ struct. */ 48 uint32_t free_sqs; 49 struct mlx5_regex_job *jobs; 50 struct ibv_mr *metadata; 51 struct ibv_mr *outputs; 52 size_t ci, pi; 53 struct mlx5_mr_ctrl mr_ctrl; 54 }; 55 56 struct mlx5_regex_db { 57 void *ptr; /* Pointer to the db memory. */ 58 uint32_t len; /* The memory len. */ 59 bool active; /* Active flag. */ 60 uint8_t db_assigned_to_eng_num; 61 /**< To which engine the db is connected. */ 62 struct mlx5_regex_umem umem; 63 /**< The umem struct. */ 64 }; 65 66 struct mlx5_regex_priv { 67 TAILQ_ENTRY(mlx5_regex_priv) next; 68 struct ibv_context *ctx; /* Device context. */ 69 struct rte_pci_device *pci_dev; 70 struct rte_regexdev *regexdev; /* Pointer to the RegEx dev. */ 71 uint16_t nb_queues; /* Number of queues. */ 72 struct mlx5_regex_qp *qps; /* Pointer to the qp array. */ 73 uint16_t nb_max_matches; /* Max number of matches. */ 74 enum mlx5_rxp_program_mode prog_mode; 75 struct mlx5_regex_db db[MLX5_RXP_MAX_ENGINES + 76 MLX5_RXP_EM_COUNT]; 77 uint32_t nb_engines; /* Number of RegEx engines. */ 78 uint32_t eqn; /* EQ number. */ 79 struct mlx5dv_devx_uar *uar; /* UAR object. */ 80 struct ibv_pd *pd; 81 struct mlx5_dbr_page_list dbrpgs; /* Door-bell pages. */ 82 struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */ 83 }; 84 85 /* mlx5_regex.c */ 86 int mlx5_regex_start(struct rte_regexdev *dev); 87 int mlx5_regex_stop(struct rte_regexdev *dev); 88 int mlx5_regex_close(struct rte_regexdev *dev); 89 90 /* mlx5_rxp.c */ 91 int mlx5_regex_info_get(struct rte_regexdev *dev, 92 struct rte_regexdev_info *info); 93 int mlx5_regex_configure(struct rte_regexdev *dev, 94 const struct rte_regexdev_config *cfg); 95 int mlx5_regex_rules_db_import(struct rte_regexdev *dev, 96 const char *rule_db, uint32_t rule_db_len); 97 98 /* mlx5_regex_devx.c */ 99 int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id, 100 uint32_t addr, uint32_t data); 101 int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id, 102 uint32_t addr, uint32_t *data); 103 int mlx5_devx_regex_database_stop(void *ctx, uint8_t engine); 104 int mlx5_devx_regex_database_resume(void *ctx, uint8_t engine); 105 int mlx5_devx_regex_database_program(void *ctx, uint8_t engine, 106 uint32_t umem_id, uint64_t umem_offset); 107 108 /* mlx5_regex_control.c */ 109 int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind, 110 const struct rte_regexdev_qp_conf *cfg); 111 112 /* mlx5_regex_fastpath.c */ 113 int mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id); 114 void mlx5_regexdev_teardown_fastpath(struct mlx5_regex_priv *priv, 115 uint32_t qp_id); 116 uint16_t mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id, 117 struct rte_regex_ops **ops, uint16_t nb_ops); 118 uint16_t mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id, 119 struct rte_regex_ops **ops, uint16_t nb_ops); 120 121 #endif /* MLX5_REGEX_H */ 122