1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #ifndef MLX5_REGEX_H 6 #define MLX5_REGEX_H 7 8 #include <rte_regexdev.h> 9 10 #include <infiniband/verbs.h> 11 #include <infiniband/mlx5dv.h> 12 13 #include <mlx5_common.h> 14 #include <mlx5_common_mr.h> 15 #include <mlx5_common_devx.h> 16 17 #include "mlx5_rxp.h" 18 #include "mlx5_regex_utils.h" 19 20 struct mlx5_regex_hw_qp { 21 uint16_t log_nb_desc; /* Log 2 number of desc for this object. */ 22 struct mlx5_devx_qp qp_obj; /* The QP DevX object. */ 23 size_t pi, db_pi; 24 size_t ci; 25 uint32_t qpn; 26 }; 27 28 struct mlx5_regex_cq { 29 uint32_t log_nb_desc; /* Log 2 number of desc for this object. */ 30 struct mlx5_devx_cq cq_obj; /* The CQ DevX object. */ 31 size_t ci; 32 }; 33 34 struct mlx5_regex_qp { 35 uint32_t flags; /* QP user flags. */ 36 uint32_t nb_desc; /* Total number of desc for this qp. */ 37 struct mlx5_regex_hw_qp *qps; /* Pointer to qp array. */ 38 uint16_t nb_obj; /* Number of qp objects. */ 39 struct mlx5_regex_cq cq; /* CQ struct. */ 40 uint32_t free_qps; 41 struct mlx5_regex_job *jobs; 42 struct ibv_mr *metadata; 43 struct ibv_mr *outputs; 44 struct ibv_mr *imkey_addr; /* Indirect mkey array region. */ 45 size_t ci, pi; 46 struct mlx5_mr_ctrl mr_ctrl; 47 }; 48 49 struct mlx5_regex_db { 50 void *ptr; /* Pointer to the db memory. */ 51 uint32_t len; /* The memory len. */ 52 bool active; /* Active flag. */ 53 uint8_t db_assigned_to_eng_num; 54 /**< To which engine the db is connected. */ 55 struct mlx5_regex_umem umem; 56 /**< The umem struct. */ 57 }; 58 59 struct mlx5_regex_priv { 60 TAILQ_ENTRY(mlx5_regex_priv) next; 61 struct mlx5_common_device *cdev; /* Backend mlx5 device. */ 62 struct rte_regexdev *regexdev; /* Pointer to the RegEx dev. */ 63 uint16_t nb_queues; /* Number of queues. */ 64 struct mlx5_regex_qp *qps; /* Pointer to the qp array. */ 65 uint16_t nb_max_matches; /* Max number of matches. */ 66 enum mlx5_rxp_program_mode prog_mode; 67 struct mlx5_regex_db db[MLX5_RXP_MAX_ENGINES + 68 MLX5_RXP_EM_COUNT]; 69 uint32_t nb_engines; /* Number of RegEx engines. */ 70 struct mlx5dv_devx_uar *uar; /* UAR object. */ 71 uint8_t is_bf2; /* The device is BF2 device. */ 72 uint8_t has_umr; /* The device supports UMR. */ 73 uint32_t mmo_regex_qp_cap:1; 74 uint32_t mmo_regex_sq_cap:1; 75 }; 76 77 /* mlx5_regex.c */ 78 int mlx5_regex_start(struct rte_regexdev *dev); 79 int mlx5_regex_stop(struct rte_regexdev *dev); 80 int mlx5_regex_close(struct rte_regexdev *dev); 81 82 /* mlx5_rxp.c */ 83 int mlx5_regex_info_get(struct rte_regexdev *dev, 84 struct rte_regexdev_info *info); 85 int mlx5_regex_configure(struct rte_regexdev *dev, 86 const struct rte_regexdev_config *cfg); 87 int mlx5_regex_rules_db_import(struct rte_regexdev *dev, 88 const char *rule_db, uint32_t rule_db_len); 89 90 /* mlx5_regex_devx.c */ 91 int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id, 92 uint32_t addr, uint32_t data); 93 int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id, 94 uint32_t addr, uint32_t *data); 95 int mlx5_devx_regex_database_stop(void *ctx, uint8_t engine); 96 int mlx5_devx_regex_database_resume(void *ctx, uint8_t engine); 97 int mlx5_devx_regex_database_program(void *ctx, uint8_t engine, 98 uint32_t umem_id, uint64_t umem_offset); 99 100 /* mlx5_regex_control.c */ 101 int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind, 102 const struct rte_regexdev_qp_conf *cfg); 103 104 /* mlx5_regex_fastpath.c */ 105 int mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id); 106 void mlx5_regexdev_teardown_fastpath(struct mlx5_regex_priv *priv, 107 uint32_t qp_id); 108 uint16_t mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id, 109 struct rte_regex_ops **ops, uint16_t nb_ops); 110 uint16_t mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id, 111 struct rte_regex_ops **ops, uint16_t nb_ops); 112 uint16_t mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id, 113 struct rte_regex_ops **ops, uint16_t nb_ops); 114 #endif /* MLX5_REGEX_H */ 115