1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_log.h> 7 #include <rte_errno.h> 8 #include <rte_pci.h> 9 #include <rte_regexdev.h> 10 #include <rte_regexdev_core.h> 11 #include <rte_regexdev_driver.h> 12 #include <rte_bus_pci.h> 13 14 #include <mlx5_common.h> 15 #include <mlx5_common_mr.h> 16 #include <mlx5_glue.h> 17 #include <mlx5_devx_cmds.h> 18 #include <mlx5_prm.h> 19 20 #include "mlx5_regex.h" 21 #include "mlx5_regex_utils.h" 22 #include "mlx5_rxp_csrs.h" 23 24 #define MLX5_REGEX_DRIVER_NAME regex_mlx5 25 26 int mlx5_regex_logtype; 27 28 const struct rte_regexdev_ops mlx5_regexdev_ops = { 29 .dev_info_get = mlx5_regex_info_get, 30 .dev_configure = mlx5_regex_configure, 31 .dev_db_import = mlx5_regex_rules_db_import, 32 .dev_qp_setup = mlx5_regex_qp_setup, 33 .dev_start = mlx5_regex_start, 34 .dev_stop = mlx5_regex_stop, 35 .dev_close = mlx5_regex_close, 36 }; 37 38 int 39 mlx5_regex_start(struct rte_regexdev *dev) 40 { 41 struct mlx5_regex_priv *priv = dev->data->dev_private; 42 43 return mlx5_dev_mempool_subscribe(priv->cdev); 44 } 45 46 int 47 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused) 48 { 49 return 0; 50 } 51 52 int 53 mlx5_regex_close(struct rte_regexdev *dev __rte_unused) 54 { 55 return 0; 56 } 57 58 static int 59 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines) 60 { 61 uint32_t fpga_ident = 0; 62 int err; 63 int i; 64 65 for (i = 0; i < num_engines; i++) { 66 err = mlx5_devx_regex_register_read(ctx, i, 67 MLX5_RXP_CSR_IDENTIFIER, 68 &fpga_ident); 69 fpga_ident = (fpga_ident & (0x0000FFFF)); 70 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) { 71 DRV_LOG(ERR, "Failed setup RXP %d err %d database " 72 "memory 0x%x", i, err, fpga_ident); 73 if (!err) 74 err = EINVAL; 75 return err; 76 } 77 } 78 return 0; 79 } 80 81 static void 82 mlx5_regex_get_name(char *name, struct rte_device *dev) 83 { 84 sprintf(name, "mlx5_regex_%s", dev->name); 85 } 86 87 static int 88 mlx5_regex_dev_probe(struct mlx5_common_device *cdev) 89 { 90 struct mlx5_regex_priv *priv = NULL; 91 struct mlx5_hca_attr *attr = &cdev->config.hca_attr; 92 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 93 int ret; 94 uint32_t val; 95 96 if ((!attr->regex && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en) 97 || attr->regexp_num_of_engines == 0) { 98 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe " 99 "old FW/OFED version?"); 100 rte_errno = ENOTSUP; 101 return -rte_errno; 102 } 103 if (mlx5_regex_engines_status(cdev->ctx, 2)) { 104 DRV_LOG(ERR, "RegEx engine error."); 105 rte_errno = ENOMEM; 106 return -rte_errno; 107 } 108 priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv), 109 RTE_CACHE_LINE_SIZE); 110 if (!priv) { 111 DRV_LOG(ERR, "Failed to allocate private memory."); 112 rte_errno = ENOMEM; 113 return -rte_errno; 114 } 115 priv->mmo_regex_qp_cap = attr->mmo_regex_qp_en; 116 priv->mmo_regex_sq_cap = attr->mmo_regex_sq_en; 117 priv->cdev = cdev; 118 priv->nb_engines = 2; /* attr.regexp_num_of_engines */ 119 ret = mlx5_devx_regex_register_read(priv->cdev->ctx, 0, 120 MLX5_RXP_CSR_IDENTIFIER, &val); 121 if (ret) { 122 DRV_LOG(ERR, "CSR read failed!"); 123 goto dev_error; 124 } 125 if (val == MLX5_RXP_BF2_IDENTIFIER) 126 priv->is_bf2 = 1; 127 /* Default RXP programming mode to Shared. */ 128 priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE; 129 mlx5_regex_get_name(name, cdev->dev); 130 priv->regexdev = rte_regexdev_register(name); 131 if (priv->regexdev == NULL) { 132 DRV_LOG(ERR, "Failed to register RegEx device."); 133 rte_errno = rte_errno ? rte_errno : EINVAL; 134 goto dev_error; 135 } 136 /* 137 * This PMD always claims the write memory barrier on UAR 138 * registers writings, it is safe to allocate UAR with any 139 * memory mapping type. 140 */ 141 priv->uar = mlx5_devx_alloc_uar(priv->cdev->ctx, -1); 142 if (!priv->uar) { 143 DRV_LOG(ERR, "can't allocate uar."); 144 rte_errno = ENOMEM; 145 goto error; 146 } 147 priv->regexdev->dev_ops = &mlx5_regexdev_ops; 148 priv->regexdev->enqueue = mlx5_regexdev_enqueue; 149 #ifdef HAVE_MLX5_UMR_IMKEY 150 if (!attr->umr_indirect_mkey_disabled && 151 !attr->umr_modify_entity_size_disabled) 152 priv->has_umr = 1; 153 if (priv->has_umr) 154 priv->regexdev->enqueue = mlx5_regexdev_enqueue_gga; 155 #endif 156 priv->regexdev->dequeue = mlx5_regexdev_dequeue; 157 priv->regexdev->device = cdev->dev; 158 priv->regexdev->data->dev_private = priv; 159 priv->regexdev->state = RTE_REGEXDEV_READY; 160 DRV_LOG(INFO, "RegEx GGA is %s.", 161 priv->has_umr ? "supported" : "unsupported"); 162 return 0; 163 164 error: 165 if (priv->uar) 166 mlx5_glue->devx_free_uar(priv->uar); 167 if (priv->regexdev) 168 rte_regexdev_unregister(priv->regexdev); 169 dev_error: 170 if (priv) 171 rte_free(priv); 172 return -rte_errno; 173 } 174 175 static int 176 mlx5_regex_dev_remove(struct mlx5_common_device *cdev) 177 { 178 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 179 struct rte_regexdev *dev; 180 struct mlx5_regex_priv *priv = NULL; 181 182 mlx5_regex_get_name(name, cdev->dev); 183 dev = rte_regexdev_get_device_by_name(name); 184 if (!dev) 185 return 0; 186 priv = dev->data->dev_private; 187 if (priv) { 188 if (priv->uar) 189 mlx5_glue->devx_free_uar(priv->uar); 190 if (priv->regexdev) 191 rte_regexdev_unregister(priv->regexdev); 192 rte_free(priv); 193 } 194 return 0; 195 } 196 197 static const struct rte_pci_id mlx5_regex_pci_id_map[] = { 198 { 199 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 200 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF) 201 }, 202 { 203 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 204 PCI_DEVICE_ID_MELLANOX_CONNECTX7BF) 205 }, 206 { 207 .vendor_id = 0 208 } 209 }; 210 211 static struct mlx5_class_driver mlx5_regex_driver = { 212 .drv_class = MLX5_CLASS_REGEX, 213 .name = RTE_STR(MLX5_REGEX_DRIVER_NAME), 214 .id_table = mlx5_regex_pci_id_map, 215 .probe = mlx5_regex_dev_probe, 216 .remove = mlx5_regex_dev_remove, 217 }; 218 219 RTE_INIT(rte_mlx5_regex_init) 220 { 221 mlx5_common_init(); 222 if (mlx5_glue) 223 mlx5_class_driver_register(&mlx5_regex_driver); 224 } 225 226 RTE_LOG_REGISTER_DEFAULT(mlx5_regex_logtype, NOTICE) 227 RTE_PMD_EXPORT_NAME(MLX5_REGEX_DRIVER_NAME, __COUNTER__); 228 RTE_PMD_REGISTER_PCI_TABLE(MLX5_REGEX_DRIVER_NAME, mlx5_regex_pci_id_map); 229 RTE_PMD_REGISTER_KMOD_DEP(MLX5_REGEX_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib"); 230