1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_log.h> 7 #include <rte_errno.h> 8 #include <rte_pci.h> 9 #include <rte_regexdev.h> 10 #include <rte_regexdev_core.h> 11 #include <rte_regexdev_driver.h> 12 13 #include <mlx5_common_pci.h> 14 #include <mlx5_glue.h> 15 #include <mlx5_devx_cmds.h> 16 #include <mlx5_prm.h> 17 18 #include "mlx5_regex.h" 19 #include "mlx5_regex_utils.h" 20 #include "mlx5_rxp_csrs.h" 21 22 int mlx5_regex_logtype; 23 24 const struct rte_regexdev_ops mlx5_regexdev_ops = { 25 .dev_info_get = mlx5_regex_info_get, 26 .dev_configure = mlx5_regex_configure, 27 .dev_db_import = mlx5_regex_rules_db_import, 28 .dev_qp_setup = mlx5_regex_qp_setup, 29 .dev_start = mlx5_regex_start, 30 .dev_stop = mlx5_regex_stop, 31 .dev_close = mlx5_regex_close, 32 }; 33 34 int 35 mlx5_regex_start(struct rte_regexdev *dev __rte_unused) 36 { 37 return 0; 38 } 39 40 int 41 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused) 42 { 43 return 0; 44 } 45 46 int 47 mlx5_regex_close(struct rte_regexdev *dev __rte_unused) 48 { 49 return 0; 50 } 51 52 static struct ibv_device * 53 mlx5_regex_get_ib_device_match(struct rte_pci_addr *addr) 54 { 55 int n; 56 struct ibv_device **ibv_list = mlx5_glue->get_device_list(&n); 57 struct ibv_device *ibv_match = NULL; 58 59 if (!ibv_list) { 60 rte_errno = ENOSYS; 61 return NULL; 62 } 63 while (n-- > 0) { 64 struct rte_pci_addr pci_addr; 65 66 DRV_LOG(DEBUG, "Checking device \"%s\"..", ibv_list[n]->name); 67 if (mlx5_dev_to_pci_addr(ibv_list[n]->ibdev_path, &pci_addr)) 68 continue; 69 if (rte_pci_addr_cmp(addr, &pci_addr)) 70 continue; 71 ibv_match = ibv_list[n]; 72 break; 73 } 74 if (!ibv_match) 75 rte_errno = ENOENT; 76 mlx5_glue->free_device_list(ibv_list); 77 return ibv_match; 78 } 79 static int 80 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines) 81 { 82 uint32_t fpga_ident = 0; 83 int err; 84 int i; 85 86 for (i = 0; i < num_engines; i++) { 87 err = mlx5_devx_regex_register_read(ctx, i, 88 MLX5_RXP_CSR_IDENTIFIER, 89 &fpga_ident); 90 fpga_ident = (fpga_ident & (0x0000FFFF)); 91 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) { 92 DRV_LOG(ERR, "Failed setup RXP %d err %d database " 93 "memory 0x%x", i, err, fpga_ident); 94 if (!err) 95 err = EINVAL; 96 return err; 97 } 98 } 99 return 0; 100 } 101 102 static void 103 mlx5_regex_get_name(char *name, struct rte_pci_device *pci_dev __rte_unused) 104 { 105 sprintf(name, "mlx5_regex_%02x:%02x.%02x", pci_dev->addr.bus, 106 pci_dev->addr.devid, pci_dev->addr.function); 107 } 108 109 static int 110 mlx5_regex_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 111 struct rte_pci_device *pci_dev) 112 { 113 struct ibv_device *ibv; 114 struct mlx5_regex_priv *priv = NULL; 115 struct ibv_context *ctx = NULL; 116 struct mlx5_hca_attr attr; 117 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 118 int ret; 119 120 ibv = mlx5_regex_get_ib_device_match(&pci_dev->addr); 121 if (!ibv) { 122 DRV_LOG(ERR, "No matching IB device for PCI slot " 123 PCI_PRI_FMT ".", pci_dev->addr.domain, 124 pci_dev->addr.bus, pci_dev->addr.devid, 125 pci_dev->addr.function); 126 return -rte_errno; 127 } 128 DRV_LOG(INFO, "PCI information matches for device \"%s\".", 129 ibv->name); 130 ctx = mlx5_glue->dv_open_device(ibv); 131 if (!ctx) { 132 DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name); 133 rte_errno = ENODEV; 134 return -rte_errno; 135 } 136 ret = mlx5_devx_cmd_query_hca_attr(ctx, &attr); 137 if (ret) { 138 DRV_LOG(ERR, "Unable to read HCA capabilities."); 139 rte_errno = ENOTSUP; 140 goto dev_error; 141 } else if (!attr.regex || attr.regexp_num_of_engines == 0) { 142 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe " 143 "old FW/OFED version?"); 144 rte_errno = ENOTSUP; 145 goto dev_error; 146 } 147 if (mlx5_regex_engines_status(ctx, 2)) { 148 DRV_LOG(ERR, "RegEx engine error."); 149 rte_errno = ENOMEM; 150 goto dev_error; 151 } 152 priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv), 153 RTE_CACHE_LINE_SIZE); 154 if (!priv) { 155 DRV_LOG(ERR, "Failed to allocate private memory."); 156 rte_errno = ENOMEM; 157 goto error; 158 } 159 priv->ctx = ctx; 160 priv->nb_engines = 2; /* attr.regexp_num_of_engines */ 161 /* Default RXP programming mode to Shared. */ 162 priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE; 163 mlx5_regex_get_name(name, pci_dev); 164 priv->regexdev = rte_regexdev_register(name); 165 if (priv->regexdev == NULL) { 166 DRV_LOG(ERR, "Failed to register RegEx device."); 167 rte_errno = rte_errno ? rte_errno : EINVAL; 168 goto error; 169 } 170 ret = mlx5_glue->devx_query_eqn(ctx, 0, &priv->eqn); 171 if (ret) { 172 DRV_LOG(ERR, "can't query event queue number."); 173 rte_errno = ENOMEM; 174 goto error; 175 } 176 priv->uar = mlx5_glue->devx_alloc_uar(ctx, 0); 177 if (!priv->uar) { 178 DRV_LOG(ERR, "can't allocate uar."); 179 rte_errno = ENOMEM; 180 goto error; 181 } 182 priv->pd = mlx5_glue->alloc_pd(ctx); 183 if (!priv->pd) { 184 DRV_LOG(ERR, "can't allocate pd."); 185 rte_errno = ENOMEM; 186 goto error; 187 } 188 priv->regexdev->dev_ops = &mlx5_regexdev_ops; 189 priv->regexdev->enqueue = mlx5_regexdev_enqueue; 190 priv->regexdev->dequeue = mlx5_regexdev_dequeue; 191 priv->regexdev->device = (struct rte_device *)pci_dev; 192 priv->regexdev->data->dev_private = priv; 193 priv->regexdev->state = RTE_REGEXDEV_READY; 194 return 0; 195 196 error: 197 if (priv->pd) 198 mlx5_glue->dealloc_pd(priv->pd); 199 if (priv->uar) 200 mlx5_glue->devx_free_uar(priv->uar); 201 if (priv->regexdev) 202 rte_regexdev_unregister(priv->regexdev); 203 dev_error: 204 if (ctx) 205 mlx5_glue->close_device(ctx); 206 if (priv) 207 rte_free(priv); 208 return -rte_errno; 209 } 210 211 static int 212 mlx5_regex_pci_remove(struct rte_pci_device *pci_dev) 213 { 214 char name[RTE_REGEXDEV_NAME_MAX_LEN]; 215 struct rte_regexdev *dev; 216 struct mlx5_regex_priv *priv = NULL; 217 218 mlx5_regex_get_name(name, pci_dev); 219 dev = rte_regexdev_get_device_by_name(name); 220 if (!dev) 221 return 0; 222 priv = dev->data->dev_private; 223 if (priv) { 224 if (priv->pd) 225 mlx5_glue->dealloc_pd(priv->pd); 226 if (priv->uar) 227 mlx5_glue->devx_free_uar(priv->uar); 228 if (priv->regexdev) 229 rte_regexdev_unregister(priv->regexdev); 230 if (priv->ctx) 231 mlx5_glue->close_device(priv->ctx); 232 if (priv->regexdev) 233 rte_regexdev_unregister(priv->regexdev); 234 rte_free(priv); 235 } 236 return 0; 237 } 238 239 static const struct rte_pci_id mlx5_regex_pci_id_map[] = { 240 { 241 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, 242 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF) 243 }, 244 { 245 .vendor_id = 0 246 } 247 }; 248 249 static struct mlx5_pci_driver mlx5_regex_driver = { 250 .driver_class = MLX5_CLASS_REGEX, 251 .pci_driver = { 252 .driver = { 253 .name = "mlx5_regex", 254 }, 255 .id_table = mlx5_regex_pci_id_map, 256 .probe = mlx5_regex_pci_probe, 257 .remove = mlx5_regex_pci_remove, 258 .drv_flags = 0, 259 }, 260 }; 261 262 RTE_INIT(rte_mlx5_regex_init) 263 { 264 mlx5_common_init(); 265 if (mlx5_glue) 266 mlx5_pci_driver_register(&mlx5_regex_driver); 267 } 268 269 RTE_LOG_REGISTER(mlx5_regex_logtype, pmd.regex.mlx5, NOTICE) 270 RTE_PMD_EXPORT_NAME(net_mlx5_regex, __COUNTER__); 271 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5_regex, mlx5_regex_pci_id_map); 272 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5_regex, "* ib_uverbs & mlx5_core & mlx5_ib"); 273