xref: /dpdk/drivers/regex/mlx5/mlx5_regex.c (revision b34d816363b553a6098ef4647e91d5a02b66aca4)
1cf9b3c36SYuval Avnery /* SPDX-License-Identifier: BSD-3-Clause
2cf9b3c36SYuval Avnery  * Copyright 2020 Mellanox Technologies, Ltd
3cf9b3c36SYuval Avnery  */
4cf9b3c36SYuval Avnery 
5cfc672a9SOri Kam #include <rte_malloc.h>
6cfc672a9SOri Kam #include <rte_log.h>
7cfc672a9SOri Kam #include <rte_errno.h>
8cfc672a9SOri Kam #include <rte_bus_pci.h>
9cfc672a9SOri Kam #include <rte_pci.h>
10cfc672a9SOri Kam #include <rte_regexdev.h>
11cfc672a9SOri Kam #include <rte_regexdev_core.h>
12cfc672a9SOri Kam #include <rte_regexdev_driver.h>
13cfc672a9SOri Kam 
14cfc672a9SOri Kam #include <mlx5_glue.h>
15cfc672a9SOri Kam #include <mlx5_devx_cmds.h>
16cfc672a9SOri Kam #include <mlx5_prm.h>
17cfc672a9SOri Kam 
18cf9b3c36SYuval Avnery #include "mlx5_regex.h"
19215b1223SYuval Avnery #include "mlx5_regex_utils.h"
209428310aSOri Kam #include "mlx5_rxp_csrs.h"
21215b1223SYuval Avnery 
22215b1223SYuval Avnery int mlx5_regex_logtype;
23215b1223SYuval Avnery 
24c126512bSOri Kam const struct rte_regexdev_ops mlx5_regexdev_ops = {
25c126512bSOri Kam 	.dev_info_get = mlx5_regex_info_get,
26e3dbbf71SOri Kam 	.dev_configure = mlx5_regex_configure,
27*b34d8163SFrancis Kelly 	.dev_db_import = mlx5_regex_rules_db_import,
28c126512bSOri Kam };
29cfc672a9SOri Kam 
30cfc672a9SOri Kam static struct ibv_device *
31cfc672a9SOri Kam mlx5_regex_get_ib_device_match(struct rte_pci_addr *addr)
32cfc672a9SOri Kam {
33cfc672a9SOri Kam 	int n;
34cfc672a9SOri Kam 	struct ibv_device **ibv_list = mlx5_glue->get_device_list(&n);
35cfc672a9SOri Kam 	struct ibv_device *ibv_match = NULL;
36cfc672a9SOri Kam 
37cfc672a9SOri Kam 	if (!ibv_list) {
38cfc672a9SOri Kam 		rte_errno = ENOSYS;
39cfc672a9SOri Kam 		return NULL;
40cfc672a9SOri Kam 	}
41cfc672a9SOri Kam 	while (n-- > 0) {
42cfc672a9SOri Kam 		struct rte_pci_addr pci_addr;
43cfc672a9SOri Kam 
44cfc672a9SOri Kam 		DRV_LOG(DEBUG, "Checking device \"%s\"..", ibv_list[n]->name);
45cfc672a9SOri Kam 		if (mlx5_dev_to_pci_addr(ibv_list[n]->ibdev_path, &pci_addr))
46cfc672a9SOri Kam 			continue;
47cfc672a9SOri Kam 		if (rte_pci_addr_cmp(addr, &pci_addr))
48cfc672a9SOri Kam 			continue;
49cfc672a9SOri Kam 		ibv_match = ibv_list[n];
50cfc672a9SOri Kam 		break;
51cfc672a9SOri Kam 	}
52cfc672a9SOri Kam 	if (!ibv_match)
53cfc672a9SOri Kam 		rte_errno = ENOENT;
54cfc672a9SOri Kam 	mlx5_glue->free_device_list(ibv_list);
55cfc672a9SOri Kam 	return ibv_match;
56cfc672a9SOri Kam }
579428310aSOri Kam static int
589428310aSOri Kam mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines)
599428310aSOri Kam {
609428310aSOri Kam 	uint32_t fpga_ident = 0;
619428310aSOri Kam 	int err;
629428310aSOri Kam 	int i;
639428310aSOri Kam 
649428310aSOri Kam 	for (i = 0; i < num_engines; i++) {
659428310aSOri Kam 		err = mlx5_devx_regex_register_read(ctx, i,
669428310aSOri Kam 						    MLX5_RXP_CSR_IDENTIFIER,
679428310aSOri Kam 						    &fpga_ident);
689428310aSOri Kam 		fpga_ident = (fpga_ident & (0x0000FFFF));
699428310aSOri Kam 		if (err || fpga_ident != MLX5_RXP_IDENTIFIER) {
709428310aSOri Kam 			DRV_LOG(ERR, "Failed setup RXP %d err %d database "
719428310aSOri Kam 				"memory 0x%x", i, err, fpga_ident);
729428310aSOri Kam 			if (!err)
739428310aSOri Kam 				err = EINVAL;
749428310aSOri Kam 			return err;
759428310aSOri Kam 		}
769428310aSOri Kam 	}
779428310aSOri Kam 	return 0;
789428310aSOri Kam }
79cfc672a9SOri Kam 
80cfc672a9SOri Kam static void
81cfc672a9SOri Kam mlx5_regex_get_name(char *name, struct rte_pci_device *pci_dev __rte_unused)
82cfc672a9SOri Kam {
83cfc672a9SOri Kam 	sprintf(name, "mlx5_regex_%02x:%02x.%02x", pci_dev->addr.bus,
84cfc672a9SOri Kam 		pci_dev->addr.devid, pci_dev->addr.function);
85cfc672a9SOri Kam }
86cfc672a9SOri Kam 
87cfc672a9SOri Kam static int
88cfc672a9SOri Kam mlx5_regex_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
89cfc672a9SOri Kam 		     struct rte_pci_device *pci_dev)
90cfc672a9SOri Kam {
91cfc672a9SOri Kam 	struct ibv_device *ibv;
92cfc672a9SOri Kam 	struct mlx5_regex_priv *priv = NULL;
93cfc672a9SOri Kam 	struct ibv_context *ctx = NULL;
94cfc672a9SOri Kam 	struct mlx5_hca_attr attr;
95cfc672a9SOri Kam 	char name[RTE_REGEXDEV_NAME_MAX_LEN];
96cfc672a9SOri Kam 	int ret;
97cfc672a9SOri Kam 
98cfc672a9SOri Kam 	ibv = mlx5_regex_get_ib_device_match(&pci_dev->addr);
99cfc672a9SOri Kam 	if (!ibv) {
100cfc672a9SOri Kam 		DRV_LOG(ERR, "No matching IB device for PCI slot "
101cfc672a9SOri Kam 			PCI_PRI_FMT ".", pci_dev->addr.domain,
102cfc672a9SOri Kam 			pci_dev->addr.bus, pci_dev->addr.devid,
103cfc672a9SOri Kam 			pci_dev->addr.function);
104cfc672a9SOri Kam 		return -rte_errno;
105cfc672a9SOri Kam 	}
106cfc672a9SOri Kam 	DRV_LOG(INFO, "PCI information matches for device \"%s\".",
107cfc672a9SOri Kam 		ibv->name);
108cfc672a9SOri Kam 	ctx = mlx5_glue->dv_open_device(ibv);
109cfc672a9SOri Kam 	if (!ctx) {
110cfc672a9SOri Kam 		DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name);
111cfc672a9SOri Kam 		rte_errno = ENODEV;
112cfc672a9SOri Kam 		return -rte_errno;
113cfc672a9SOri Kam 	}
114cfc672a9SOri Kam 	ret = mlx5_devx_cmd_query_hca_attr(ctx, &attr);
115cfc672a9SOri Kam 	if (ret) {
116cfc672a9SOri Kam 		DRV_LOG(ERR, "Unable to read HCA capabilities.");
117cfc672a9SOri Kam 		rte_errno = ENOTSUP;
118cfc672a9SOri Kam 		goto error;
119cfc672a9SOri Kam 	} else if (!attr.regex || attr.regexp_num_of_engines == 0) {
120cfc672a9SOri Kam 		DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
121cfc672a9SOri Kam 			"old FW/OFED version?");
122cfc672a9SOri Kam 		rte_errno = ENOTSUP;
123cfc672a9SOri Kam 		goto error;
124cfc672a9SOri Kam 	}
1259428310aSOri Kam 	if (mlx5_regex_engines_status(ctx, 2)) {
1269428310aSOri Kam 		DRV_LOG(ERR, "RegEx engine error.");
1279428310aSOri Kam 		rte_errno = ENOMEM;
1289428310aSOri Kam 		goto error;
1299428310aSOri Kam 	}
130cfc672a9SOri Kam 	priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv),
131cfc672a9SOri Kam 			   RTE_CACHE_LINE_SIZE);
132cfc672a9SOri Kam 	if (!priv) {
133cfc672a9SOri Kam 		DRV_LOG(ERR, "Failed to allocate private memory.");
134cfc672a9SOri Kam 		rte_errno = ENOMEM;
135cfc672a9SOri Kam 		goto error;
136cfc672a9SOri Kam 	}
137cfc672a9SOri Kam 	priv->ctx = ctx;
138*b34d8163SFrancis Kelly 	priv->nb_engines = 2; /* attr.regexp_num_of_engines */
139*b34d8163SFrancis Kelly 	/* Default RXP programming mode to Shared. */
140*b34d8163SFrancis Kelly 	priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE;
141cfc672a9SOri Kam 	mlx5_regex_get_name(name, pci_dev);
142cfc672a9SOri Kam 	priv->regexdev = rte_regexdev_register(name);
143cfc672a9SOri Kam 	if (priv->regexdev == NULL) {
144cfc672a9SOri Kam 		DRV_LOG(ERR, "Failed to register RegEx device.");
145cfc672a9SOri Kam 		rte_errno = rte_errno ? rte_errno : EINVAL;
146cfc672a9SOri Kam 		goto error;
147cfc672a9SOri Kam 	}
148*b34d8163SFrancis Kelly 	ret = mlx5_glue->devx_query_eqn(ctx, 0, &priv->eqn);
149*b34d8163SFrancis Kelly 	if (ret) {
150*b34d8163SFrancis Kelly 		DRV_LOG(ERR, "can't query event queue number.");
151*b34d8163SFrancis Kelly 		rte_errno = ENOMEM;
152*b34d8163SFrancis Kelly 		goto error;
153*b34d8163SFrancis Kelly 	}
154*b34d8163SFrancis Kelly 	priv->uar = mlx5_glue->devx_alloc_uar(ctx, 0);
155*b34d8163SFrancis Kelly 	if (!priv->uar) {
156*b34d8163SFrancis Kelly 		DRV_LOG(ERR, "can't allocate uar.");
157*b34d8163SFrancis Kelly 		rte_errno = ENOMEM;
158*b34d8163SFrancis Kelly 		goto error;
159*b34d8163SFrancis Kelly 	}
160*b34d8163SFrancis Kelly 	priv->pd = mlx5_glue->alloc_pd(ctx);
161*b34d8163SFrancis Kelly 	if (!priv->pd) {
162*b34d8163SFrancis Kelly 		DRV_LOG(ERR, "can't allocate pd.");
163*b34d8163SFrancis Kelly 		rte_errno = ENOMEM;
164*b34d8163SFrancis Kelly 		goto error;
165*b34d8163SFrancis Kelly 	}
166cfc672a9SOri Kam 	priv->regexdev->dev_ops = &mlx5_regexdev_ops;
167cfc672a9SOri Kam 	priv->regexdev->device = (struct rte_device *)pci_dev;
168cfc672a9SOri Kam 	priv->regexdev->data->dev_private = priv;
169e3dbbf71SOri Kam 	priv->regexdev->state = RTE_REGEXDEV_READY;
170cfc672a9SOri Kam 	return 0;
171cfc672a9SOri Kam 
172cfc672a9SOri Kam error:
173*b34d8163SFrancis Kelly 	if (priv->pd)
174*b34d8163SFrancis Kelly 		mlx5_glue->dealloc_pd(priv->pd);
175*b34d8163SFrancis Kelly 	if (priv->uar)
176*b34d8163SFrancis Kelly 		mlx5_glue->devx_free_uar(priv->uar);
177*b34d8163SFrancis Kelly 	if (priv->regexdev)
178*b34d8163SFrancis Kelly 		rte_regexdev_unregister(priv->regexdev);
179cfc672a9SOri Kam 	if (ctx)
180cfc672a9SOri Kam 		mlx5_glue->close_device(ctx);
181cfc672a9SOri Kam 	if (priv)
182cfc672a9SOri Kam 		rte_free(priv);
183cfc672a9SOri Kam 	return -rte_errno;
184cfc672a9SOri Kam }
185cfc672a9SOri Kam 
186cfc672a9SOri Kam static int
187cfc672a9SOri Kam mlx5_regex_pci_remove(struct rte_pci_device *pci_dev)
188cfc672a9SOri Kam {
189cfc672a9SOri Kam 	char name[RTE_REGEXDEV_NAME_MAX_LEN];
190cfc672a9SOri Kam 	struct rte_regexdev *dev;
191cfc672a9SOri Kam 	struct mlx5_regex_priv *priv = NULL;
192cfc672a9SOri Kam 
193cfc672a9SOri Kam 	mlx5_regex_get_name(name, pci_dev);
194cfc672a9SOri Kam 	dev = rte_regexdev_get_device_by_name(name);
195cfc672a9SOri Kam 	if (!dev)
196cfc672a9SOri Kam 		return 0;
197cfc672a9SOri Kam 	priv = dev->data->dev_private;
198cfc672a9SOri Kam 	if (priv) {
199*b34d8163SFrancis Kelly 		if (priv->pd)
200*b34d8163SFrancis Kelly 			mlx5_glue->dealloc_pd(priv->pd);
201*b34d8163SFrancis Kelly 		if (priv->uar)
202*b34d8163SFrancis Kelly 			mlx5_glue->devx_free_uar(priv->uar);
203*b34d8163SFrancis Kelly 		if (priv->regexdev)
204*b34d8163SFrancis Kelly 			rte_regexdev_unregister(priv->regexdev);
205cfc672a9SOri Kam 		if (priv->ctx)
206cfc672a9SOri Kam 			mlx5_glue->close_device(priv->ctx);
207cfc672a9SOri Kam 		if (priv->regexdev)
208cfc672a9SOri Kam 			rte_regexdev_unregister(priv->regexdev);
209cfc672a9SOri Kam 		rte_free(priv);
210cfc672a9SOri Kam 	}
211cfc672a9SOri Kam 	return 0;
212cfc672a9SOri Kam }
213cfc672a9SOri Kam 
214cfc672a9SOri Kam static const struct rte_pci_id mlx5_regex_pci_id_map[] = {
215cfc672a9SOri Kam 	{
216cfc672a9SOri Kam 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
217cfc672a9SOri Kam 				PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF)
218cfc672a9SOri Kam 	},
219cfc672a9SOri Kam 	{
220cfc672a9SOri Kam 		.vendor_id = 0
221cfc672a9SOri Kam 	}
222cfc672a9SOri Kam };
223cfc672a9SOri Kam 
224cfc672a9SOri Kam static struct rte_pci_driver mlx5_regex_driver = {
225cfc672a9SOri Kam 	.driver = {
226cfc672a9SOri Kam 		.name = "mlx5_regex",
227cfc672a9SOri Kam 	},
228cfc672a9SOri Kam 	.id_table = mlx5_regex_pci_id_map,
229cfc672a9SOri Kam 	.probe = mlx5_regex_pci_probe,
230cfc672a9SOri Kam 	.remove = mlx5_regex_pci_remove,
231cfc672a9SOri Kam 	.drv_flags = 0,
232cfc672a9SOri Kam };
233cfc672a9SOri Kam 
234cfc672a9SOri Kam RTE_INIT(rte_mlx5_regex_init)
235cfc672a9SOri Kam {
236cfc672a9SOri Kam 	if (mlx5_glue)
237cfc672a9SOri Kam 		rte_pci_register(&mlx5_regex_driver);
238cfc672a9SOri Kam }
239cfc672a9SOri Kam 
240215b1223SYuval Avnery RTE_LOG_REGISTER(mlx5_regex_logtype, pmd.regex.mlx5, NOTICE)
241cfc672a9SOri Kam RTE_PMD_EXPORT_NAME(net_mlx5_regex, __COUNTER__);
242cfc672a9SOri Kam RTE_PMD_REGISTER_PCI_TABLE(net_mlx5_regex, mlx5_regex_pci_id_map);
243cfc672a9SOri Kam RTE_PMD_REGISTER_KMOD_DEP(net_mlx5_regex, "* ib_uverbs & mlx5_core & mlx5_ib");
244