19d80d592SJunlong Wang /* SPDX-License-Identifier: BSD-3-Clause 29d80d592SJunlong Wang * Copyright(c) 2024 ZTE Corporation 39d80d592SJunlong Wang */ 49d80d592SJunlong Wang 59d80d592SJunlong Wang #ifndef ZXDH_MSG_H 69d80d592SJunlong Wang #define ZXDH_MSG_H 79d80d592SJunlong Wang 89d80d592SJunlong Wang #include <stdint.h> 99d80d592SJunlong Wang 109d80d592SJunlong Wang #include <ethdev_driver.h> 119d80d592SJunlong Wang 129d80d592SJunlong Wang #define ZXDH_BAR0_INDEX 0 13d2fc5332SJunlong Wang #define ZXDH_CTRLCH_OFFSET (0x2000) 143630ac8bSJunlong Wang #define ZXDH_MSG_CHAN_PFVFSHARE_OFFSET (ZXDH_CTRLCH_OFFSET + 0x1000) 15d2fc5332SJunlong Wang 16d2fc5332SJunlong Wang #define ZXDH_MSIX_INTR_MSG_VEC_BASE 1 173630ac8bSJunlong Wang #define ZXDH_MSIX_INTR_MSG_VEC_NUM 3 183630ac8bSJunlong Wang #define ZXDH_MSIX_INTR_DTB_VEC (ZXDH_MSIX_INTR_MSG_VEC_BASE + ZXDH_MSIX_INTR_MSG_VEC_NUM) 193630ac8bSJunlong Wang #define ZXDH_MSIX_INTR_DTB_VEC_NUM 1 203630ac8bSJunlong Wang #define ZXDH_INTR_NONQUE_NUM (ZXDH_MSIX_INTR_MSG_VEC_NUM + ZXDH_MSIX_INTR_DTB_VEC_NUM + 1) 213630ac8bSJunlong Wang #define ZXDH_QUEUE_INTR_VEC_BASE (ZXDH_MSIX_INTR_DTB_VEC + ZXDH_MSIX_INTR_DTB_VEC_NUM) 223630ac8bSJunlong Wang #define ZXDH_QUEUE_INTR_VEC_NUM 256 23d2fc5332SJunlong Wang 24d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_POLLING_SPAN 100 25d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_POLL_CNT_PER_MS (1 * 1000 / ZXDH_BAR_MSG_POLLING_SPAN) 26d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_POLL_CNT_PER_S (1 * 1000 * 1000 / ZXDH_BAR_MSG_POLLING_SPAN) 27d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_TIMEOUT_TH (10 * 1000 * 1000 / ZXDH_BAR_MSG_POLLING_SPAN) 28d2fc5332SJunlong Wang 29d2fc5332SJunlong Wang #define ZXDH_BAR_CHAN_MSG_SYNC 0 30d2fc5332SJunlong Wang 31d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_ADDR_CHAN_INTERVAL (2 * 1024) /* channel size */ 32d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_PLAYLOAD_OFFSET (sizeof(struct zxdh_bar_msg_header)) 33d2fc5332SJunlong Wang #define ZXDH_BAR_MSG_PAYLOAD_MAX_LEN \ 34d2fc5332SJunlong Wang (ZXDH_BAR_MSG_ADDR_CHAN_INTERVAL - sizeof(struct zxdh_bar_msg_header)) 359d80d592SJunlong Wang 369d80d592SJunlong Wang enum ZXDH_DRIVER_TYPE { 379d80d592SJunlong Wang ZXDH_MSG_CHAN_END_MPF = 0, 389d80d592SJunlong Wang ZXDH_MSG_CHAN_END_PF, 399d80d592SJunlong Wang ZXDH_MSG_CHAN_END_VF, 409d80d592SJunlong Wang ZXDH_MSG_CHAN_END_RISC, 419d80d592SJunlong Wang }; 429d80d592SJunlong Wang 43d2fc5332SJunlong Wang enum ZXDH_MSG_VEC { 44d2fc5332SJunlong Wang ZXDH_MSIX_FROM_PFVF = ZXDH_MSIX_INTR_MSG_VEC_BASE, 45d2fc5332SJunlong Wang ZXDH_MSIX_FROM_MPF, 46d2fc5332SJunlong Wang ZXDH_MSIX_FROM_RISCV, 47d2fc5332SJunlong Wang ZXDH_MSG_VEC_NUM, 48d2fc5332SJunlong Wang }; 49d2fc5332SJunlong Wang 509d80d592SJunlong Wang enum ZXDH_BAR_MSG_RTN { 519d80d592SJunlong Wang ZXDH_BAR_MSG_OK = 0, 529d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_MSGID, 539d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_NULL, 549d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_TYPE, /* Message type exception */ 559d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_MODULE, /* Module ID exception */ 569d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_BODY_NULL, /* Message body exception */ 579d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_LEN, /* Message length exception */ 589d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_TIME_OUT, /* Message sending length too long */ 599d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_NOT_READY, /* Abnormal message sending conditions*/ 609d80d592SJunlong Wang ZXDH_BAR_MEG_ERR_NULL_FUNC, /* Empty receive processing function pointer*/ 619d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_REPEAT_REGISTER, /* Module duplicate registration*/ 629d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_UNGISTER, /* Repeated deregistration*/ 639d80d592SJunlong Wang /* 649d80d592SJunlong Wang * The sending interface parameter boundary structure pointer is empty 659d80d592SJunlong Wang */ 669d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_NULL_PARA, 679d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_REPSBUFF_LEN, /* The length of reps_buff is too short*/ 689d80d592SJunlong Wang /* 699d80d592SJunlong Wang * Unable to find the corresponding message processing function for this module 709d80d592SJunlong Wang */ 719d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_MODULE_NOEXIST, 729d80d592SJunlong Wang /* 739d80d592SJunlong Wang * The virtual address in the parameters passed in by the sending interface is empty 749d80d592SJunlong Wang */ 759d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_VIRTADDR_NULL, 769d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_REPLY, /* sync msg resp_error */ 779d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_MPF_NOT_SCANNED, 789d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_KERNEL_READY, 799d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_USR_RET_ERR, 809d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_ERR_PCIEID, 819d80d592SJunlong Wang ZXDH_BAR_MSG_ERR_SOCKET, /* netlink sockte err */ 829d80d592SJunlong Wang }; 839d80d592SJunlong Wang 84d2fc5332SJunlong Wang enum ZXDH_BAR_MODULE_ID { 85d2fc5332SJunlong Wang ZXDH_BAR_MODULE_DBG = 0, /* 0: debug */ 86d2fc5332SJunlong Wang ZXDH_BAR_MODULE_TBL, /* 1: resource table */ 87d2fc5332SJunlong Wang ZXDH_BAR_MODULE_MISX, /* 2: config msix */ 88d2fc5332SJunlong Wang ZXDH_BAR_MODULE_SDA, /* 3: */ 89d2fc5332SJunlong Wang ZXDH_BAR_MODULE_RDMA, /* 4: */ 90d2fc5332SJunlong Wang ZXDH_BAR_MODULE_DEMO, /* 5: channel test */ 91d2fc5332SJunlong Wang ZXDH_BAR_MODULE_SMMU, /* 6: */ 92d2fc5332SJunlong Wang ZXDH_BAR_MODULE_MAC, /* 7: mac rx/tx stats */ 93d2fc5332SJunlong Wang ZXDH_BAR_MODULE_VDPA, /* 8: vdpa live migration */ 94d2fc5332SJunlong Wang ZXDH_BAR_MODULE_VQM, /* 9: vqm live migration */ 95d2fc5332SJunlong Wang ZXDH_BAR_MODULE_NP, /* 10: vf msg callback np */ 96d2fc5332SJunlong Wang ZXDH_BAR_MODULE_VPORT, /* 11: get vport */ 97d2fc5332SJunlong Wang ZXDH_BAR_MODULE_BDF, /* 12: get bdf */ 98d2fc5332SJunlong Wang ZXDH_BAR_MODULE_RISC_READY, /* 13: */ 99d2fc5332SJunlong Wang ZXDH_BAR_MODULE_REVERSE, /* 14: byte stream reverse */ 100d2fc5332SJunlong Wang ZXDH_BAR_MDOULE_NVME, /* 15: */ 101d2fc5332SJunlong Wang ZXDH_BAR_MDOULE_NPSDK, /* 16: */ 102d2fc5332SJunlong Wang ZXDH_BAR_MODULE_NP_TODO, /* 17: */ 103d2fc5332SJunlong Wang ZXDH_MODULE_BAR_MSG_TO_PF, /* 18: */ 104d2fc5332SJunlong Wang ZXDH_MODULE_BAR_MSG_TO_VF, /* 19: */ 105d2fc5332SJunlong Wang 106d2fc5332SJunlong Wang ZXDH_MODULE_FLASH = 32, 107d2fc5332SJunlong Wang ZXDH_BAR_MODULE_OFFSET_GET = 33, 108d2fc5332SJunlong Wang ZXDH_BAR_EVENT_OVS_WITH_VCB = 36, 109d2fc5332SJunlong Wang 110d2fc5332SJunlong Wang ZXDH_BAR_MSG_MODULE_NUM = 100, 111d2fc5332SJunlong Wang }; 112d2fc5332SJunlong Wang 1136310e397SJunlong Wang enum ZXDH_RES_TBL_FILED { 1146310e397SJunlong Wang ZXDH_TBL_FIELD_PCIEID = 0, 1156310e397SJunlong Wang ZXDH_TBL_FIELD_BDF = 1, 1166310e397SJunlong Wang ZXDH_TBL_FIELD_MSGCH = 2, 1176310e397SJunlong Wang ZXDH_TBL_FIELD_DATACH = 3, 1186310e397SJunlong Wang ZXDH_TBL_FIELD_VPORT = 4, 1196310e397SJunlong Wang ZXDH_TBL_FIELD_PNLID = 5, 1206310e397SJunlong Wang ZXDH_TBL_FIELD_PHYPORT = 6, 1216310e397SJunlong Wang ZXDH_TBL_FIELD_SERDES_NUM = 7, 1226310e397SJunlong Wang ZXDH_TBL_FIELD_NP_PORT = 8, 1236310e397SJunlong Wang ZXDH_TBL_FIELD_SPEED = 9, 1246310e397SJunlong Wang ZXDH_TBL_FIELD_HASHID = 10, 1256310e397SJunlong Wang ZXDH_TBL_FIELD_NON, 1266310e397SJunlong Wang }; 1276310e397SJunlong Wang 1286310e397SJunlong Wang enum ZXDH_TBL_MSG_TYPE { 1296310e397SJunlong Wang ZXDH_TBL_TYPE_READ, 1306310e397SJunlong Wang ZXDH_TBL_TYPE_WRITE, 1316310e397SJunlong Wang ZXDH_TBL_TYPE_NON, 1326310e397SJunlong Wang }; 1336310e397SJunlong Wang 134d2fc5332SJunlong Wang struct zxdh_msix_para { 135d2fc5332SJunlong Wang uint16_t pcie_id; 136d2fc5332SJunlong Wang uint16_t vector_risc; 137d2fc5332SJunlong Wang uint16_t vector_pfvf; 138d2fc5332SJunlong Wang uint16_t vector_mpf; 139d2fc5332SJunlong Wang uint64_t virt_addr; 140d2fc5332SJunlong Wang uint16_t driver_type; /* refer to DRIVER_TYPE */ 141d2fc5332SJunlong Wang }; 142d2fc5332SJunlong Wang 143d2fc5332SJunlong Wang struct zxdh_msix_msg { 144d2fc5332SJunlong Wang uint16_t pcie_id; 145d2fc5332SJunlong Wang uint16_t vector_risc; 146d2fc5332SJunlong Wang uint16_t vector_pfvf; 147d2fc5332SJunlong Wang uint16_t vector_mpf; 148d2fc5332SJunlong Wang }; 149d2fc5332SJunlong Wang 150d2fc5332SJunlong Wang struct zxdh_pci_bar_msg { 151d2fc5332SJunlong Wang uint64_t virt_addr; /* bar addr */ 152d2fc5332SJunlong Wang void *payload_addr; 153d2fc5332SJunlong Wang uint16_t payload_len; 154d2fc5332SJunlong Wang uint16_t emec; 155d2fc5332SJunlong Wang uint16_t src; /* refer to BAR_DRIVER_TYPE */ 156d2fc5332SJunlong Wang uint16_t dst; /* refer to BAR_DRIVER_TYPE */ 157d2fc5332SJunlong Wang uint16_t module_id; 158d2fc5332SJunlong Wang uint16_t src_pcieid; 159d2fc5332SJunlong Wang uint16_t dst_pcieid; 160d2fc5332SJunlong Wang uint16_t usr; 161d2fc5332SJunlong Wang }; 162d2fc5332SJunlong Wang 163*e7750639SAndre Muezerie struct __rte_packed_begin zxdh_bar_msix_reps { 164d2fc5332SJunlong Wang uint16_t pcie_id; 165d2fc5332SJunlong Wang uint16_t check; 166d2fc5332SJunlong Wang uint16_t vport; 167d2fc5332SJunlong Wang uint16_t rsv; 168*e7750639SAndre Muezerie } __rte_packed_end; 169d2fc5332SJunlong Wang 170*e7750639SAndre Muezerie struct __rte_packed_begin zxdh_bar_offset_reps { 171d2fc5332SJunlong Wang uint16_t check; 172d2fc5332SJunlong Wang uint16_t rsv; 173d2fc5332SJunlong Wang uint32_t offset; 174d2fc5332SJunlong Wang uint32_t length; 175*e7750639SAndre Muezerie } __rte_packed_end; 176d2fc5332SJunlong Wang 177*e7750639SAndre Muezerie struct __rte_packed_begin zxdh_bar_recv_msg { 178d2fc5332SJunlong Wang uint8_t reps_ok; 179d2fc5332SJunlong Wang uint16_t reps_len; 180d2fc5332SJunlong Wang uint8_t rsv; 181*e7750639SAndre Muezerie union __rte_packed_begin { 182d2fc5332SJunlong Wang struct zxdh_bar_msix_reps msix_reps; 183d2fc5332SJunlong Wang struct zxdh_bar_offset_reps offset_reps; 184*e7750639SAndre Muezerie } __rte_packed_end; 185*e7750639SAndre Muezerie } __rte_packed_end; 186d2fc5332SJunlong Wang 187d2fc5332SJunlong Wang struct zxdh_msg_recviver_mem { 188d2fc5332SJunlong Wang void *recv_buffer; /* first 4B is head, followed by payload */ 189d2fc5332SJunlong Wang uint64_t buffer_len; 190d2fc5332SJunlong Wang }; 191d2fc5332SJunlong Wang 192d2fc5332SJunlong Wang struct zxdh_bar_msg_header { 193d2fc5332SJunlong Wang uint8_t valid : 1; /* used by __bar_chan_msg_valid_set/get */ 194d2fc5332SJunlong Wang uint8_t sync : 1; 195d2fc5332SJunlong Wang uint8_t emec : 1; /* emergency */ 196d2fc5332SJunlong Wang uint8_t ack : 1; /* ack msg */ 197d2fc5332SJunlong Wang uint8_t poll : 1; 198d2fc5332SJunlong Wang uint8_t usr : 1; 199d2fc5332SJunlong Wang uint8_t rsv; 200d2fc5332SJunlong Wang uint16_t module_id; 201d2fc5332SJunlong Wang uint16_t len; 202d2fc5332SJunlong Wang uint16_t msg_id; 203d2fc5332SJunlong Wang uint16_t src_pcieid; 204d2fc5332SJunlong Wang uint16_t dst_pcieid; /* used in PF-->VF */ 205d2fc5332SJunlong Wang }; 206d2fc5332SJunlong Wang 2073630ac8bSJunlong Wang typedef int (*zxdh_bar_chan_msg_recv_callback)(void *pay_load, uint16_t len, 2083630ac8bSJunlong Wang void *reps_buffer, uint16_t *reps_len, void *dev); 2093630ac8bSJunlong Wang 2109d80d592SJunlong Wang int zxdh_msg_chan_init(void); 2119d80d592SJunlong Wang int zxdh_bar_msg_chan_exit(void); 2129d80d592SJunlong Wang int zxdh_msg_chan_hwlock_init(struct rte_eth_dev *dev); 2139d80d592SJunlong Wang 214d2fc5332SJunlong Wang int zxdh_msg_chan_enable(struct rte_eth_dev *dev); 215d2fc5332SJunlong Wang int zxdh_bar_chan_sync_msg_send(struct zxdh_pci_bar_msg *in, 216d2fc5332SJunlong Wang struct zxdh_msg_recviver_mem *result); 217d2fc5332SJunlong Wang 2183630ac8bSJunlong Wang int zxdh_bar_irq_recv(uint8_t src, uint8_t dst, uint64_t virt_addr, void *dev); 2193630ac8bSJunlong Wang 2209d80d592SJunlong Wang #endif /* ZXDH_MSG_H */ 221