1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2014 Intel Corporation 3 */ 4 5 #ifndef _VIRTIO_PCI_H_ 6 #define _VIRTIO_PCI_H_ 7 8 #include <stdint.h> 9 #include <stdbool.h> 10 11 #include <rte_pci.h> 12 #include <rte_bus_pci.h> 13 #include <rte_ethdev_driver.h> 14 15 struct virtqueue; 16 struct virtnet_ctl; 17 18 /* VirtIO PCI vendor/device ID. */ 19 #define VIRTIO_PCI_VENDORID 0x1AF4 20 #define VIRTIO_PCI_LEGACY_DEVICEID_NET 0x1000 21 #define VIRTIO_PCI_MODERN_DEVICEID_NET 0x1041 22 23 /* VirtIO ABI version, this must match exactly. */ 24 #define VIRTIO_PCI_ABI_VERSION 0 25 26 /* 27 * VirtIO Header, located in BAR 0. 28 */ 29 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/ 30 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */ 31 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */ 32 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */ 33 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */ 34 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */ 35 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */ 36 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading 37 * also clears the register (8, RO) */ 38 /* Only if MSIX is enabled: */ 39 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */ 40 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications 41 (16, RW) */ 42 43 /* The bit of the ISR which indicates a device has an interrupt. */ 44 #define VIRTIO_PCI_ISR_INTR 0x1 45 /* The bit of the ISR which indicates a device configuration change. */ 46 #define VIRTIO_PCI_ISR_CONFIG 0x2 47 /* Vector value used to disable MSI for queue. */ 48 #define VIRTIO_MSI_NO_VECTOR 0xFFFF 49 50 /* VirtIO device IDs. */ 51 #define VIRTIO_ID_NETWORK 0x01 52 #define VIRTIO_ID_BLOCK 0x02 53 #define VIRTIO_ID_CONSOLE 0x03 54 #define VIRTIO_ID_ENTROPY 0x04 55 #define VIRTIO_ID_BALLOON 0x05 56 #define VIRTIO_ID_IOMEMORY 0x06 57 #define VIRTIO_ID_9P 0x09 58 59 /* Status byte for guest to report progress. */ 60 #define VIRTIO_CONFIG_STATUS_RESET 0x00 61 #define VIRTIO_CONFIG_STATUS_ACK 0x01 62 #define VIRTIO_CONFIG_STATUS_DRIVER 0x02 63 #define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04 64 #define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08 65 #define VIRTIO_CONFIG_STATUS_DEV_NEED_RESET 0x40 66 #define VIRTIO_CONFIG_STATUS_FAILED 0x80 67 68 /* 69 * Each virtqueue indirect descriptor list must be physically contiguous. 70 * To allow us to malloc(9) each list individually, limit the number 71 * supported to what will fit in one page. With 4KB pages, this is a limit 72 * of 256 descriptors. If there is ever a need for more, we can switch to 73 * contigmalloc(9) for the larger allocations, similar to what 74 * bus_dmamem_alloc(9) does. 75 * 76 * Note the sizeof(struct vring_desc) is 16 bytes. 77 */ 78 #define VIRTIO_MAX_INDIRECT ((int) (PAGE_SIZE / 16)) 79 80 /* The feature bitmap for virtio net */ 81 #define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */ 82 #define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */ 83 #define VIRTIO_NET_F_MTU 3 /* Initial MTU advice. */ 84 #define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */ 85 #define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */ 86 #define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */ 87 #define VIRTIO_NET_F_GUEST_ECN 9 /* Guest can handle TSO[6] w/ ECN in. */ 88 #define VIRTIO_NET_F_GUEST_UFO 10 /* Guest can handle UFO in. */ 89 #define VIRTIO_NET_F_HOST_TSO4 11 /* Host can handle TSOv4 in. */ 90 #define VIRTIO_NET_F_HOST_TSO6 12 /* Host can handle TSOv6 in. */ 91 #define VIRTIO_NET_F_HOST_ECN 13 /* Host can handle TSO[6] w/ ECN in. */ 92 #define VIRTIO_NET_F_HOST_UFO 14 /* Host can handle UFO in. */ 93 #define VIRTIO_NET_F_MRG_RXBUF 15 /* Host can merge receive buffers. */ 94 #define VIRTIO_NET_F_STATUS 16 /* virtio_net_config.status available */ 95 #define VIRTIO_NET_F_CTRL_VQ 17 /* Control channel available */ 96 #define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */ 97 #define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */ 98 #define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */ 99 #define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the 100 * network */ 101 #define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow 102 * Steering */ 103 #define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */ 104 105 /* Do we get callbacks when the ring is completely used, even if we've 106 * suppressed them? */ 107 #define VIRTIO_F_NOTIFY_ON_EMPTY 24 108 109 /* Can the device handle any descriptor layout? */ 110 #define VIRTIO_F_ANY_LAYOUT 27 111 112 /* We support indirect buffer descriptors */ 113 #define VIRTIO_RING_F_INDIRECT_DESC 28 114 115 #define VIRTIO_F_VERSION_1 32 116 #define VIRTIO_F_IOMMU_PLATFORM 33 117 #define VIRTIO_F_RING_PACKED 34 118 119 /* 120 * Some VirtIO feature bits (currently bits 28 through 31) are 121 * reserved for the transport being used (eg. virtio_ring), the 122 * rest are per-device feature bits. 123 */ 124 #define VIRTIO_TRANSPORT_F_START 28 125 #define VIRTIO_TRANSPORT_F_END 34 126 127 /* 128 * Inorder feature indicates that all buffers are used by the device 129 * in the same order in which they have been made available. 130 */ 131 #define VIRTIO_F_IN_ORDER 35 132 133 /* 134 * This feature indicates that memory accesses by the driver and the device 135 * are ordered in a way described by the platform. 136 */ 137 #define VIRTIO_F_ORDER_PLATFORM 36 138 139 /* 140 * This feature indicates that the driver passes extra data (besides 141 * identifying the virtqueue) in its device notifications. 142 */ 143 #define VIRTIO_F_NOTIFICATION_DATA 38 144 145 /* Device set linkspeed and duplex */ 146 #define VIRTIO_NET_F_SPEED_DUPLEX 63 147 148 /* The Guest publishes the used index for which it expects an interrupt 149 * at the end of the avail ring. Host should ignore the avail->flags field. */ 150 /* The Host publishes the avail index for which it expects a kick 151 * at the end of the used ring. Guest should ignore the used->flags field. */ 152 #define VIRTIO_RING_F_EVENT_IDX 29 153 154 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */ 155 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */ 156 157 /* 158 * Maximum number of virtqueues per device. 159 */ 160 #define VIRTIO_MAX_VIRTQUEUE_PAIRS 8 161 #define VIRTIO_MAX_VIRTQUEUES (VIRTIO_MAX_VIRTQUEUE_PAIRS * 2 + 1) 162 163 /* Common configuration */ 164 #define VIRTIO_PCI_CAP_COMMON_CFG 1 165 /* Notifications */ 166 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 167 /* ISR Status */ 168 #define VIRTIO_PCI_CAP_ISR_CFG 3 169 /* Device specific configuration */ 170 #define VIRTIO_PCI_CAP_DEVICE_CFG 4 171 /* PCI configuration access */ 172 #define VIRTIO_PCI_CAP_PCI_CFG 5 173 174 /* This is the PCI capability header: */ 175 struct virtio_pci_cap { 176 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 177 uint8_t cap_next; /* Generic PCI field: next ptr. */ 178 uint8_t cap_len; /* Generic PCI field: capability length */ 179 uint8_t cfg_type; /* Identifies the structure. */ 180 uint8_t bar; /* Where to find it. */ 181 uint8_t padding[3]; /* Pad to full dword. */ 182 uint32_t offset; /* Offset within bar. */ 183 uint32_t length; /* Length of the structure, in bytes. */ 184 }; 185 186 struct virtio_pci_notify_cap { 187 struct virtio_pci_cap cap; 188 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 189 }; 190 191 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 192 struct virtio_pci_common_cfg { 193 /* About the whole device. */ 194 uint32_t device_feature_select; /* read-write */ 195 uint32_t device_feature; /* read-only */ 196 uint32_t guest_feature_select; /* read-write */ 197 uint32_t guest_feature; /* read-write */ 198 uint16_t msix_config; /* read-write */ 199 uint16_t num_queues; /* read-only */ 200 uint8_t device_status; /* read-write */ 201 uint8_t config_generation; /* read-only */ 202 203 /* About a specific virtqueue. */ 204 uint16_t queue_select; /* read-write */ 205 uint16_t queue_size; /* read-write, power of 2. */ 206 uint16_t queue_msix_vector; /* read-write */ 207 uint16_t queue_enable; /* read-write */ 208 uint16_t queue_notify_off; /* read-only */ 209 uint32_t queue_desc_lo; /* read-write */ 210 uint32_t queue_desc_hi; /* read-write */ 211 uint32_t queue_avail_lo; /* read-write */ 212 uint32_t queue_avail_hi; /* read-write */ 213 uint32_t queue_used_lo; /* read-write */ 214 uint32_t queue_used_hi; /* read-write */ 215 }; 216 217 struct virtio_hw; 218 219 struct virtio_pci_ops { 220 void (*read_dev_cfg)(struct virtio_hw *hw, size_t offset, 221 void *dst, int len); 222 void (*write_dev_cfg)(struct virtio_hw *hw, size_t offset, 223 const void *src, int len); 224 225 uint8_t (*get_status)(struct virtio_hw *hw); 226 void (*set_status)(struct virtio_hw *hw, uint8_t status); 227 228 uint64_t (*get_features)(struct virtio_hw *hw); 229 void (*set_features)(struct virtio_hw *hw, uint64_t features); 230 231 uint8_t (*get_isr)(struct virtio_hw *hw); 232 233 uint16_t (*set_config_irq)(struct virtio_hw *hw, uint16_t vec); 234 235 uint16_t (*set_queue_irq)(struct virtio_hw *hw, struct virtqueue *vq, 236 uint16_t vec); 237 238 uint16_t (*get_queue_num)(struct virtio_hw *hw, uint16_t queue_id); 239 int (*setup_queue)(struct virtio_hw *hw, struct virtqueue *vq); 240 void (*del_queue)(struct virtio_hw *hw, struct virtqueue *vq); 241 void (*notify_queue)(struct virtio_hw *hw, struct virtqueue *vq); 242 }; 243 244 struct virtio_net_config; 245 246 struct virtio_hw { 247 struct virtnet_ctl *cvq; 248 uint64_t req_guest_features; 249 uint64_t guest_features; 250 uint32_t max_queue_pairs; 251 bool started; 252 uint16_t max_mtu; 253 uint16_t vtnet_hdr_size; 254 uint8_t vlan_strip; 255 uint8_t use_msix; 256 uint8_t modern; 257 uint8_t use_vec_rx; 258 uint8_t use_vec_tx; 259 uint8_t use_inorder_rx; 260 uint8_t use_inorder_tx; 261 uint8_t weak_barriers; 262 bool has_tx_offload; 263 bool has_rx_offload; 264 uint16_t port_id; 265 uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; 266 uint32_t notify_off_multiplier; 267 uint32_t speed; /* link speed in MB */ 268 uint8_t duplex; 269 uint8_t *isr; 270 uint16_t *notify_base; 271 struct virtio_pci_common_cfg *common_cfg; 272 struct virtio_net_config *dev_cfg; 273 void *virtio_user_dev; 274 /* 275 * App management thread and virtio interrupt handler thread 276 * both can change device state, this lock is meant to avoid 277 * such a contention. 278 */ 279 rte_spinlock_t state_lock; 280 struct rte_mbuf **inject_pkts; 281 bool opened; 282 283 struct virtqueue **vqs; 284 }; 285 286 287 /* 288 * While virtio_hw is stored in shared memory, this structure stores 289 * some infos that may vary in the multiple process model locally. 290 * For example, the vtpci_ops pointer. 291 */ 292 struct virtio_hw_internal { 293 const struct virtio_pci_ops *vtpci_ops; 294 struct rte_pci_ioport io; 295 }; 296 297 #define VTPCI_OPS(hw) (virtio_hw_internal[(hw)->port_id].vtpci_ops) 298 #define VTPCI_IO(hw) (&virtio_hw_internal[(hw)->port_id].io) 299 300 extern struct virtio_hw_internal virtio_hw_internal[RTE_MAX_ETHPORTS]; 301 302 303 /* 304 * This structure is just a reference to read 305 * net device specific config space; it just a chodu structure 306 * 307 */ 308 struct virtio_net_config { 309 /* The config defining mac address (if VIRTIO_NET_F_MAC) */ 310 uint8_t mac[RTE_ETHER_ADDR_LEN]; 311 /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */ 312 uint16_t status; 313 uint16_t max_virtqueue_pairs; 314 uint16_t mtu; 315 /* 316 * speed, in units of 1Mb. All values 0 to INT_MAX are legal. 317 * Any other value stands for unknown. 318 */ 319 uint32_t speed; 320 /* 321 * 0x00 - half duplex 322 * 0x01 - full duplex 323 * Any other value stands for unknown. 324 */ 325 uint8_t duplex; 326 327 } __rte_packed; 328 329 /* 330 * How many bits to shift physical queue address written to QUEUE_PFN. 331 * 12 is historical, and due to x86 page size. 332 */ 333 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 334 335 /* The alignment to use between consumer and producer parts of vring. */ 336 #define VIRTIO_PCI_VRING_ALIGN 4096 337 338 enum virtio_msix_status { 339 VIRTIO_MSIX_NONE = 0, 340 VIRTIO_MSIX_DISABLED = 1, 341 VIRTIO_MSIX_ENABLED = 2 342 }; 343 344 static inline int 345 vtpci_with_feature(struct virtio_hw *hw, uint64_t bit) 346 { 347 return (hw->guest_features & (1ULL << bit)) != 0; 348 } 349 350 static inline int 351 vtpci_packed_queue(struct virtio_hw *hw) 352 { 353 return vtpci_with_feature(hw, VIRTIO_F_RING_PACKED); 354 } 355 356 /* 357 * Function declaration from virtio_pci.c 358 */ 359 int vtpci_init(struct rte_pci_device *dev, struct virtio_hw *hw); 360 void vtpci_reset(struct virtio_hw *); 361 362 void vtpci_reinit_complete(struct virtio_hw *); 363 364 uint8_t vtpci_get_status(struct virtio_hw *); 365 void vtpci_set_status(struct virtio_hw *, uint8_t); 366 367 uint64_t vtpci_negotiate_features(struct virtio_hw *, uint64_t); 368 369 void vtpci_write_dev_config(struct virtio_hw *, size_t, const void *, int); 370 371 void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int); 372 373 uint8_t vtpci_isr(struct virtio_hw *); 374 375 enum virtio_msix_status vtpci_msix_detect(struct rte_pci_device *dev); 376 377 extern const struct virtio_pci_ops legacy_ops; 378 extern const struct virtio_pci_ops modern_ops; 379 extern const struct virtio_pci_ops virtio_user_ops; 380 381 #endif /* _VIRTIO_PCI_H_ */ 382