1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _VIRTIO_PCI_H_ 35 #define _VIRTIO_PCI_H_ 36 37 #include <stdint.h> 38 39 #include <rte_pci.h> 40 #include <rte_ethdev.h> 41 42 struct virtqueue; 43 struct virtnet_ctl; 44 45 /* VirtIO PCI vendor/device ID. */ 46 #define VIRTIO_PCI_VENDORID 0x1AF4 47 #define VIRTIO_PCI_DEVICEID_MIN 0x1000 48 #define VIRTIO_PCI_DEVICEID_MAX 0x103F 49 50 /* VirtIO ABI version, this must match exactly. */ 51 #define VIRTIO_PCI_ABI_VERSION 0 52 53 /* 54 * VirtIO Header, located in BAR 0. 55 */ 56 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/ 57 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */ 58 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */ 59 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */ 60 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */ 61 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */ 62 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */ 63 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading 64 * also clears the register (8, RO) */ 65 /* Only if MSIX is enabled: */ 66 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */ 67 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications 68 (16, RW) */ 69 70 /* The bit of the ISR which indicates a device has an interrupt. */ 71 #define VIRTIO_PCI_ISR_INTR 0x1 72 /* The bit of the ISR which indicates a device configuration change. */ 73 #define VIRTIO_PCI_ISR_CONFIG 0x2 74 /* Vector value used to disable MSI for queue. */ 75 #define VIRTIO_MSI_NO_VECTOR 0xFFFF 76 77 /* VirtIO device IDs. */ 78 #define VIRTIO_ID_NETWORK 0x01 79 #define VIRTIO_ID_BLOCK 0x02 80 #define VIRTIO_ID_CONSOLE 0x03 81 #define VIRTIO_ID_ENTROPY 0x04 82 #define VIRTIO_ID_BALLOON 0x05 83 #define VIRTIO_ID_IOMEMORY 0x06 84 #define VIRTIO_ID_9P 0x09 85 86 /* Status byte for guest to report progress. */ 87 #define VIRTIO_CONFIG_STATUS_RESET 0x00 88 #define VIRTIO_CONFIG_STATUS_ACK 0x01 89 #define VIRTIO_CONFIG_STATUS_DRIVER 0x02 90 #define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04 91 #define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08 92 #define VIRTIO_CONFIG_STATUS_FAILED 0x80 93 94 /* 95 * Each virtqueue indirect descriptor list must be physically contiguous. 96 * To allow us to malloc(9) each list individually, limit the number 97 * supported to what will fit in one page. With 4KB pages, this is a limit 98 * of 256 descriptors. If there is ever a need for more, we can switch to 99 * contigmalloc(9) for the larger allocations, similar to what 100 * bus_dmamem_alloc(9) does. 101 * 102 * Note the sizeof(struct vring_desc) is 16 bytes. 103 */ 104 #define VIRTIO_MAX_INDIRECT ((int) (PAGE_SIZE / 16)) 105 106 /* The feature bitmap for virtio net */ 107 #define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */ 108 #define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */ 109 #define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */ 110 #define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */ 111 #define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */ 112 #define VIRTIO_NET_F_GUEST_ECN 9 /* Guest can handle TSO[6] w/ ECN in. */ 113 #define VIRTIO_NET_F_GUEST_UFO 10 /* Guest can handle UFO in. */ 114 #define VIRTIO_NET_F_HOST_TSO4 11 /* Host can handle TSOv4 in. */ 115 #define VIRTIO_NET_F_HOST_TSO6 12 /* Host can handle TSOv6 in. */ 116 #define VIRTIO_NET_F_HOST_ECN 13 /* Host can handle TSO[6] w/ ECN in. */ 117 #define VIRTIO_NET_F_HOST_UFO 14 /* Host can handle UFO in. */ 118 #define VIRTIO_NET_F_MRG_RXBUF 15 /* Host can merge receive buffers. */ 119 #define VIRTIO_NET_F_STATUS 16 /* virtio_net_config.status available */ 120 #define VIRTIO_NET_F_CTRL_VQ 17 /* Control channel available */ 121 #define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */ 122 #define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */ 123 #define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */ 124 #define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the 125 * network */ 126 #define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow 127 * Steering */ 128 #define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */ 129 130 /* Do we get callbacks when the ring is completely used, even if we've 131 * suppressed them? */ 132 #define VIRTIO_F_NOTIFY_ON_EMPTY 24 133 134 /* Can the device handle any descriptor layout? */ 135 #define VIRTIO_F_ANY_LAYOUT 27 136 137 /* We support indirect buffer descriptors */ 138 #define VIRTIO_RING_F_INDIRECT_DESC 28 139 140 #define VIRTIO_F_VERSION_1 32 141 142 /* 143 * Some VirtIO feature bits (currently bits 28 through 31) are 144 * reserved for the transport being used (eg. virtio_ring), the 145 * rest are per-device feature bits. 146 */ 147 #define VIRTIO_TRANSPORT_F_START 28 148 #define VIRTIO_TRANSPORT_F_END 32 149 150 /* The Guest publishes the used index for which it expects an interrupt 151 * at the end of the avail ring. Host should ignore the avail->flags field. */ 152 /* The Host publishes the avail index for which it expects a kick 153 * at the end of the used ring. Guest should ignore the used->flags field. */ 154 #define VIRTIO_RING_F_EVENT_IDX 29 155 156 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */ 157 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */ 158 159 /* 160 * Maximum number of virtqueues per device. 161 */ 162 #define VIRTIO_MAX_VIRTQUEUES 8 163 164 /* Common configuration */ 165 #define VIRTIO_PCI_CAP_COMMON_CFG 1 166 /* Notifications */ 167 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 168 /* ISR Status */ 169 #define VIRTIO_PCI_CAP_ISR_CFG 3 170 /* Device specific configuration */ 171 #define VIRTIO_PCI_CAP_DEVICE_CFG 4 172 /* PCI configuration access */ 173 #define VIRTIO_PCI_CAP_PCI_CFG 5 174 175 /* This is the PCI capability header: */ 176 struct virtio_pci_cap { 177 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 178 uint8_t cap_next; /* Generic PCI field: next ptr. */ 179 uint8_t cap_len; /* Generic PCI field: capability length */ 180 uint8_t cfg_type; /* Identifies the structure. */ 181 uint8_t bar; /* Where to find it. */ 182 uint8_t padding[3]; /* Pad to full dword. */ 183 uint32_t offset; /* Offset within bar. */ 184 uint32_t length; /* Length of the structure, in bytes. */ 185 }; 186 187 struct virtio_pci_notify_cap { 188 struct virtio_pci_cap cap; 189 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 190 }; 191 192 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 193 struct virtio_pci_common_cfg { 194 /* About the whole device. */ 195 uint32_t device_feature_select; /* read-write */ 196 uint32_t device_feature; /* read-only */ 197 uint32_t guest_feature_select; /* read-write */ 198 uint32_t guest_feature; /* read-write */ 199 uint16_t msix_config; /* read-write */ 200 uint16_t num_queues; /* read-only */ 201 uint8_t device_status; /* read-write */ 202 uint8_t config_generation; /* read-only */ 203 204 /* About a specific virtqueue. */ 205 uint16_t queue_select; /* read-write */ 206 uint16_t queue_size; /* read-write, power of 2. */ 207 uint16_t queue_msix_vector; /* read-write */ 208 uint16_t queue_enable; /* read-write */ 209 uint16_t queue_notify_off; /* read-only */ 210 uint32_t queue_desc_lo; /* read-write */ 211 uint32_t queue_desc_hi; /* read-write */ 212 uint32_t queue_avail_lo; /* read-write */ 213 uint32_t queue_avail_hi; /* read-write */ 214 uint32_t queue_used_lo; /* read-write */ 215 uint32_t queue_used_hi; /* read-write */ 216 }; 217 218 struct virtio_hw; 219 220 struct virtio_pci_ops { 221 void (*read_dev_cfg)(struct virtio_hw *hw, size_t offset, 222 void *dst, int len); 223 void (*write_dev_cfg)(struct virtio_hw *hw, size_t offset, 224 const void *src, int len); 225 void (*reset)(struct virtio_hw *hw); 226 227 uint8_t (*get_status)(struct virtio_hw *hw); 228 void (*set_status)(struct virtio_hw *hw, uint8_t status); 229 230 uint64_t (*get_features)(struct virtio_hw *hw); 231 void (*set_features)(struct virtio_hw *hw, uint64_t features); 232 233 uint8_t (*get_isr)(struct virtio_hw *hw); 234 235 uint16_t (*set_config_irq)(struct virtio_hw *hw, uint16_t vec); 236 237 uint16_t (*get_queue_num)(struct virtio_hw *hw, uint16_t queue_id); 238 int (*setup_queue)(struct virtio_hw *hw, struct virtqueue *vq); 239 void (*del_queue)(struct virtio_hw *hw, struct virtqueue *vq); 240 void (*notify_queue)(struct virtio_hw *hw, struct virtqueue *vq); 241 }; 242 243 struct virtio_net_config; 244 245 struct virtio_hw { 246 struct virtnet_ctl *cvq; 247 struct rte_pci_ioport io; 248 uint64_t guest_features; 249 uint32_t max_tx_queues; 250 uint32_t max_rx_queues; 251 uint16_t vtnet_hdr_size; 252 uint8_t vlan_strip; 253 uint8_t use_msix; 254 uint8_t started; 255 uint8_t modern; 256 uint8_t mac_addr[ETHER_ADDR_LEN]; 257 uint32_t notify_off_multiplier; 258 uint8_t *isr; 259 uint16_t *notify_base; 260 struct rte_pci_device *dev; 261 struct virtio_pci_common_cfg *common_cfg; 262 struct virtio_net_config *dev_cfg; 263 const struct virtio_pci_ops *vtpci_ops; 264 void *virtio_user_dev; 265 }; 266 267 /* 268 * This structure is just a reference to read 269 * net device specific config space; it just a chodu structure 270 * 271 */ 272 struct virtio_net_config { 273 /* The config defining mac address (if VIRTIO_NET_F_MAC) */ 274 uint8_t mac[ETHER_ADDR_LEN]; 275 /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */ 276 uint16_t status; 277 uint16_t max_virtqueue_pairs; 278 } __attribute__((packed)); 279 280 /* 281 * How many bits to shift physical queue address written to QUEUE_PFN. 282 * 12 is historical, and due to x86 page size. 283 */ 284 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 285 286 /* The alignment to use between consumer and producer parts of vring. */ 287 #define VIRTIO_PCI_VRING_ALIGN 4096 288 289 static inline int 290 vtpci_with_feature(struct virtio_hw *hw, uint64_t bit) 291 { 292 return (hw->guest_features & (1ULL << bit)) != 0; 293 } 294 295 /* 296 * Function declaration from virtio_pci.c 297 */ 298 int vtpci_init(struct rte_pci_device *, struct virtio_hw *, 299 uint32_t *dev_flags); 300 void vtpci_reset(struct virtio_hw *); 301 302 void vtpci_reinit_complete(struct virtio_hw *); 303 304 uint8_t vtpci_get_status(struct virtio_hw *); 305 void vtpci_set_status(struct virtio_hw *, uint8_t); 306 307 uint64_t vtpci_negotiate_features(struct virtio_hw *, uint64_t); 308 309 void vtpci_write_dev_config(struct virtio_hw *, size_t, const void *, int); 310 311 void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int); 312 313 uint8_t vtpci_isr(struct virtio_hw *); 314 315 uint16_t vtpci_irq_config(struct virtio_hw *, uint16_t); 316 317 #endif /* _VIRTIO_PCI_H_ */ 318