1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2014 Intel Corporation 3 */ 4 5 #ifndef _VIRTIO_PCI_H_ 6 #define _VIRTIO_PCI_H_ 7 8 #include <stdint.h> 9 10 #include <rte_pci.h> 11 #include <rte_bus_pci.h> 12 #include <rte_ethdev_driver.h> 13 14 struct virtqueue; 15 struct virtnet_ctl; 16 17 /* VirtIO PCI vendor/device ID. */ 18 #define VIRTIO_PCI_VENDORID 0x1AF4 19 #define VIRTIO_PCI_LEGACY_DEVICEID_NET 0x1000 20 #define VIRTIO_PCI_MODERN_DEVICEID_NET 0x1041 21 22 /* VirtIO ABI version, this must match exactly. */ 23 #define VIRTIO_PCI_ABI_VERSION 0 24 25 /* 26 * VirtIO Header, located in BAR 0. 27 */ 28 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/ 29 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */ 30 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */ 31 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */ 32 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */ 33 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */ 34 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */ 35 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading 36 * also clears the register (8, RO) */ 37 /* Only if MSIX is enabled: */ 38 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */ 39 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications 40 (16, RW) */ 41 42 /* The bit of the ISR which indicates a device has an interrupt. */ 43 #define VIRTIO_PCI_ISR_INTR 0x1 44 /* The bit of the ISR which indicates a device configuration change. */ 45 #define VIRTIO_PCI_ISR_CONFIG 0x2 46 /* Vector value used to disable MSI for queue. */ 47 #define VIRTIO_MSI_NO_VECTOR 0xFFFF 48 49 /* VirtIO device IDs. */ 50 #define VIRTIO_ID_NETWORK 0x01 51 #define VIRTIO_ID_BLOCK 0x02 52 #define VIRTIO_ID_CONSOLE 0x03 53 #define VIRTIO_ID_ENTROPY 0x04 54 #define VIRTIO_ID_BALLOON 0x05 55 #define VIRTIO_ID_IOMEMORY 0x06 56 #define VIRTIO_ID_9P 0x09 57 58 /* Status byte for guest to report progress. */ 59 #define VIRTIO_CONFIG_STATUS_RESET 0x00 60 #define VIRTIO_CONFIG_STATUS_ACK 0x01 61 #define VIRTIO_CONFIG_STATUS_DRIVER 0x02 62 #define VIRTIO_CONFIG_STATUS_DRIVER_OK 0x04 63 #define VIRTIO_CONFIG_STATUS_FEATURES_OK 0x08 64 #define VIRTIO_CONFIG_STATUS_FAILED 0x80 65 66 /* 67 * Each virtqueue indirect descriptor list must be physically contiguous. 68 * To allow us to malloc(9) each list individually, limit the number 69 * supported to what will fit in one page. With 4KB pages, this is a limit 70 * of 256 descriptors. If there is ever a need for more, we can switch to 71 * contigmalloc(9) for the larger allocations, similar to what 72 * bus_dmamem_alloc(9) does. 73 * 74 * Note the sizeof(struct vring_desc) is 16 bytes. 75 */ 76 #define VIRTIO_MAX_INDIRECT ((int) (PAGE_SIZE / 16)) 77 78 /* The feature bitmap for virtio net */ 79 #define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */ 80 #define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */ 81 #define VIRTIO_NET_F_MTU 3 /* Initial MTU advice. */ 82 #define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */ 83 #define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */ 84 #define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */ 85 #define VIRTIO_NET_F_GUEST_ECN 9 /* Guest can handle TSO[6] w/ ECN in. */ 86 #define VIRTIO_NET_F_GUEST_UFO 10 /* Guest can handle UFO in. */ 87 #define VIRTIO_NET_F_HOST_TSO4 11 /* Host can handle TSOv4 in. */ 88 #define VIRTIO_NET_F_HOST_TSO6 12 /* Host can handle TSOv6 in. */ 89 #define VIRTIO_NET_F_HOST_ECN 13 /* Host can handle TSO[6] w/ ECN in. */ 90 #define VIRTIO_NET_F_HOST_UFO 14 /* Host can handle UFO in. */ 91 #define VIRTIO_NET_F_MRG_RXBUF 15 /* Host can merge receive buffers. */ 92 #define VIRTIO_NET_F_STATUS 16 /* virtio_net_config.status available */ 93 #define VIRTIO_NET_F_CTRL_VQ 17 /* Control channel available */ 94 #define VIRTIO_NET_F_CTRL_RX 18 /* Control channel RX mode support */ 95 #define VIRTIO_NET_F_CTRL_VLAN 19 /* Control channel VLAN filtering */ 96 #define VIRTIO_NET_F_CTRL_RX_EXTRA 20 /* Extra RX mode control support */ 97 #define VIRTIO_NET_F_GUEST_ANNOUNCE 21 /* Guest can announce device on the 98 * network */ 99 #define VIRTIO_NET_F_MQ 22 /* Device supports Receive Flow 100 * Steering */ 101 #define VIRTIO_NET_F_CTRL_MAC_ADDR 23 /* Set MAC address */ 102 103 /* Do we get callbacks when the ring is completely used, even if we've 104 * suppressed them? */ 105 #define VIRTIO_F_NOTIFY_ON_EMPTY 24 106 107 /* Can the device handle any descriptor layout? */ 108 #define VIRTIO_F_ANY_LAYOUT 27 109 110 /* We support indirect buffer descriptors */ 111 #define VIRTIO_RING_F_INDIRECT_DESC 28 112 113 #define VIRTIO_F_VERSION_1 32 114 #define VIRTIO_F_IOMMU_PLATFORM 33 115 116 /* 117 * Some VirtIO feature bits (currently bits 28 through 31) are 118 * reserved for the transport being used (eg. virtio_ring), the 119 * rest are per-device feature bits. 120 */ 121 #define VIRTIO_TRANSPORT_F_START 28 122 #define VIRTIO_TRANSPORT_F_END 34 123 124 /* The Guest publishes the used index for which it expects an interrupt 125 * at the end of the avail ring. Host should ignore the avail->flags field. */ 126 /* The Host publishes the avail index for which it expects a kick 127 * at the end of the used ring. Guest should ignore the used->flags field. */ 128 #define VIRTIO_RING_F_EVENT_IDX 29 129 130 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */ 131 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */ 132 133 /* 134 * Maximum number of virtqueues per device. 135 */ 136 #define VIRTIO_MAX_VIRTQUEUE_PAIRS 8 137 #define VIRTIO_MAX_VIRTQUEUES (VIRTIO_MAX_VIRTQUEUE_PAIRS * 2 + 1) 138 139 /* Common configuration */ 140 #define VIRTIO_PCI_CAP_COMMON_CFG 1 141 /* Notifications */ 142 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 143 /* ISR Status */ 144 #define VIRTIO_PCI_CAP_ISR_CFG 3 145 /* Device specific configuration */ 146 #define VIRTIO_PCI_CAP_DEVICE_CFG 4 147 /* PCI configuration access */ 148 #define VIRTIO_PCI_CAP_PCI_CFG 5 149 150 /* This is the PCI capability header: */ 151 struct virtio_pci_cap { 152 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 153 uint8_t cap_next; /* Generic PCI field: next ptr. */ 154 uint8_t cap_len; /* Generic PCI field: capability length */ 155 uint8_t cfg_type; /* Identifies the structure. */ 156 uint8_t bar; /* Where to find it. */ 157 uint8_t padding[3]; /* Pad to full dword. */ 158 uint32_t offset; /* Offset within bar. */ 159 uint32_t length; /* Length of the structure, in bytes. */ 160 }; 161 162 struct virtio_pci_notify_cap { 163 struct virtio_pci_cap cap; 164 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 165 }; 166 167 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 168 struct virtio_pci_common_cfg { 169 /* About the whole device. */ 170 uint32_t device_feature_select; /* read-write */ 171 uint32_t device_feature; /* read-only */ 172 uint32_t guest_feature_select; /* read-write */ 173 uint32_t guest_feature; /* read-write */ 174 uint16_t msix_config; /* read-write */ 175 uint16_t num_queues; /* read-only */ 176 uint8_t device_status; /* read-write */ 177 uint8_t config_generation; /* read-only */ 178 179 /* About a specific virtqueue. */ 180 uint16_t queue_select; /* read-write */ 181 uint16_t queue_size; /* read-write, power of 2. */ 182 uint16_t queue_msix_vector; /* read-write */ 183 uint16_t queue_enable; /* read-write */ 184 uint16_t queue_notify_off; /* read-only */ 185 uint32_t queue_desc_lo; /* read-write */ 186 uint32_t queue_desc_hi; /* read-write */ 187 uint32_t queue_avail_lo; /* read-write */ 188 uint32_t queue_avail_hi; /* read-write */ 189 uint32_t queue_used_lo; /* read-write */ 190 uint32_t queue_used_hi; /* read-write */ 191 }; 192 193 struct virtio_hw; 194 195 struct virtio_pci_ops { 196 void (*read_dev_cfg)(struct virtio_hw *hw, size_t offset, 197 void *dst, int len); 198 void (*write_dev_cfg)(struct virtio_hw *hw, size_t offset, 199 const void *src, int len); 200 void (*reset)(struct virtio_hw *hw); 201 202 uint8_t (*get_status)(struct virtio_hw *hw); 203 void (*set_status)(struct virtio_hw *hw, uint8_t status); 204 205 uint64_t (*get_features)(struct virtio_hw *hw); 206 void (*set_features)(struct virtio_hw *hw, uint64_t features); 207 208 uint8_t (*get_isr)(struct virtio_hw *hw); 209 210 uint16_t (*set_config_irq)(struct virtio_hw *hw, uint16_t vec); 211 212 uint16_t (*set_queue_irq)(struct virtio_hw *hw, struct virtqueue *vq, 213 uint16_t vec); 214 215 uint16_t (*get_queue_num)(struct virtio_hw *hw, uint16_t queue_id); 216 int (*setup_queue)(struct virtio_hw *hw, struct virtqueue *vq); 217 void (*del_queue)(struct virtio_hw *hw, struct virtqueue *vq); 218 void (*notify_queue)(struct virtio_hw *hw, struct virtqueue *vq); 219 }; 220 221 struct virtio_net_config; 222 223 struct virtio_hw { 224 struct virtnet_ctl *cvq; 225 uint64_t req_guest_features; 226 uint64_t guest_features; 227 uint32_t max_queue_pairs; 228 uint16_t started; 229 uint16_t max_mtu; 230 uint16_t vtnet_hdr_size; 231 uint8_t vlan_strip; 232 uint8_t use_msix; 233 uint8_t modern; 234 uint8_t use_simple_rx; 235 uint8_t use_simple_tx; 236 uint16_t port_id; 237 uint8_t mac_addr[ETHER_ADDR_LEN]; 238 uint32_t notify_off_multiplier; 239 uint8_t *isr; 240 uint16_t *notify_base; 241 struct virtio_pci_common_cfg *common_cfg; 242 struct virtio_net_config *dev_cfg; 243 void *virtio_user_dev; 244 /* 245 * App management thread and virtio interrupt handler thread 246 * both can change device state, this lock is meant to avoid 247 * such a contention. 248 */ 249 rte_spinlock_t state_lock; 250 struct rte_mbuf **inject_pkts; 251 252 struct virtqueue **vqs; 253 }; 254 255 256 /* 257 * While virtio_hw is stored in shared memory, this structure stores 258 * some infos that may vary in the multiple process model locally. 259 * For example, the vtpci_ops pointer. 260 */ 261 struct virtio_hw_internal { 262 const struct virtio_pci_ops *vtpci_ops; 263 struct rte_pci_ioport io; 264 }; 265 266 #define VTPCI_OPS(hw) (virtio_hw_internal[(hw)->port_id].vtpci_ops) 267 #define VTPCI_IO(hw) (&virtio_hw_internal[(hw)->port_id].io) 268 269 extern struct virtio_hw_internal virtio_hw_internal[RTE_MAX_ETHPORTS]; 270 271 272 /* 273 * This structure is just a reference to read 274 * net device specific config space; it just a chodu structure 275 * 276 */ 277 struct virtio_net_config { 278 /* The config defining mac address (if VIRTIO_NET_F_MAC) */ 279 uint8_t mac[ETHER_ADDR_LEN]; 280 /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */ 281 uint16_t status; 282 uint16_t max_virtqueue_pairs; 283 uint16_t mtu; 284 } __attribute__((packed)); 285 286 /* 287 * How many bits to shift physical queue address written to QUEUE_PFN. 288 * 12 is historical, and due to x86 page size. 289 */ 290 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 291 292 /* The alignment to use between consumer and producer parts of vring. */ 293 #define VIRTIO_PCI_VRING_ALIGN 4096 294 295 enum virtio_msix_status { 296 VIRTIO_MSIX_NONE = 0, 297 VIRTIO_MSIX_DISABLED = 1, 298 VIRTIO_MSIX_ENABLED = 2 299 }; 300 301 static inline int 302 vtpci_with_feature(struct virtio_hw *hw, uint64_t bit) 303 { 304 return (hw->guest_features & (1ULL << bit)) != 0; 305 } 306 307 /* 308 * Function declaration from virtio_pci.c 309 */ 310 int vtpci_init(struct rte_pci_device *dev, struct virtio_hw *hw); 311 void vtpci_reset(struct virtio_hw *); 312 313 void vtpci_reinit_complete(struct virtio_hw *); 314 315 uint8_t vtpci_get_status(struct virtio_hw *); 316 void vtpci_set_status(struct virtio_hw *, uint8_t); 317 318 uint64_t vtpci_negotiate_features(struct virtio_hw *, uint64_t); 319 320 void vtpci_write_dev_config(struct virtio_hw *, size_t, const void *, int); 321 322 void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int); 323 324 uint8_t vtpci_isr(struct virtio_hw *); 325 326 enum virtio_msix_status vtpci_msix_detect(struct rte_pci_device *dev); 327 328 extern const struct virtio_pci_ops legacy_ops; 329 extern const struct virtio_pci_ops modern_ops; 330 extern const struct virtio_pci_ops virtio_user_ops; 331 332 #endif /* _VIRTIO_PCI_H_ */ 333