1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2024 Realtek Corporation. All rights reserved 3 */ 4 5 #ifndef R8169_ETHDEV_H 6 #define R8169_ETHDEV_H 7 8 #include <stdint.h> 9 10 #include <rte_ethdev.h> 11 #include <rte_ethdev_core.h> 12 13 #include "r8169_compat.h" 14 15 struct rtl_hw; 16 17 struct rtl_hw_ops { 18 void (*hw_init_rxcfg)(struct rtl_hw *hw); 19 void (*hw_ephy_config)(struct rtl_hw *hw); 20 void (*hw_phy_config)(struct rtl_hw *hw); 21 void (*hw_mac_mcu_config)(struct rtl_hw *hw); 22 void (*hw_phy_mcu_config)(struct rtl_hw *hw); 23 }; 24 25 /* Flow control settings */ 26 enum rtl_fc_mode { 27 rtl_fc_none = 0, 28 rtl_fc_rx_pause, 29 rtl_fc_tx_pause, 30 rtl_fc_full, 31 rtl_fc_default 32 }; 33 34 struct rtl_hw { 35 struct rtl_hw_ops hw_ops; 36 u8 *mmio_addr; 37 u8 *cmac_ioaddr; /* cmac memory map physical address */ 38 u8 chipset_name; 39 u8 efuse_ver; 40 u8 HwIcVerUnknown; 41 u32 mcfg; 42 u32 mtu; 43 u8 HwSuppIntMitiVer; 44 u16 cur_page; 45 u8 mac_addr[MAC_ADDR_LEN]; 46 u32 rx_buf_sz; 47 48 struct rtl_counters *tally_vaddr; 49 u64 tally_paddr; 50 51 u8 RequirePhyMdiSwapPatch; 52 u8 NotWrMcuPatchCode; 53 u8 HwSuppMacMcuVer; 54 u16 MacMcuPageSize; 55 56 u8 NotWrRamCodeToMicroP; 57 u8 HwHasWrRamCodeToMicroP; 58 u8 HwSuppCheckPhyDisableModeVer; 59 60 u16 sw_ram_code_ver; 61 u16 hw_ram_code_ver; 62 63 u8 autoneg; 64 u8 duplex; 65 u32 speed; 66 u32 advertising; 67 enum rtl_fc_mode fcpause; 68 69 u32 HwSuppMaxPhyLinkSpeed; 70 71 u8 HwSuppNowIsOobVer; 72 73 u16 mcu_pme_setting; 74 75 /* Enable Tx No Close */ 76 u8 HwSuppTxNoCloseVer; 77 u8 EnableTxNoClose; 78 u16 hw_clo_ptr_reg; 79 u16 sw_tail_ptr_reg; 80 u32 MaxTxDescPtrMask; 81 u32 NextHwDesCloPtr0; 82 u32 BeginHwDesCloPtr0; 83 84 /* Dash */ 85 u8 HwSuppDashVer; 86 u8 DASH; 87 u8 HwSuppOcpChannelVer; 88 u8 AllowAccessDashOcp; 89 }; 90 91 struct rtl_sw_stats { 92 u64 tx_packets; 93 u64 tx_bytes; 94 u64 tx_errors; 95 u64 rx_packets; 96 u64 rx_bytes; 97 u64 rx_errors; 98 }; 99 100 struct rtl_adapter { 101 struct rtl_hw hw; 102 struct rtl_sw_stats sw_stats; 103 }; 104 105 #define RTL_DEV_PRIVATE(eth_dev) \ 106 ((struct rtl_adapter *)((eth_dev)->data->dev_private)) 107 108 #define R8169_LINK_CHECK_TIMEOUT 50 /* 10s */ 109 #define R8169_LINK_CHECK_INTERVAL 200 /* ms */ 110 111 int rtl_rx_init(struct rte_eth_dev *dev); 112 int rtl_tx_init(struct rte_eth_dev *dev); 113 114 uint16_t rtl_xmit_pkts(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); 115 uint16_t rtl_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); 116 uint16_t rtl_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, 117 uint16_t nb_pkts); 118 119 void rtl_rx_queue_release(struct rte_eth_dev *dev, uint16_t rx_queue_id); 120 void rtl_tx_queue_release(struct rte_eth_dev *dev, uint16_t tx_queue_id); 121 122 void rtl_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 123 struct rte_eth_rxq_info *qinfo); 124 void rtl_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 125 struct rte_eth_txq_info *qinfo); 126 127 uint64_t rtl_get_rx_port_offloads(void); 128 uint64_t rtl_get_tx_port_offloads(void); 129 130 int rtl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 131 uint16_t nb_rx_desc, unsigned int socket_id, 132 const struct rte_eth_rxconf *rx_conf, 133 struct rte_mempool *mb_pool); 134 int rtl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 135 uint16_t nb_tx_desc, unsigned int socket_id, 136 const struct rte_eth_txconf *tx_conf); 137 138 int rtl_tx_done_cleanup(void *tx_queue, uint32_t free_cnt); 139 140 int rtl_stop_queues(struct rte_eth_dev *dev); 141 void rtl_free_queues(struct rte_eth_dev *dev); 142 143 #endif /* R8169_ETHDEV_H */ 144