1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #ifndef __ECORE_MCP_API_H__ 8 #define __ECORE_MCP_API_H__ 9 10 #include "ecore_status.h" 11 12 struct ecore_mcp_link_speed_params { 13 bool autoneg; 14 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 15 u32 forced_speed; /* In Mb/s */ 16 }; 17 18 struct ecore_mcp_link_pause_params { 19 bool autoneg; 20 bool forced_rx; 21 bool forced_tx; 22 }; 23 24 enum ecore_mcp_eee_mode { 25 ECORE_MCP_EEE_DISABLED, 26 ECORE_MCP_EEE_ENABLED, 27 ECORE_MCP_EEE_UNSUPPORTED 28 }; 29 30 struct ecore_link_eee_params { 31 u32 tx_lpi_timer; 32 #define ECORE_EEE_1G_ADV (1 << 0) 33 #define ECORE_EEE_10G_ADV (1 << 1) 34 /* Capabilities are represented using ECORE_EEE_*_ADV values */ 35 u8 adv_caps; 36 u8 lp_adv_caps; 37 bool enable; 38 bool tx_lpi_enable; 39 }; 40 41 struct ecore_mcp_link_params { 42 struct ecore_mcp_link_speed_params speed; 43 struct ecore_mcp_link_pause_params pause; 44 u32 loopback_mode; /* in PMM_LOOPBACK values */ 45 struct ecore_link_eee_params eee; 46 }; 47 48 struct ecore_mcp_link_capabilities { 49 u32 speed_capabilities; 50 bool default_speed_autoneg; /* In Mb/s */ 51 u32 default_speed; /* In Mb/s */ 52 enum ecore_mcp_eee_mode default_eee; 53 u32 eee_lpi_timer; 54 u8 eee_speed_caps; 55 }; 56 57 struct ecore_mcp_link_state { 58 bool link_up; 59 60 u32 min_pf_rate; /* In Mb/s */ 61 62 /* Actual link speed in Mb/s */ 63 u32 line_speed; 64 65 /* PF max speed in MB/s, deduced from line_speed 66 * according to PF max bandwidth configuration. 67 */ 68 u32 speed; 69 bool full_duplex; 70 71 bool an; 72 bool an_complete; 73 bool parallel_detection; 74 bool pfc_enabled; 75 76 #define ECORE_LINK_PARTNER_SPEED_1G_HD (1 << 0) 77 #define ECORE_LINK_PARTNER_SPEED_1G_FD (1 << 1) 78 #define ECORE_LINK_PARTNER_SPEED_10G (1 << 2) 79 #define ECORE_LINK_PARTNER_SPEED_20G (1 << 3) 80 #define ECORE_LINK_PARTNER_SPEED_25G (1 << 4) 81 #define ECORE_LINK_PARTNER_SPEED_40G (1 << 5) 82 #define ECORE_LINK_PARTNER_SPEED_50G (1 << 6) 83 #define ECORE_LINK_PARTNER_SPEED_100G (1 << 7) 84 u32 partner_adv_speed; 85 86 bool partner_tx_flow_ctrl_en; 87 bool partner_rx_flow_ctrl_en; 88 89 #define ECORE_LINK_PARTNER_SYMMETRIC_PAUSE (1) 90 #define ECORE_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 91 #define ECORE_LINK_PARTNER_BOTH_PAUSE (3) 92 u8 partner_adv_pause; 93 94 bool sfp_tx_fault; 95 96 bool eee_active; 97 u8 eee_adv_caps; 98 u8 eee_lp_adv_caps; 99 }; 100 101 struct ecore_mcp_function_info { 102 u8 pause_on_host; 103 104 enum ecore_pci_personality protocol; 105 106 u8 bandwidth_min; 107 u8 bandwidth_max; 108 109 u8 mac[ETH_ALEN]; 110 111 u64 wwn_port; 112 u64 wwn_node; 113 114 #define ECORE_MCP_VLAN_UNSET (0xffff) 115 u16 ovlan; 116 117 u16 mtu; 118 }; 119 120 #ifndef __EXTRACT__LINUX__ 121 enum ecore_nvm_images { 122 ECORE_NVM_IMAGE_ISCSI_CFG, 123 ECORE_NVM_IMAGE_FCOE_CFG, 124 }; 125 #endif 126 127 struct ecore_mcp_drv_version { 128 u32 version; 129 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 130 }; 131 132 struct ecore_mcp_lan_stats { 133 u64 ucast_rx_pkts; 134 u64 ucast_tx_pkts; 135 u32 fcs_err; 136 }; 137 138 #ifndef ECORE_PROTO_STATS 139 #define ECORE_PROTO_STATS 140 struct ecore_mcp_fcoe_stats { 141 u64 rx_pkts; 142 u64 tx_pkts; 143 u32 fcs_err; 144 u32 login_failure; 145 }; 146 147 struct ecore_mcp_iscsi_stats { 148 u64 rx_pdus; 149 u64 tx_pdus; 150 u64 rx_bytes; 151 u64 tx_bytes; 152 }; 153 154 struct ecore_mcp_rdma_stats { 155 u64 rx_pkts; 156 u64 tx_pkts; 157 u64 rx_bytes; 158 u64 tx_byts; 159 }; 160 161 enum ecore_mcp_protocol_type { 162 ECORE_MCP_LAN_STATS, 163 ECORE_MCP_FCOE_STATS, 164 ECORE_MCP_ISCSI_STATS, 165 ECORE_MCP_RDMA_STATS 166 }; 167 168 union ecore_mcp_protocol_stats { 169 struct ecore_mcp_lan_stats lan_stats; 170 struct ecore_mcp_fcoe_stats fcoe_stats; 171 struct ecore_mcp_iscsi_stats iscsi_stats; 172 struct ecore_mcp_rdma_stats rdma_stats; 173 }; 174 #endif 175 176 enum ecore_ov_client { 177 ECORE_OV_CLIENT_DRV, 178 ECORE_OV_CLIENT_USER, 179 ECORE_OV_CLIENT_VENDOR_SPEC 180 }; 181 182 enum ecore_ov_driver_state { 183 ECORE_OV_DRIVER_STATE_NOT_LOADED, 184 ECORE_OV_DRIVER_STATE_DISABLED, 185 ECORE_OV_DRIVER_STATE_ACTIVE 186 }; 187 188 enum ecore_ov_eswitch { 189 ECORE_OV_ESWITCH_NONE, 190 ECORE_OV_ESWITCH_VEB, 191 ECORE_OV_ESWITCH_VEPA 192 }; 193 194 #define ECORE_MAX_NPIV_ENTRIES 128 195 #define ECORE_WWN_SIZE 8 196 struct ecore_fc_npiv_tbl { 197 u32 count; 198 u8 wwpn[ECORE_MAX_NPIV_ENTRIES][ECORE_WWN_SIZE]; 199 u8 wwnn[ECORE_MAX_NPIV_ENTRIES][ECORE_WWN_SIZE]; 200 }; 201 202 #ifndef __EXTRACT__LINUX__ 203 enum ecore_led_mode { 204 ECORE_LED_MODE_OFF, 205 ECORE_LED_MODE_ON, 206 ECORE_LED_MODE_RESTORE 207 }; 208 #endif 209 210 struct ecore_temperature_sensor { 211 u8 sensor_location; 212 u8 threshold_high; 213 u8 critical; 214 u8 current_temp; 215 }; 216 217 #define ECORE_MAX_NUM_OF_SENSORS 7 218 struct ecore_temperature_info { 219 u32 num_sensors; 220 struct ecore_temperature_sensor sensors[ECORE_MAX_NUM_OF_SENSORS]; 221 }; 222 223 enum ecore_mba_img_idx { 224 ECORE_MBA_LEGACY_IDX, 225 ECORE_MBA_PCI3CLP_IDX, 226 ECORE_MBA_PCI3_IDX, 227 ECORE_MBA_FCODE_IDX, 228 ECORE_EFI_X86_IDX, 229 ECORE_EFI_IPF_IDX, 230 ECORE_EFI_EBC_IDX, 231 ECORE_EFI_X64_IDX, 232 ECORE_MAX_NUM_OF_ROMIMG 233 }; 234 235 struct ecore_mba_vers { 236 u32 mba_vers[ECORE_MAX_NUM_OF_ROMIMG]; 237 }; 238 239 enum ecore_mfw_tlv_type { 240 ECORE_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 241 ECORE_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 242 ECORE_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 243 ECORE_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 244 ECORE_MFW_TLV_MAX = 0x16, 245 }; 246 247 struct ecore_mfw_tlv_generic { 248 u16 feat_flags; 249 bool feat_flags_set; 250 u64 local_mac; 251 bool local_mac_set; 252 u64 additional_mac1; 253 bool additional_mac1_set; 254 u64 additional_mac2; 255 bool additional_mac2_set; 256 u8 drv_state; 257 bool drv_state_set; 258 u8 pxe_progress; 259 bool pxe_progress_set; 260 u64 rx_frames; 261 bool rx_frames_set; 262 u64 rx_bytes; 263 bool rx_bytes_set; 264 u64 tx_frames; 265 bool tx_frames_set; 266 u64 tx_bytes; 267 bool tx_bytes_set; 268 }; 269 270 struct ecore_mfw_tlv_eth { 271 u16 lso_maxoff_size; 272 bool lso_maxoff_size_set; 273 u16 lso_minseg_size; 274 bool lso_minseg_size_set; 275 u8 prom_mode; 276 bool prom_mode_set; 277 u16 tx_descr_size; 278 bool tx_descr_size_set; 279 u16 rx_descr_size; 280 bool rx_descr_size_set; 281 u16 netq_count; 282 bool netq_count_set; 283 u32 tcp4_offloads; 284 bool tcp4_offloads_set; 285 u32 tcp6_offloads; 286 bool tcp6_offloads_set; 287 u16 tx_descr_qdepth; 288 bool tx_descr_qdepth_set; 289 u16 rx_descr_qdepth; 290 bool rx_descr_qdepth_set; 291 u8 iov_offload; 292 bool iov_offload_set; 293 u8 txqs_empty; 294 bool txqs_empty_set; 295 u8 rxqs_empty; 296 bool rxqs_empty_set; 297 u8 num_txqs_full; 298 bool num_txqs_full_set; 299 u8 num_rxqs_full; 300 bool num_rxqs_full_set; 301 }; 302 303 struct ecore_mfw_tlv_fcoe { 304 u8 scsi_timeout; 305 bool scsi_timeout_set; 306 u32 rt_tov; 307 bool rt_tov_set; 308 u32 ra_tov; 309 bool ra_tov_set; 310 u32 ed_tov; 311 bool ed_tov_set; 312 u32 cr_tov; 313 bool cr_tov_set; 314 u8 boot_type; 315 bool boot_type_set; 316 u8 npiv_state; 317 bool npiv_state_set; 318 u32 num_npiv_ids; 319 bool num_npiv_ids_set; 320 u8 switch_name[8]; 321 bool switch_name_set; 322 u16 switch_portnum; 323 bool switch_portnum_set; 324 u8 switch_portid[3]; 325 bool switch_portid_set; 326 u8 vendor_name[8]; 327 bool vendor_name_set; 328 u8 switch_model[8]; 329 bool switch_model_set; 330 u8 switch_fw_version[8]; 331 bool switch_fw_version_set; 332 u8 qos_pri; 333 bool qos_pri_set; 334 u8 port_alias[3]; 335 bool port_alias_set; 336 u8 port_state; 337 bool port_state_set; 338 u16 fip_tx_descr_size; 339 bool fip_tx_descr_size_set; 340 u16 fip_rx_descr_size; 341 bool fip_rx_descr_size_set; 342 u16 link_failures; 343 bool link_failures_set; 344 u8 fcoe_boot_progress; 345 bool fcoe_boot_progress_set; 346 u64 rx_bcast; 347 bool rx_bcast_set; 348 u64 tx_bcast; 349 bool tx_bcast_set; 350 u16 fcoe_txq_depth; 351 bool fcoe_txq_depth_set; 352 u16 fcoe_rxq_depth; 353 bool fcoe_rxq_depth_set; 354 u64 fcoe_rx_frames; 355 bool fcoe_rx_frames_set; 356 u64 fcoe_rx_bytes; 357 bool fcoe_rx_bytes_set; 358 u64 fcoe_tx_frames; 359 bool fcoe_tx_frames_set; 360 u64 fcoe_tx_bytes; 361 bool fcoe_tx_bytes_set; 362 u16 crc_count; 363 bool crc_count_set; 364 u32 crc_err_src_fcid[5]; 365 bool crc_err_src_fcid_set[5]; 366 u8 crc_err_tstamp[5][14]; 367 bool crc_err_tstamp_set[5]; 368 u16 losync_err; 369 bool losync_err_set; 370 u16 losig_err; 371 bool losig_err_set; 372 u16 primtive_err; 373 bool primtive_err_set; 374 u16 disparity_err; 375 bool disparity_err_set; 376 u16 code_violation_err; 377 bool code_violation_err_set; 378 u32 flogi_param[4]; 379 bool flogi_param_set[4]; 380 u8 flogi_tstamp[14]; 381 bool flogi_tstamp_set; 382 u32 flogi_acc_param[4]; 383 bool flogi_acc_param_set[4]; 384 u8 flogi_acc_tstamp[14]; 385 bool flogi_acc_tstamp_set; 386 u32 flogi_rjt; 387 bool flogi_rjt_set; 388 u8 flogi_rjt_tstamp[14]; 389 bool flogi_rjt_tstamp_set; 390 u32 fdiscs; 391 bool fdiscs_set; 392 u8 fdisc_acc; 393 bool fdisc_acc_set; 394 u8 fdisc_rjt; 395 bool fdisc_rjt_set; 396 u8 plogi; 397 bool plogi_set; 398 u8 plogi_acc; 399 bool plogi_acc_set; 400 u8 plogi_rjt; 401 bool plogi_rjt_set; 402 u32 plogi_dst_fcid[5]; 403 bool plogi_dst_fcid_set[5]; 404 u8 plogi_tstamp[5][14]; 405 bool plogi_tstamp_set[5]; 406 u32 plogi_acc_src_fcid[5]; 407 bool plogi_acc_src_fcid_set[5]; 408 u8 plogi_acc_tstamp[5][14]; 409 bool plogi_acc_tstamp_set[5]; 410 u8 tx_plogos; 411 bool tx_plogos_set; 412 u8 plogo_acc; 413 bool plogo_acc_set; 414 u8 plogo_rjt; 415 bool plogo_rjt_set; 416 u32 plogo_src_fcid[5]; 417 bool plogo_src_fcid_set[5]; 418 u8 plogo_tstamp[5][14]; 419 bool plogo_tstamp_set[5]; 420 u8 rx_logos; 421 bool rx_logos_set; 422 u8 tx_accs; 423 bool tx_accs_set; 424 u8 tx_prlis; 425 bool tx_prlis_set; 426 u8 rx_accs; 427 bool rx_accs_set; 428 u8 tx_abts; 429 bool tx_abts_set; 430 u8 rx_abts_acc; 431 bool rx_abts_acc_set; 432 u8 rx_abts_rjt; 433 bool rx_abts_rjt_set; 434 u32 abts_dst_fcid[5]; 435 bool abts_dst_fcid_set[5]; 436 u8 abts_tstamp[5][14]; 437 bool abts_tstamp_set[5]; 438 u8 rx_rscn; 439 bool rx_rscn_set; 440 u32 rx_rscn_nport[4]; 441 bool rx_rscn_nport_set[4]; 442 u8 tx_lun_rst; 443 bool tx_lun_rst_set; 444 u8 abort_task_sets; 445 bool abort_task_sets_set; 446 u8 tx_tprlos; 447 bool tx_tprlos_set; 448 u8 tx_nos; 449 bool tx_nos_set; 450 u8 rx_nos; 451 bool rx_nos_set; 452 u8 ols; 453 bool ols_set; 454 u8 lr; 455 bool lr_set; 456 u8 lrr; 457 bool lrr_set; 458 u8 tx_lip; 459 bool tx_lip_set; 460 u8 rx_lip; 461 bool rx_lip_set; 462 u8 eofa; 463 bool eofa_set; 464 u8 eofni; 465 bool eofni_set; 466 u8 scsi_chks; 467 bool scsi_chks_set; 468 u8 scsi_cond_met; 469 bool scsi_cond_met_set; 470 u8 scsi_busy; 471 bool scsi_busy_set; 472 u8 scsi_inter; 473 bool scsi_inter_set; 474 u8 scsi_inter_cond_met; 475 bool scsi_inter_cond_met_set; 476 u8 scsi_rsv_conflicts; 477 bool scsi_rsv_conflicts_set; 478 u8 scsi_tsk_full; 479 bool scsi_tsk_full_set; 480 u8 scsi_aca_active; 481 bool scsi_aca_active_set; 482 u8 scsi_tsk_abort; 483 bool scsi_tsk_abort_set; 484 u32 scsi_rx_chk[5]; 485 bool scsi_rx_chk_set[5]; 486 u8 scsi_chk_tstamp[5][14]; 487 bool scsi_chk_tstamp_set[5]; 488 }; 489 490 struct ecore_mfw_tlv_iscsi { 491 u8 target_llmnr; 492 bool target_llmnr_set; 493 u8 header_digest; 494 bool header_digest_set; 495 u8 data_digest; 496 bool data_digest_set; 497 u8 auth_method; 498 bool auth_method_set; 499 u16 boot_taget_portal; 500 bool boot_taget_portal_set; 501 u16 frame_size; 502 bool frame_size_set; 503 u16 tx_desc_size; 504 bool tx_desc_size_set; 505 u16 rx_desc_size; 506 bool rx_desc_size_set; 507 u8 boot_progress; 508 bool boot_progress_set; 509 u16 tx_desc_qdepth; 510 bool tx_desc_qdepth_set; 511 u16 rx_desc_qdepth; 512 bool rx_desc_qdepth_set; 513 u64 rx_frames; 514 bool rx_frames_set; 515 u64 rx_bytes; 516 bool rx_bytes_set; 517 u64 tx_frames; 518 bool tx_frames_set; 519 u64 tx_bytes; 520 bool tx_bytes_set; 521 }; 522 523 union ecore_mfw_tlv_data { 524 struct ecore_mfw_tlv_generic generic; 525 struct ecore_mfw_tlv_eth eth; 526 struct ecore_mfw_tlv_fcoe fcoe; 527 struct ecore_mfw_tlv_iscsi iscsi; 528 }; 529 530 enum ecore_hw_info_change { 531 ECORE_HW_INFO_CHANGE_OVLAN, 532 }; 533 534 /** 535 * @brief - returns the link params of the hw function 536 * 537 * @param p_hwfn 538 * 539 * @returns pointer to link params 540 */ 541 struct ecore_mcp_link_params *ecore_mcp_get_link_params(struct ecore_hwfn *); 542 543 /** 544 * @brief - return the link state of the hw function 545 * 546 * @param p_hwfn 547 * 548 * @returns pointer to link state 549 */ 550 struct ecore_mcp_link_state *ecore_mcp_get_link_state(struct ecore_hwfn *); 551 552 /** 553 * @brief - return the link capabilities of the hw function 554 * 555 * @param p_hwfn 556 * 557 * @returns pointer to link capabilities 558 */ 559 struct ecore_mcp_link_capabilities 560 *ecore_mcp_get_link_capabilities(struct ecore_hwfn *p_hwfn); 561 562 /** 563 * @brief Request the MFW to set the link according to 'link_input'. 564 * 565 * @param p_hwfn 566 * @param p_ptt 567 * @param b_up - raise link if `true'. Reset link if `false'. 568 * 569 * @return enum _ecore_status_t 570 */ 571 enum _ecore_status_t ecore_mcp_set_link(struct ecore_hwfn *p_hwfn, 572 struct ecore_ptt *p_ptt, 573 bool b_up); 574 575 /** 576 * @brief Get the management firmware version value 577 * 578 * @param p_hwfn 579 * @param p_ptt 580 * @param p_mfw_ver - mfw version value 581 * @param p_running_bundle_id - image id in nvram; Optional. 582 * 583 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 584 */ 585 enum _ecore_status_t ecore_mcp_get_mfw_ver(struct ecore_hwfn *p_hwfn, 586 struct ecore_ptt *p_ptt, 587 u32 *p_mfw_ver, 588 u32 *p_running_bundle_id); 589 590 /** 591 * @brief Get the MBI version value 592 * 593 * @param p_hwfn 594 * @param p_ptt 595 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version. 596 * 597 * @return int - 0 - operation was successful. 598 */ 599 int ecore_mcp_get_mbi_ver(struct ecore_hwfn *p_hwfn, 600 struct ecore_ptt *p_ptt, u32 *p_mbi_ver); 601 602 /** 603 * @brief Get media type value of the port. 604 * 605 * @param p_dev - ecore dev pointer 606 * @param p_ptt 607 * @param mfw_ver - media type value 608 * 609 * @return enum _ecore_status_t - 610 * ECORE_SUCCESS - Operation was successful. 611 * ECORE_BUSY - Operation failed 612 */ 613 enum _ecore_status_t ecore_mcp_get_media_type(struct ecore_hwfn *p_hwfn, 614 struct ecore_ptt *p_ptt, 615 u32 *media_type); 616 617 /** 618 * @brief Get transceiver data of the port. 619 * 620 * @param p_dev - ecore dev pointer 621 * @param p_ptt 622 * @param p_transceiver_state - transceiver state. 623 * @param p_transceiver_type - media type value 624 * 625 * @return enum _ecore_status_t - 626 * ECORE_SUCCESS - Operation was successful. 627 * ECORE_BUSY - Operation failed 628 */ 629 enum _ecore_status_t ecore_mcp_get_transceiver_data(struct ecore_hwfn *p_hwfn, 630 struct ecore_ptt *p_ptt, 631 u32 *p_transceiver_state, 632 u32 *p_tranceiver_type); 633 634 /** 635 * @brief Get transceiver supported speed mask. 636 * 637 * @param p_dev - ecore dev pointer 638 * @param p_ptt 639 * @param p_speed_mask - Bit mask of all supported speeds. 640 * 641 * @return enum _ecore_status_t - 642 * ECORE_SUCCESS - Operation was successful. 643 * ECORE_BUSY - Operation failed 644 */ 645 646 enum _ecore_status_t ecore_mcp_trans_speed_mask(struct ecore_hwfn *p_hwfn, 647 struct ecore_ptt *p_ptt, 648 u32 *p_speed_mask); 649 650 /** 651 * @brief Get board configuration. 652 * 653 * @param p_dev - ecore dev pointer 654 * @param p_ptt 655 * @param p_board_config - Board config. 656 * 657 * @return enum _ecore_status_t - 658 * ECORE_SUCCESS - Operation was successful. 659 * ECORE_BUSY - Operation failed 660 */ 661 enum _ecore_status_t ecore_mcp_get_board_config(struct ecore_hwfn *p_hwfn, 662 struct ecore_ptt *p_ptt, 663 u32 *p_board_config); 664 665 /** 666 * @brief - Sends a command to the MCP mailbox. 667 * 668 * @param p_hwfn - hw function 669 * @param p_ptt - PTT required for register access 670 * @param cmd - command to be sent to the MCP 671 * @param param - Optional param 672 * @param o_mcp_resp - The MCP response code (exclude sequence) 673 * @param o_mcp_param - Optional parameter provided by the MCP response 674 * 675 * @return enum _ecore_status_t - 676 * ECORE_SUCCESS - operation was successful 677 * ECORE_BUSY - operation failed 678 */ 679 enum _ecore_status_t ecore_mcp_cmd(struct ecore_hwfn *p_hwfn, 680 struct ecore_ptt *p_ptt, u32 cmd, u32 param, 681 u32 *o_mcp_resp, u32 *o_mcp_param); 682 683 /** 684 * @brief - drains the nig, allowing completion to pass in case of pauses. 685 * (Should be called only from sleepable context) 686 * 687 * @param p_hwfn 688 * @param p_ptt 689 */ 690 enum _ecore_status_t ecore_mcp_drain(struct ecore_hwfn *p_hwfn, 691 struct ecore_ptt *p_ptt); 692 693 #ifndef LINUX_REMOVE 694 /** 695 * @brief - return the mcp function info of the hw function 696 * 697 * @param p_hwfn 698 * 699 * @returns pointer to mcp function info 700 */ 701 const struct ecore_mcp_function_info 702 *ecore_mcp_get_function_info(struct ecore_hwfn *p_hwfn); 703 #endif 704 705 #ifndef LINUX_REMOVE 706 /** 707 * @brief - count number of function with a matching personality on engine. 708 * 709 * @param p_hwfn 710 * @param p_ptt 711 * @param personalities - a bitmask of ecore_pci_personality values 712 * 713 * @returns the count of all devices on engine whose personality match one of 714 * the bitsmasks. 715 */ 716 int ecore_mcp_get_personality_cnt(struct ecore_hwfn *p_hwfn, 717 struct ecore_ptt *p_ptt, 718 u32 personalities); 719 #endif 720 721 /** 722 * @brief Get the flash size value 723 * 724 * @param p_hwfn 725 * @param p_ptt 726 * @param p_flash_size - flash size in bytes to be filled. 727 * 728 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 729 */ 730 enum _ecore_status_t ecore_mcp_get_flash_size(struct ecore_hwfn *p_hwfn, 731 struct ecore_ptt *p_ptt, 732 u32 *p_flash_size); 733 734 /** 735 * @brief Send driver version to MFW 736 * 737 * @param p_hwfn 738 * @param p_ptt 739 * @param version - Version value 740 * @param name - Protocol driver name 741 * 742 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 743 */ 744 enum _ecore_status_t 745 ecore_mcp_send_drv_version(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 746 struct ecore_mcp_drv_version *p_ver); 747 748 /** 749 * @brief Read the MFW process kill counter 750 * 751 * @param p_hwfn 752 * @param p_ptt 753 * 754 * @return u32 755 */ 756 u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn, 757 struct ecore_ptt *p_ptt); 758 759 /** 760 * @brief Trigger a recovery process 761 * 762 * @param p_hwfn 763 * @param p_ptt 764 * 765 * @return enum _ecore_status_t 766 */ 767 enum _ecore_status_t ecore_start_recovery_process(struct ecore_hwfn *p_hwfn, 768 struct ecore_ptt *p_ptt); 769 770 /** 771 * @brief A recovery handler must call this function as its first step. 772 * It is assumed that the handler is not run from an interrupt context. 773 * 774 * @param p_dev 775 * @param p_ptt 776 * 777 * @return enum _ecore_status_t 778 */ 779 enum _ecore_status_t ecore_recovery_prolog(struct ecore_dev *p_dev); 780 781 /** 782 * @brief Notify MFW about the change in base device properties 783 * 784 * @param p_hwfn 785 * @param p_ptt 786 * @param client - ecore client type 787 * 788 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 789 */ 790 enum _ecore_status_t 791 ecore_mcp_ov_update_current_config(struct ecore_hwfn *p_hwfn, 792 struct ecore_ptt *p_ptt, 793 enum ecore_ov_client client); 794 795 /** 796 * @brief Notify MFW about the driver state 797 * 798 * @param p_hwfn 799 * @param p_ptt 800 * @param drv_state - Driver state 801 * 802 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 803 */ 804 enum _ecore_status_t 805 ecore_mcp_ov_update_driver_state(struct ecore_hwfn *p_hwfn, 806 struct ecore_ptt *p_ptt, 807 enum ecore_ov_driver_state drv_state); 808 809 /** 810 * @brief Read NPIV settings form the MFW 811 * 812 * @param p_hwfn 813 * @param p_ptt 814 * @param p_table - Array to hold the FC NPIV data. Client need allocate the 815 * required buffer. The field 'count' specifies number of NPIV 816 * entries. A value of 0 means the table was not populated. 817 * 818 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 819 */ 820 enum _ecore_status_t 821 ecore_mcp_ov_get_fc_npiv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 822 struct ecore_fc_npiv_tbl *p_table); 823 824 /** 825 * @brief Send MTU size to MFW 826 * 827 * @param p_hwfn 828 * @param p_ptt 829 * @param mtu - MTU size 830 * 831 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 832 */ 833 enum _ecore_status_t ecore_mcp_ov_update_mtu(struct ecore_hwfn *p_hwfn, 834 struct ecore_ptt *p_ptt, u16 mtu); 835 836 /** 837 * @brief Send MAC address to MFW 838 * 839 * @param p_hwfn 840 * @param p_ptt 841 * @param mac - MAC address 842 * 843 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 844 */ 845 enum _ecore_status_t 846 ecore_mcp_ov_update_mac(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 847 u8 *mac); 848 849 /** 850 * @brief Send eswitch mode to MFW 851 * 852 * @param p_hwfn 853 * @param p_ptt 854 * @param eswitch - eswitch mode 855 * 856 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 857 */ 858 enum _ecore_status_t 859 ecore_mcp_ov_update_eswitch(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 860 enum ecore_ov_eswitch eswitch); 861 862 /** 863 * @brief Set LED status 864 * 865 * @param p_hwfn 866 * @param p_ptt 867 * @param mode - LED mode 868 * 869 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 870 */ 871 enum _ecore_status_t ecore_mcp_set_led(struct ecore_hwfn *p_hwfn, 872 struct ecore_ptt *p_ptt, 873 enum ecore_led_mode mode); 874 875 /** 876 * @brief Set secure mode 877 * 878 * @param p_dev 879 * @param addr - nvm offset 880 * 881 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 882 */ 883 enum _ecore_status_t ecore_mcp_nvm_set_secure_mode(struct ecore_dev *p_dev, 884 u32 addr); 885 886 /** 887 * @brief Write to phy 888 * 889 * @param p_dev 890 * @param addr - nvm offset 891 * @param cmd - nvm command 892 * @param p_buf - nvm write buffer 893 * @param len - buffer len 894 * 895 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 896 */ 897 enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd, 898 u32 addr, u8 *p_buf, u32 len); 899 900 /** 901 * @brief Write to nvm 902 * 903 * @param p_dev 904 * @param addr - nvm offset 905 * @param cmd - nvm command 906 * @param p_buf - nvm write buffer 907 * @param len - buffer len 908 * 909 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 910 */ 911 enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd, 912 u32 addr, u8 *p_buf, u32 len); 913 914 /** 915 * @brief Put file begin 916 * 917 * @param p_dev 918 * @param addr - nvm offset 919 * 920 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 921 */ 922 enum _ecore_status_t ecore_mcp_nvm_put_file_begin(struct ecore_dev *p_dev, 923 u32 addr); 924 925 /** 926 * @brief Delete file 927 * 928 * @param p_dev 929 * @param addr - nvm offset 930 * 931 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 932 */ 933 enum _ecore_status_t ecore_mcp_nvm_del_file(struct ecore_dev *p_dev, 934 u32 addr); 935 936 /** 937 * @brief Check latest response 938 * 939 * @param p_dev 940 * @param p_buf - nvm write buffer 941 * 942 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 943 */ 944 enum _ecore_status_t ecore_mcp_nvm_resp(struct ecore_dev *p_dev, u8 *p_buf); 945 946 /** 947 * @brief Read from phy 948 * 949 * @param p_dev 950 * @param addr - nvm offset 951 * @param cmd - nvm command 952 * @param p_buf - nvm read buffer 953 * @param len - buffer len 954 * 955 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 956 */ 957 enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd, 958 u32 addr, u8 *p_buf, u32 *p_len); 959 960 /** 961 * @brief Read from nvm 962 * 963 * @param p_dev 964 * @param addr - nvm offset 965 * @param p_buf - nvm read buffer 966 * @param len - buffer len 967 * 968 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 969 */ 970 enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr, 971 u8 *p_buf, u32 len); 972 973 /** 974 * @brief - Sends an NVM write command request to the MFW with 975 * payload. 976 * 977 * @param p_hwfn 978 * @param p_ptt 979 * @param cmd - Command: Either DRV_MSG_CODE_NVM_WRITE_NVRAM or 980 * DRV_MSG_CODE_NVM_PUT_FILE_DATA 981 * @param param - [0:23] - Offset [24:31] - Size 982 * @param o_mcp_resp - MCP response 983 * @param o_mcp_param - MCP response param 984 * @param i_txn_size - Buffer size 985 * @param i_buf - Pointer to the buffer 986 * 987 * @param return ECORE_SUCCESS upon success. 988 */ 989 enum _ecore_status_t ecore_mcp_nvm_wr_cmd(struct ecore_hwfn *p_hwfn, 990 struct ecore_ptt *p_ptt, 991 u32 cmd, 992 u32 param, 993 u32 *o_mcp_resp, 994 u32 *o_mcp_param, 995 u32 i_txn_size, 996 u32 *i_buf); 997 998 /** 999 * @brief - Sends an NVM read command request to the MFW to get 1000 * a buffer. 1001 * 1002 * @param p_hwfn 1003 * @param p_ptt 1004 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 1005 * DRV_MSG_CODE_NVM_READ_NVRAM commands 1006 * @param param - [0:23] - Offset [24:31] - Size 1007 * @param o_mcp_resp - MCP response 1008 * @param o_mcp_param - MCP response param 1009 * @param o_txn_size - Buffer size output 1010 * @param o_buf - Pointer to the buffer returned by the MFW. 1011 * 1012 * @param return ECORE_SUCCESS upon success. 1013 */ 1014 enum _ecore_status_t ecore_mcp_nvm_rd_cmd(struct ecore_hwfn *p_hwfn, 1015 struct ecore_ptt *p_ptt, 1016 u32 cmd, 1017 u32 param, 1018 u32 *o_mcp_resp, 1019 u32 *o_mcp_param, 1020 u32 *o_txn_size, 1021 u32 *o_buf); 1022 1023 /** 1024 * @brief Read from sfp 1025 * 1026 * @param p_hwfn - hw function 1027 * @param p_ptt - PTT required for register access 1028 * @param port - transceiver port 1029 * @param addr - I2C address 1030 * @param offset - offset in sfp 1031 * @param len - buffer length 1032 * @param p_buf - buffer to read into 1033 * 1034 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1035 */ 1036 enum _ecore_status_t ecore_mcp_phy_sfp_read(struct ecore_hwfn *p_hwfn, 1037 struct ecore_ptt *p_ptt, 1038 u32 port, u32 addr, u32 offset, 1039 u32 len, u8 *p_buf); 1040 1041 /** 1042 * @brief Write to sfp 1043 * 1044 * @param p_hwfn - hw function 1045 * @param p_ptt - PTT required for register access 1046 * @param port - transceiver port 1047 * @param addr - I2C address 1048 * @param offset - offset in sfp 1049 * @param len - buffer length 1050 * @param p_buf - buffer to write from 1051 * 1052 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1053 */ 1054 enum _ecore_status_t ecore_mcp_phy_sfp_write(struct ecore_hwfn *p_hwfn, 1055 struct ecore_ptt *p_ptt, 1056 u32 port, u32 addr, u32 offset, 1057 u32 len, u8 *p_buf); 1058 1059 /** 1060 * @brief Gpio read 1061 * 1062 * @param p_hwfn - hw function 1063 * @param p_ptt - PTT required for register access 1064 * @param gpio - gpio number 1065 * @param gpio_val - value read from gpio 1066 * 1067 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1068 */ 1069 enum _ecore_status_t ecore_mcp_gpio_read(struct ecore_hwfn *p_hwfn, 1070 struct ecore_ptt *p_ptt, 1071 u16 gpio, u32 *gpio_val); 1072 1073 /** 1074 * @brief Gpio write 1075 * 1076 * @param p_hwfn - hw function 1077 * @param p_ptt - PTT required for register access 1078 * @param gpio - gpio number 1079 * @param gpio_val - value to write to gpio 1080 * 1081 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1082 */ 1083 enum _ecore_status_t ecore_mcp_gpio_write(struct ecore_hwfn *p_hwfn, 1084 struct ecore_ptt *p_ptt, 1085 u16 gpio, u16 gpio_val); 1086 1087 /** 1088 * @brief Gpio get information 1089 * 1090 * @param p_hwfn - hw function 1091 * @param p_ptt - PTT required for register access 1092 * @param gpio - gpio number 1093 * @param gpio_direction - gpio is output (0) or input (1) 1094 * @param gpio_ctrl - gpio control is uninitialized (0), 1095 * path 0 (1), path 1 (2) or shared(3) 1096 * 1097 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1098 */ 1099 enum _ecore_status_t ecore_mcp_gpio_info(struct ecore_hwfn *p_hwfn, 1100 struct ecore_ptt *p_ptt, 1101 u16 gpio, u32 *gpio_direction, 1102 u32 *gpio_ctrl); 1103 1104 /** 1105 * @brief Bist register test 1106 * 1107 * @param p_hwfn - hw function 1108 * @param p_ptt - PTT required for register access 1109 * 1110 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1111 */ 1112 enum _ecore_status_t ecore_mcp_bist_register_test(struct ecore_hwfn *p_hwfn, 1113 struct ecore_ptt *p_ptt); 1114 1115 /** 1116 * @brief Bist clock test 1117 * 1118 * @param p_hwfn - hw function 1119 * @param p_ptt - PTT required for register access 1120 * 1121 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1122 */ 1123 enum _ecore_status_t ecore_mcp_bist_clock_test(struct ecore_hwfn *p_hwfn, 1124 struct ecore_ptt *p_ptt); 1125 1126 /** 1127 * @brief Bist nvm test - get number of images 1128 * 1129 * @param p_hwfn - hw function 1130 * @param p_ptt - PTT required for register access 1131 * @param num_images - number of images if operation was 1132 * successful. 0 if not. 1133 * 1134 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1135 */ 1136 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_num_images( 1137 struct ecore_hwfn *p_hwfn, 1138 struct ecore_ptt *p_ptt, 1139 u32 *num_images); 1140 1141 /** 1142 * @brief Bist nvm test - get image attributes by index 1143 * 1144 * @param p_hwfn - hw function 1145 * @param p_ptt - PTT required for register access 1146 * @param p_image_att - Attributes of image 1147 * @param image_index - Index of image to get information for 1148 * 1149 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1150 */ 1151 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_image_att( 1152 struct ecore_hwfn *p_hwfn, 1153 struct ecore_ptt *p_ptt, 1154 struct bist_nvm_image_att *p_image_att, 1155 u32 image_index); 1156 1157 /** 1158 * @brief ecore_mcp_get_temperature_info - get the status of the temperature 1159 * sensors 1160 * 1161 * @param p_hwfn - hw function 1162 * @param p_ptt - PTT required for register access 1163 * @param p_temp_status - A pointer to an ecore_temperature_info structure to 1164 * be filled with the temperature data 1165 * 1166 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1167 */ 1168 enum _ecore_status_t 1169 ecore_mcp_get_temperature_info(struct ecore_hwfn *p_hwfn, 1170 struct ecore_ptt *p_ptt, 1171 struct ecore_temperature_info *p_temp_info); 1172 1173 /** 1174 * @brief Get MBA versions - get MBA sub images versions 1175 * 1176 * @param p_hwfn - hw function 1177 * @param p_ptt - PTT required for register access 1178 * @param p_mba_vers - MBA versions array to fill 1179 * 1180 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1181 */ 1182 enum _ecore_status_t ecore_mcp_get_mba_versions( 1183 struct ecore_hwfn *p_hwfn, 1184 struct ecore_ptt *p_ptt, 1185 struct ecore_mba_vers *p_mba_vers); 1186 1187 /** 1188 * @brief Count memory ecc events 1189 * 1190 * @param p_hwfn - hw function 1191 * @param p_ptt - PTT required for register access 1192 * @param num_events - number of memory ecc events 1193 * 1194 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1195 */ 1196 enum _ecore_status_t ecore_mcp_mem_ecc_events(struct ecore_hwfn *p_hwfn, 1197 struct ecore_ptt *p_ptt, 1198 u64 *num_events); 1199 1200 struct ecore_mdump_info { 1201 u32 reason; 1202 u32 version; 1203 u32 config; 1204 u32 epoch; 1205 u32 num_of_logs; 1206 u32 valid_logs; 1207 }; 1208 1209 /** 1210 * @brief - Gets the MFW crash dump configuration and logs info. 1211 * 1212 * @param p_hwfn 1213 * @param p_ptt 1214 * @param p_mdump_info 1215 * 1216 * @param return ECORE_SUCCESS upon success. 1217 */ 1218 enum _ecore_status_t 1219 ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1220 struct ecore_mdump_info *p_mdump_info); 1221 1222 /** 1223 * @brief - Clears the MFW crash dump logs. 1224 * 1225 * @param p_hwfn 1226 * @param p_ptt 1227 * 1228 * @param return ECORE_SUCCESS upon success. 1229 */ 1230 enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn, 1231 struct ecore_ptt *p_ptt); 1232 1233 /** 1234 * @brief - Clear the mdump retained data. 1235 * 1236 * @param p_hwfn 1237 * @param p_ptt 1238 * 1239 * @param return ECORE_SUCCESS upon success. 1240 */ 1241 enum _ecore_status_t ecore_mcp_mdump_clr_retain(struct ecore_hwfn *p_hwfn, 1242 struct ecore_ptt *p_ptt); 1243 1244 /** 1245 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 1246 * from the ecore client and send it to the MFW. 1247 * 1248 * @param p_hwfn 1249 * @param p_ptt 1250 * 1251 * @param return ECORE_SUCCESS upon success. 1252 */ 1253 enum _ecore_status_t ecore_mfw_process_tlv_req(struct ecore_hwfn *p_hwfn, 1254 struct ecore_ptt *p_ptt); 1255 1256 1257 /** 1258 * @brief - Return whether management firmware support smart AN 1259 * 1260 * @param p_hwfn 1261 * 1262 * @return bool - true iff feature is supported. 1263 */ 1264 bool ecore_mcp_is_smart_an_supported(struct ecore_hwfn *p_hwfn); 1265 #endif 1266