1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #ifndef __ECORE_MCP_API_H__ 8 #define __ECORE_MCP_API_H__ 9 10 #include "ecore_status.h" 11 12 struct ecore_mcp_link_speed_params { 13 bool autoneg; 14 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */ 15 u32 forced_speed; /* In Mb/s */ 16 }; 17 18 struct ecore_mcp_link_pause_params { 19 bool autoneg; 20 bool forced_rx; 21 bool forced_tx; 22 }; 23 24 enum ecore_mcp_eee_mode { 25 ECORE_MCP_EEE_DISABLED, 26 ECORE_MCP_EEE_ENABLED, 27 ECORE_MCP_EEE_UNSUPPORTED 28 }; 29 30 struct ecore_link_eee_params { 31 u32 tx_lpi_timer; 32 #define ECORE_EEE_1G_ADV (1 << 0) 33 #define ECORE_EEE_10G_ADV (1 << 1) 34 /* Capabilities are represented using ECORE_EEE_*_ADV values */ 35 u8 adv_caps; 36 u8 lp_adv_caps; 37 bool enable; 38 bool tx_lpi_enable; 39 }; 40 41 struct ecore_mcp_link_params { 42 struct ecore_mcp_link_speed_params speed; 43 struct ecore_mcp_link_pause_params pause; 44 u32 loopback_mode; /* in PMM_LOOPBACK values */ 45 struct ecore_link_eee_params eee; 46 }; 47 48 struct ecore_mcp_link_capabilities { 49 u32 speed_capabilities; 50 bool default_speed_autoneg; /* In Mb/s */ 51 u32 default_speed; /* In Mb/s */ 52 enum ecore_mcp_eee_mode default_eee; 53 u32 eee_lpi_timer; 54 u8 eee_speed_caps; 55 }; 56 57 struct ecore_mcp_link_state { 58 bool link_up; 59 60 u32 min_pf_rate; /* In Mb/s */ 61 62 /* Actual link speed in Mb/s */ 63 u32 line_speed; 64 65 /* PF max speed in MB/s, deduced from line_speed 66 * according to PF max bandwidth configuration. 67 */ 68 u32 speed; 69 bool full_duplex; 70 71 bool an; 72 bool an_complete; 73 bool parallel_detection; 74 bool pfc_enabled; 75 76 #define ECORE_LINK_PARTNER_SPEED_1G_HD (1 << 0) 77 #define ECORE_LINK_PARTNER_SPEED_1G_FD (1 << 1) 78 #define ECORE_LINK_PARTNER_SPEED_10G (1 << 2) 79 #define ECORE_LINK_PARTNER_SPEED_20G (1 << 3) 80 #define ECORE_LINK_PARTNER_SPEED_25G (1 << 4) 81 #define ECORE_LINK_PARTNER_SPEED_40G (1 << 5) 82 #define ECORE_LINK_PARTNER_SPEED_50G (1 << 6) 83 #define ECORE_LINK_PARTNER_SPEED_100G (1 << 7) 84 u32 partner_adv_speed; 85 86 bool partner_tx_flow_ctrl_en; 87 bool partner_rx_flow_ctrl_en; 88 89 #define ECORE_LINK_PARTNER_SYMMETRIC_PAUSE (1) 90 #define ECORE_LINK_PARTNER_ASYMMETRIC_PAUSE (2) 91 #define ECORE_LINK_PARTNER_BOTH_PAUSE (3) 92 u8 partner_adv_pause; 93 94 bool sfp_tx_fault; 95 96 bool eee_active; 97 u8 eee_adv_caps; 98 u8 eee_lp_adv_caps; 99 }; 100 101 struct ecore_mcp_function_info { 102 u8 pause_on_host; 103 104 enum ecore_pci_personality protocol; 105 106 u8 bandwidth_min; 107 u8 bandwidth_max; 108 109 u8 mac[ETH_ALEN]; 110 111 u64 wwn_port; 112 u64 wwn_node; 113 114 #define ECORE_MCP_VLAN_UNSET (0xffff) 115 u16 ovlan; 116 117 u16 mtu; 118 }; 119 120 #ifndef __EXTRACT__LINUX__ 121 enum ecore_nvm_images { 122 ECORE_NVM_IMAGE_ISCSI_CFG, 123 ECORE_NVM_IMAGE_FCOE_CFG, 124 }; 125 #endif 126 127 struct ecore_mcp_drv_version { 128 u32 version; 129 u8 name[MCP_DRV_VER_STR_SIZE - 4]; 130 }; 131 132 struct ecore_mcp_lan_stats { 133 u64 ucast_rx_pkts; 134 u64 ucast_tx_pkts; 135 u32 fcs_err; 136 }; 137 138 #ifndef ECORE_PROTO_STATS 139 #define ECORE_PROTO_STATS 140 struct ecore_mcp_fcoe_stats { 141 u64 rx_pkts; 142 u64 tx_pkts; 143 u32 fcs_err; 144 u32 login_failure; 145 }; 146 147 struct ecore_mcp_iscsi_stats { 148 u64 rx_pdus; 149 u64 tx_pdus; 150 u64 rx_bytes; 151 u64 tx_bytes; 152 }; 153 154 struct ecore_mcp_rdma_stats { 155 u64 rx_pkts; 156 u64 tx_pkts; 157 u64 rx_bytes; 158 u64 tx_byts; 159 }; 160 161 enum ecore_mcp_protocol_type { 162 ECORE_MCP_LAN_STATS, 163 ECORE_MCP_FCOE_STATS, 164 ECORE_MCP_ISCSI_STATS, 165 ECORE_MCP_RDMA_STATS 166 }; 167 168 union ecore_mcp_protocol_stats { 169 struct ecore_mcp_lan_stats lan_stats; 170 struct ecore_mcp_fcoe_stats fcoe_stats; 171 struct ecore_mcp_iscsi_stats iscsi_stats; 172 struct ecore_mcp_rdma_stats rdma_stats; 173 }; 174 #endif 175 176 enum ecore_ov_client { 177 ECORE_OV_CLIENT_DRV, 178 ECORE_OV_CLIENT_USER, 179 ECORE_OV_CLIENT_VENDOR_SPEC 180 }; 181 182 enum ecore_ov_driver_state { 183 ECORE_OV_DRIVER_STATE_NOT_LOADED, 184 ECORE_OV_DRIVER_STATE_DISABLED, 185 ECORE_OV_DRIVER_STATE_ACTIVE 186 }; 187 188 #define ECORE_MAX_NPIV_ENTRIES 128 189 #define ECORE_WWN_SIZE 8 190 struct ecore_fc_npiv_tbl { 191 u32 count; 192 u8 wwpn[ECORE_MAX_NPIV_ENTRIES][ECORE_WWN_SIZE]; 193 u8 wwnn[ECORE_MAX_NPIV_ENTRIES][ECORE_WWN_SIZE]; 194 }; 195 196 #ifndef __EXTRACT__LINUX__ 197 enum ecore_led_mode { 198 ECORE_LED_MODE_OFF, 199 ECORE_LED_MODE_ON, 200 ECORE_LED_MODE_RESTORE 201 }; 202 #endif 203 204 struct ecore_temperature_sensor { 205 u8 sensor_location; 206 u8 threshold_high; 207 u8 critical; 208 u8 current_temp; 209 }; 210 211 #define ECORE_MAX_NUM_OF_SENSORS 7 212 struct ecore_temperature_info { 213 u32 num_sensors; 214 struct ecore_temperature_sensor sensors[ECORE_MAX_NUM_OF_SENSORS]; 215 }; 216 217 enum ecore_mba_img_idx { 218 ECORE_MBA_LEGACY_IDX, 219 ECORE_MBA_PCI3CLP_IDX, 220 ECORE_MBA_PCI3_IDX, 221 ECORE_MBA_FCODE_IDX, 222 ECORE_EFI_X86_IDX, 223 ECORE_EFI_IPF_IDX, 224 ECORE_EFI_EBC_IDX, 225 ECORE_EFI_X64_IDX, 226 ECORE_MAX_NUM_OF_ROMIMG 227 }; 228 229 struct ecore_mba_vers { 230 u32 mba_vers[ECORE_MAX_NUM_OF_ROMIMG]; 231 }; 232 233 enum ecore_mfw_tlv_type { 234 ECORE_MFW_TLV_GENERIC = 0x1, /* Core driver TLVs */ 235 ECORE_MFW_TLV_ETH = 0x2, /* L2 driver TLVs */ 236 ECORE_MFW_TLV_FCOE = 0x4, /* FCoE protocol TLVs */ 237 ECORE_MFW_TLV_ISCSI = 0x8, /* SCSI protocol TLVs */ 238 ECORE_MFW_TLV_MAX = 0x16, 239 }; 240 241 struct ecore_mfw_tlv_generic { 242 u16 feat_flags; 243 bool feat_flags_set; 244 u64 local_mac; 245 bool local_mac_set; 246 u64 additional_mac1; 247 bool additional_mac1_set; 248 u64 additional_mac2; 249 bool additional_mac2_set; 250 u8 drv_state; 251 bool drv_state_set; 252 u8 pxe_progress; 253 bool pxe_progress_set; 254 u64 rx_frames; 255 bool rx_frames_set; 256 u64 rx_bytes; 257 bool rx_bytes_set; 258 u64 tx_frames; 259 bool tx_frames_set; 260 u64 tx_bytes; 261 bool tx_bytes_set; 262 }; 263 264 struct ecore_mfw_tlv_eth { 265 u16 lso_maxoff_size; 266 bool lso_maxoff_size_set; 267 u16 lso_minseg_size; 268 bool lso_minseg_size_set; 269 u8 prom_mode; 270 bool prom_mode_set; 271 u16 tx_descr_size; 272 bool tx_descr_size_set; 273 u16 rx_descr_size; 274 bool rx_descr_size_set; 275 u16 netq_count; 276 bool netq_count_set; 277 u32 tcp4_offloads; 278 bool tcp4_offloads_set; 279 u32 tcp6_offloads; 280 bool tcp6_offloads_set; 281 u16 tx_descr_qdepth; 282 bool tx_descr_qdepth_set; 283 u16 rx_descr_qdepth; 284 bool rx_descr_qdepth_set; 285 u8 iov_offload; 286 bool iov_offload_set; 287 u8 txqs_empty; 288 bool txqs_empty_set; 289 u8 rxqs_empty; 290 bool rxqs_empty_set; 291 u8 num_txqs_full; 292 bool num_txqs_full_set; 293 u8 num_rxqs_full; 294 bool num_rxqs_full_set; 295 }; 296 297 struct ecore_mfw_tlv_fcoe { 298 u8 scsi_timeout; 299 bool scsi_timeout_set; 300 u32 rt_tov; 301 bool rt_tov_set; 302 u32 ra_tov; 303 bool ra_tov_set; 304 u32 ed_tov; 305 bool ed_tov_set; 306 u32 cr_tov; 307 bool cr_tov_set; 308 u8 boot_type; 309 bool boot_type_set; 310 u8 npiv_state; 311 bool npiv_state_set; 312 u32 num_npiv_ids; 313 bool num_npiv_ids_set; 314 u8 switch_name[8]; 315 bool switch_name_set; 316 u16 switch_portnum; 317 bool switch_portnum_set; 318 u8 switch_portid[3]; 319 bool switch_portid_set; 320 u8 vendor_name[8]; 321 bool vendor_name_set; 322 u8 switch_model[8]; 323 bool switch_model_set; 324 u8 switch_fw_version[8]; 325 bool switch_fw_version_set; 326 u8 qos_pri; 327 bool qos_pri_set; 328 u8 port_alias[3]; 329 bool port_alias_set; 330 u8 port_state; 331 bool port_state_set; 332 u16 fip_tx_descr_size; 333 bool fip_tx_descr_size_set; 334 u16 fip_rx_descr_size; 335 bool fip_rx_descr_size_set; 336 u16 link_failures; 337 bool link_failures_set; 338 u8 fcoe_boot_progress; 339 bool fcoe_boot_progress_set; 340 u64 rx_bcast; 341 bool rx_bcast_set; 342 u64 tx_bcast; 343 bool tx_bcast_set; 344 u16 fcoe_txq_depth; 345 bool fcoe_txq_depth_set; 346 u16 fcoe_rxq_depth; 347 bool fcoe_rxq_depth_set; 348 u64 fcoe_rx_frames; 349 bool fcoe_rx_frames_set; 350 u64 fcoe_rx_bytes; 351 bool fcoe_rx_bytes_set; 352 u64 fcoe_tx_frames; 353 bool fcoe_tx_frames_set; 354 u64 fcoe_tx_bytes; 355 bool fcoe_tx_bytes_set; 356 u16 crc_count; 357 bool crc_count_set; 358 u32 crc_err_src_fcid[5]; 359 bool crc_err_src_fcid_set[5]; 360 u8 crc_err_tstamp[5][14]; 361 bool crc_err_tstamp_set[5]; 362 u16 losync_err; 363 bool losync_err_set; 364 u16 losig_err; 365 bool losig_err_set; 366 u16 primtive_err; 367 bool primtive_err_set; 368 u16 disparity_err; 369 bool disparity_err_set; 370 u16 code_violation_err; 371 bool code_violation_err_set; 372 u32 flogi_param[4]; 373 bool flogi_param_set[4]; 374 u8 flogi_tstamp[14]; 375 bool flogi_tstamp_set; 376 u32 flogi_acc_param[4]; 377 bool flogi_acc_param_set[4]; 378 u8 flogi_acc_tstamp[14]; 379 bool flogi_acc_tstamp_set; 380 u32 flogi_rjt; 381 bool flogi_rjt_set; 382 u8 flogi_rjt_tstamp[14]; 383 bool flogi_rjt_tstamp_set; 384 u32 fdiscs; 385 bool fdiscs_set; 386 u8 fdisc_acc; 387 bool fdisc_acc_set; 388 u8 fdisc_rjt; 389 bool fdisc_rjt_set; 390 u8 plogi; 391 bool plogi_set; 392 u8 plogi_acc; 393 bool plogi_acc_set; 394 u8 plogi_rjt; 395 bool plogi_rjt_set; 396 u32 plogi_dst_fcid[5]; 397 bool plogi_dst_fcid_set[5]; 398 u8 plogi_tstamp[5][14]; 399 bool plogi_tstamp_set[5]; 400 u32 plogi_acc_src_fcid[5]; 401 bool plogi_acc_src_fcid_set[5]; 402 u8 plogi_acc_tstamp[5][14]; 403 bool plogi_acc_tstamp_set[5]; 404 u8 tx_plogos; 405 bool tx_plogos_set; 406 u8 plogo_acc; 407 bool plogo_acc_set; 408 u8 plogo_rjt; 409 bool plogo_rjt_set; 410 u32 plogo_src_fcid[5]; 411 bool plogo_src_fcid_set[5]; 412 u8 plogo_tstamp[5][14]; 413 bool plogo_tstamp_set[5]; 414 u8 rx_logos; 415 bool rx_logos_set; 416 u8 tx_accs; 417 bool tx_accs_set; 418 u8 tx_prlis; 419 bool tx_prlis_set; 420 u8 rx_accs; 421 bool rx_accs_set; 422 u8 tx_abts; 423 bool tx_abts_set; 424 u8 rx_abts_acc; 425 bool rx_abts_acc_set; 426 u8 rx_abts_rjt; 427 bool rx_abts_rjt_set; 428 u32 abts_dst_fcid[5]; 429 bool abts_dst_fcid_set[5]; 430 u8 abts_tstamp[5][14]; 431 bool abts_tstamp_set[5]; 432 u8 rx_rscn; 433 bool rx_rscn_set; 434 u32 rx_rscn_nport[4]; 435 bool rx_rscn_nport_set[4]; 436 u8 tx_lun_rst; 437 bool tx_lun_rst_set; 438 u8 abort_task_sets; 439 bool abort_task_sets_set; 440 u8 tx_tprlos; 441 bool tx_tprlos_set; 442 u8 tx_nos; 443 bool tx_nos_set; 444 u8 rx_nos; 445 bool rx_nos_set; 446 u8 ols; 447 bool ols_set; 448 u8 lr; 449 bool lr_set; 450 u8 lrr; 451 bool lrr_set; 452 u8 tx_lip; 453 bool tx_lip_set; 454 u8 rx_lip; 455 bool rx_lip_set; 456 u8 eofa; 457 bool eofa_set; 458 u8 eofni; 459 bool eofni_set; 460 u8 scsi_chks; 461 bool scsi_chks_set; 462 u8 scsi_cond_met; 463 bool scsi_cond_met_set; 464 u8 scsi_busy; 465 bool scsi_busy_set; 466 u8 scsi_inter; 467 bool scsi_inter_set; 468 u8 scsi_inter_cond_met; 469 bool scsi_inter_cond_met_set; 470 u8 scsi_rsv_conflicts; 471 bool scsi_rsv_conflicts_set; 472 u8 scsi_tsk_full; 473 bool scsi_tsk_full_set; 474 u8 scsi_aca_active; 475 bool scsi_aca_active_set; 476 u8 scsi_tsk_abort; 477 bool scsi_tsk_abort_set; 478 u32 scsi_rx_chk[5]; 479 bool scsi_rx_chk_set[5]; 480 u8 scsi_chk_tstamp[5][14]; 481 bool scsi_chk_tstamp_set[5]; 482 }; 483 484 struct ecore_mfw_tlv_iscsi { 485 u8 target_llmnr; 486 bool target_llmnr_set; 487 u8 header_digest; 488 bool header_digest_set; 489 u8 data_digest; 490 bool data_digest_set; 491 u8 auth_method; 492 bool auth_method_set; 493 u16 boot_taget_portal; 494 bool boot_taget_portal_set; 495 u16 frame_size; 496 bool frame_size_set; 497 u16 tx_desc_size; 498 bool tx_desc_size_set; 499 u16 rx_desc_size; 500 bool rx_desc_size_set; 501 u8 boot_progress; 502 bool boot_progress_set; 503 u16 tx_desc_qdepth; 504 bool tx_desc_qdepth_set; 505 u16 rx_desc_qdepth; 506 bool rx_desc_qdepth_set; 507 u64 rx_frames; 508 bool rx_frames_set; 509 u64 rx_bytes; 510 bool rx_bytes_set; 511 u64 tx_frames; 512 bool tx_frames_set; 513 u64 tx_bytes; 514 bool tx_bytes_set; 515 }; 516 517 union ecore_mfw_tlv_data { 518 struct ecore_mfw_tlv_generic generic; 519 struct ecore_mfw_tlv_eth eth; 520 struct ecore_mfw_tlv_fcoe fcoe; 521 struct ecore_mfw_tlv_iscsi iscsi; 522 }; 523 524 /** 525 * @brief - returns the link params of the hw function 526 * 527 * @param p_hwfn 528 * 529 * @returns pointer to link params 530 */ 531 struct ecore_mcp_link_params *ecore_mcp_get_link_params(struct ecore_hwfn *); 532 533 /** 534 * @brief - return the link state of the hw function 535 * 536 * @param p_hwfn 537 * 538 * @returns pointer to link state 539 */ 540 struct ecore_mcp_link_state *ecore_mcp_get_link_state(struct ecore_hwfn *); 541 542 /** 543 * @brief - return the link capabilities of the hw function 544 * 545 * @param p_hwfn 546 * 547 * @returns pointer to link capabilities 548 */ 549 struct ecore_mcp_link_capabilities 550 *ecore_mcp_get_link_capabilities(struct ecore_hwfn *p_hwfn); 551 552 /** 553 * @brief Request the MFW to set the link according to 'link_input'. 554 * 555 * @param p_hwfn 556 * @param p_ptt 557 * @param b_up - raise link if `true'. Reset link if `false'. 558 * 559 * @return enum _ecore_status_t 560 */ 561 enum _ecore_status_t ecore_mcp_set_link(struct ecore_hwfn *p_hwfn, 562 struct ecore_ptt *p_ptt, 563 bool b_up); 564 565 /** 566 * @brief Get the management firmware version value 567 * 568 * @param p_hwfn 569 * @param p_ptt 570 * @param p_mfw_ver - mfw version value 571 * @param p_running_bundle_id - image id in nvram; Optional. 572 * 573 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 574 */ 575 enum _ecore_status_t ecore_mcp_get_mfw_ver(struct ecore_hwfn *p_hwfn, 576 struct ecore_ptt *p_ptt, 577 u32 *p_mfw_ver, 578 u32 *p_running_bundle_id); 579 580 /** 581 * @brief Get media type value of the port. 582 * 583 * @param p_dev - ecore dev pointer 584 * @param p_ptt 585 * @param mfw_ver - media type value 586 * 587 * @return enum _ecore_status_t - 588 * ECORE_SUCCESS - Operation was successful. 589 * ECORE_BUSY - Operation failed 590 */ 591 enum _ecore_status_t ecore_mcp_get_media_type(struct ecore_hwfn *p_hwfn, 592 struct ecore_ptt *p_ptt, 593 u32 *media_type); 594 595 /** 596 * @brief Get transceiver data of the port. 597 * 598 * @param p_dev - ecore dev pointer 599 * @param p_ptt 600 * @param p_transceiver_type - media type value 601 * 602 * @return enum _ecore_status_t - 603 * ECORE_SUCCESS - Operation was successful. 604 * ECORE_BUSY - Operation failed 605 */ 606 enum _ecore_status_t ecore_mcp_get_transceiver_data(struct ecore_hwfn *p_hwfn, 607 struct ecore_ptt *p_ptt, 608 u32 *p_tranceiver_type); 609 610 /** 611 * @brief Get transceiver supported speed mask. 612 * 613 * @param p_dev - ecore dev pointer 614 * @param p_ptt 615 * @param p_speed_mask - Bit mask of all supported speeds. 616 * 617 * @return enum _ecore_status_t - 618 * ECORE_SUCCESS - Operation was successful. 619 * ECORE_BUSY - Operation failed 620 */ 621 622 enum _ecore_status_t ecore_mcp_trans_speed_mask(struct ecore_hwfn *p_hwfn, 623 struct ecore_ptt *p_ptt, 624 u32 *p_speed_mask); 625 626 /** 627 * @brief Get board configuration. 628 * 629 * @param p_dev - ecore dev pointer 630 * @param p_ptt 631 * @param p_board_config - Board config. 632 * 633 * @return enum _ecore_status_t - 634 * ECORE_SUCCESS - Operation was successful. 635 * ECORE_BUSY - Operation failed 636 */ 637 enum _ecore_status_t ecore_mcp_get_board_config(struct ecore_hwfn *p_hwfn, 638 struct ecore_ptt *p_ptt, 639 u32 *p_board_config); 640 641 /** 642 * @brief - Sends a command to the MCP mailbox. 643 * 644 * @param p_hwfn - hw function 645 * @param p_ptt - PTT required for register access 646 * @param cmd - command to be sent to the MCP 647 * @param param - Optional param 648 * @param o_mcp_resp - The MCP response code (exclude sequence) 649 * @param o_mcp_param - Optional parameter provided by the MCP response 650 * 651 * @return enum _ecore_status_t - 652 * ECORE_SUCCESS - operation was successful 653 * ECORE_BUSY - operation failed 654 */ 655 enum _ecore_status_t ecore_mcp_cmd(struct ecore_hwfn *p_hwfn, 656 struct ecore_ptt *p_ptt, u32 cmd, u32 param, 657 u32 *o_mcp_resp, u32 *o_mcp_param); 658 659 /** 660 * @brief - drains the nig, allowing completion to pass in case of pauses. 661 * (Should be called only from sleepable context) 662 * 663 * @param p_hwfn 664 * @param p_ptt 665 */ 666 enum _ecore_status_t ecore_mcp_drain(struct ecore_hwfn *p_hwfn, 667 struct ecore_ptt *p_ptt); 668 669 #ifndef LINUX_REMOVE 670 /** 671 * @brief - return the mcp function info of the hw function 672 * 673 * @param p_hwfn 674 * 675 * @returns pointer to mcp function info 676 */ 677 const struct ecore_mcp_function_info 678 *ecore_mcp_get_function_info(struct ecore_hwfn *p_hwfn); 679 #endif 680 681 #ifndef LINUX_REMOVE 682 /** 683 * @brief - count number of function with a matching personality on engine. 684 * 685 * @param p_hwfn 686 * @param p_ptt 687 * @param personalities - a bitmask of ecore_pci_personality values 688 * 689 * @returns the count of all devices on engine whose personality match one of 690 * the bitsmasks. 691 */ 692 int ecore_mcp_get_personality_cnt(struct ecore_hwfn *p_hwfn, 693 struct ecore_ptt *p_ptt, 694 u32 personalities); 695 #endif 696 697 /** 698 * @brief Get the flash size value 699 * 700 * @param p_hwfn 701 * @param p_ptt 702 * @param p_flash_size - flash size in bytes to be filled. 703 * 704 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 705 */ 706 enum _ecore_status_t ecore_mcp_get_flash_size(struct ecore_hwfn *p_hwfn, 707 struct ecore_ptt *p_ptt, 708 u32 *p_flash_size); 709 710 /** 711 * @brief Send driver version to MFW 712 * 713 * @param p_hwfn 714 * @param p_ptt 715 * @param version - Version value 716 * @param name - Protocol driver name 717 * 718 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 719 */ 720 enum _ecore_status_t 721 ecore_mcp_send_drv_version(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 722 struct ecore_mcp_drv_version *p_ver); 723 724 /** 725 * @brief Read the MFW process kill counter 726 * 727 * @param p_hwfn 728 * @param p_ptt 729 * 730 * @return u32 731 */ 732 u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn, 733 struct ecore_ptt *p_ptt); 734 735 /** 736 * @brief Trigger a recovery process 737 * 738 * @param p_hwfn 739 * @param p_ptt 740 * 741 * @return enum _ecore_status_t 742 */ 743 enum _ecore_status_t ecore_start_recovery_process(struct ecore_hwfn *p_hwfn, 744 struct ecore_ptt *p_ptt); 745 746 /** 747 * @brief A recovery handler must call this function as its first step. 748 * It is assumed that the handler is not run from an interrupt context. 749 * 750 * @param p_dev 751 * @param p_ptt 752 * 753 * @return enum _ecore_status_t 754 */ 755 enum _ecore_status_t ecore_recovery_prolog(struct ecore_dev *p_dev); 756 757 /** 758 * @brief Notify MFW about the change in base device properties 759 * 760 * @param p_hwfn 761 * @param p_ptt 762 * @param client - ecore client type 763 * 764 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 765 */ 766 enum _ecore_status_t 767 ecore_mcp_ov_update_current_config(struct ecore_hwfn *p_hwfn, 768 struct ecore_ptt *p_ptt, 769 enum ecore_ov_client client); 770 771 /** 772 * @brief Notify MFW about the driver state 773 * 774 * @param p_hwfn 775 * @param p_ptt 776 * @param drv_state - Driver state 777 * 778 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 779 */ 780 enum _ecore_status_t 781 ecore_mcp_ov_update_driver_state(struct ecore_hwfn *p_hwfn, 782 struct ecore_ptt *p_ptt, 783 enum ecore_ov_driver_state drv_state); 784 785 /** 786 * @brief Read NPIV settings form the MFW 787 * 788 * @param p_hwfn 789 * @param p_ptt 790 * @param p_table - Array to hold the FC NPIV data. Client need allocate the 791 * required buffer. The field 'count' specifies number of NPIV 792 * entries. A value of 0 means the table was not populated. 793 * 794 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 795 */ 796 enum _ecore_status_t 797 ecore_mcp_ov_get_fc_npiv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 798 struct ecore_fc_npiv_tbl *p_table); 799 800 /** 801 * @brief Send MTU size to MFW 802 * 803 * @param p_hwfn 804 * @param p_ptt 805 * @param mtu - MTU size 806 * 807 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 808 */ 809 enum _ecore_status_t ecore_mcp_ov_update_mtu(struct ecore_hwfn *p_hwfn, 810 struct ecore_ptt *p_ptt, u16 mtu); 811 812 /** 813 * @brief Set LED status 814 * 815 * @param p_hwfn 816 * @param p_ptt 817 * @param mode - LED mode 818 * 819 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 820 */ 821 enum _ecore_status_t ecore_mcp_set_led(struct ecore_hwfn *p_hwfn, 822 struct ecore_ptt *p_ptt, 823 enum ecore_led_mode mode); 824 825 /** 826 * @brief Set secure mode 827 * 828 * @param p_dev 829 * @param addr - nvm offset 830 * 831 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 832 */ 833 enum _ecore_status_t ecore_mcp_nvm_set_secure_mode(struct ecore_dev *p_dev, 834 u32 addr); 835 836 /** 837 * @brief Write to phy 838 * 839 * @param p_dev 840 * @param addr - nvm offset 841 * @param cmd - nvm command 842 * @param p_buf - nvm write buffer 843 * @param len - buffer len 844 * 845 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 846 */ 847 enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd, 848 u32 addr, u8 *p_buf, u32 len); 849 850 /** 851 * @brief Write to nvm 852 * 853 * @param p_dev 854 * @param addr - nvm offset 855 * @param cmd - nvm command 856 * @param p_buf - nvm write buffer 857 * @param len - buffer len 858 * 859 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 860 */ 861 enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd, 862 u32 addr, u8 *p_buf, u32 len); 863 864 /** 865 * @brief Put file begin 866 * 867 * @param p_dev 868 * @param addr - nvm offset 869 * 870 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 871 */ 872 enum _ecore_status_t ecore_mcp_nvm_put_file_begin(struct ecore_dev *p_dev, 873 u32 addr); 874 875 /** 876 * @brief Delete file 877 * 878 * @param p_dev 879 * @param addr - nvm offset 880 * 881 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 882 */ 883 enum _ecore_status_t ecore_mcp_nvm_del_file(struct ecore_dev *p_dev, 884 u32 addr); 885 886 /** 887 * @brief Check latest response 888 * 889 * @param p_dev 890 * @param p_buf - nvm write buffer 891 * 892 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 893 */ 894 enum _ecore_status_t ecore_mcp_nvm_resp(struct ecore_dev *p_dev, u8 *p_buf); 895 896 /** 897 * @brief Read from phy 898 * 899 * @param p_dev 900 * @param addr - nvm offset 901 * @param cmd - nvm command 902 * @param p_buf - nvm read buffer 903 * @param len - buffer len 904 * 905 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 906 */ 907 enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd, 908 u32 addr, u8 *p_buf, u32 len); 909 910 /** 911 * @brief Read from nvm 912 * 913 * @param p_dev 914 * @param addr - nvm offset 915 * @param p_buf - nvm read buffer 916 * @param len - buffer len 917 * 918 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 919 */ 920 enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr, 921 u8 *p_buf, u32 len); 922 923 /** 924 * @brief - Sends an NVM write command request to the MFW with 925 * payload. 926 * 927 * @param p_hwfn 928 * @param p_ptt 929 * @param cmd - Command: Either DRV_MSG_CODE_NVM_WRITE_NVRAM or 930 * DRV_MSG_CODE_NVM_PUT_FILE_DATA 931 * @param param - [0:23] - Offset [24:31] - Size 932 * @param o_mcp_resp - MCP response 933 * @param o_mcp_param - MCP response param 934 * @param i_txn_size - Buffer size 935 * @param i_buf - Pointer to the buffer 936 * 937 * @param return ECORE_SUCCESS upon success. 938 */ 939 enum _ecore_status_t ecore_mcp_nvm_wr_cmd(struct ecore_hwfn *p_hwfn, 940 struct ecore_ptt *p_ptt, 941 u32 cmd, 942 u32 param, 943 u32 *o_mcp_resp, 944 u32 *o_mcp_param, 945 u32 i_txn_size, 946 u32 *i_buf); 947 948 /** 949 * @brief - Sends an NVM read command request to the MFW to get 950 * a buffer. 951 * 952 * @param p_hwfn 953 * @param p_ptt 954 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or 955 * DRV_MSG_CODE_NVM_READ_NVRAM commands 956 * @param param - [0:23] - Offset [24:31] - Size 957 * @param o_mcp_resp - MCP response 958 * @param o_mcp_param - MCP response param 959 * @param o_txn_size - Buffer size output 960 * @param o_buf - Pointer to the buffer returned by the MFW. 961 * 962 * @param return ECORE_SUCCESS upon success. 963 */ 964 enum _ecore_status_t ecore_mcp_nvm_rd_cmd(struct ecore_hwfn *p_hwfn, 965 struct ecore_ptt *p_ptt, 966 u32 cmd, 967 u32 param, 968 u32 *o_mcp_resp, 969 u32 *o_mcp_param, 970 u32 *o_txn_size, 971 u32 *o_buf); 972 973 /** 974 * @brief Read from sfp 975 * 976 * @param p_hwfn - hw function 977 * @param p_ptt - PTT required for register access 978 * @param port - transceiver port 979 * @param addr - I2C address 980 * @param offset - offset in sfp 981 * @param len - buffer length 982 * @param p_buf - buffer to read into 983 * 984 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 985 */ 986 enum _ecore_status_t ecore_mcp_phy_sfp_read(struct ecore_hwfn *p_hwfn, 987 struct ecore_ptt *p_ptt, 988 u32 port, u32 addr, u32 offset, 989 u32 len, u8 *p_buf); 990 991 /** 992 * @brief Write to sfp 993 * 994 * @param p_hwfn - hw function 995 * @param p_ptt - PTT required for register access 996 * @param port - transceiver port 997 * @param addr - I2C address 998 * @param offset - offset in sfp 999 * @param len - buffer length 1000 * @param p_buf - buffer to write from 1001 * 1002 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1003 */ 1004 enum _ecore_status_t ecore_mcp_phy_sfp_write(struct ecore_hwfn *p_hwfn, 1005 struct ecore_ptt *p_ptt, 1006 u32 port, u32 addr, u32 offset, 1007 u32 len, u8 *p_buf); 1008 1009 /** 1010 * @brief Gpio read 1011 * 1012 * @param p_hwfn - hw function 1013 * @param p_ptt - PTT required for register access 1014 * @param gpio - gpio number 1015 * @param gpio_val - value read from gpio 1016 * 1017 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1018 */ 1019 enum _ecore_status_t ecore_mcp_gpio_read(struct ecore_hwfn *p_hwfn, 1020 struct ecore_ptt *p_ptt, 1021 u16 gpio, u32 *gpio_val); 1022 1023 /** 1024 * @brief Gpio write 1025 * 1026 * @param p_hwfn - hw function 1027 * @param p_ptt - PTT required for register access 1028 * @param gpio - gpio number 1029 * @param gpio_val - value to write to gpio 1030 * 1031 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1032 */ 1033 enum _ecore_status_t ecore_mcp_gpio_write(struct ecore_hwfn *p_hwfn, 1034 struct ecore_ptt *p_ptt, 1035 u16 gpio, u16 gpio_val); 1036 1037 /** 1038 * @brief Gpio get information 1039 * 1040 * @param p_hwfn - hw function 1041 * @param p_ptt - PTT required for register access 1042 * @param gpio - gpio number 1043 * @param gpio_direction - gpio is output (0) or input (1) 1044 * @param gpio_ctrl - gpio control is uninitialized (0), 1045 * path 0 (1), path 1 (2) or shared(3) 1046 * 1047 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1048 */ 1049 enum _ecore_status_t ecore_mcp_gpio_info(struct ecore_hwfn *p_hwfn, 1050 struct ecore_ptt *p_ptt, 1051 u16 gpio, u32 *gpio_direction, 1052 u32 *gpio_ctrl); 1053 1054 /** 1055 * @brief Bist register test 1056 * 1057 * @param p_hwfn - hw function 1058 * @param p_ptt - PTT required for register access 1059 * 1060 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1061 */ 1062 enum _ecore_status_t ecore_mcp_bist_register_test(struct ecore_hwfn *p_hwfn, 1063 struct ecore_ptt *p_ptt); 1064 1065 /** 1066 * @brief Bist clock test 1067 * 1068 * @param p_hwfn - hw function 1069 * @param p_ptt - PTT required for register access 1070 * 1071 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1072 */ 1073 enum _ecore_status_t ecore_mcp_bist_clock_test(struct ecore_hwfn *p_hwfn, 1074 struct ecore_ptt *p_ptt); 1075 1076 /** 1077 * @brief Bist nvm test - get number of images 1078 * 1079 * @param p_hwfn - hw function 1080 * @param p_ptt - PTT required for register access 1081 * @param num_images - number of images if operation was 1082 * successful. 0 if not. 1083 * 1084 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1085 */ 1086 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_num_images( 1087 struct ecore_hwfn *p_hwfn, 1088 struct ecore_ptt *p_ptt, 1089 u32 *num_images); 1090 1091 /** 1092 * @brief Bist nvm test - get image attributes by index 1093 * 1094 * @param p_hwfn - hw function 1095 * @param p_ptt - PTT required for register access 1096 * @param p_image_att - Attributes of image 1097 * @param image_index - Index of image to get information for 1098 * 1099 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1100 */ 1101 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_image_att( 1102 struct ecore_hwfn *p_hwfn, 1103 struct ecore_ptt *p_ptt, 1104 struct bist_nvm_image_att *p_image_att, 1105 u32 image_index); 1106 1107 /** 1108 * @brief ecore_mcp_get_temperature_info - get the status of the temperature 1109 * sensors 1110 * 1111 * @param p_hwfn - hw function 1112 * @param p_ptt - PTT required for register access 1113 * @param p_temp_status - A pointer to an ecore_temperature_info structure to 1114 * be filled with the temperature data 1115 * 1116 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1117 */ 1118 enum _ecore_status_t 1119 ecore_mcp_get_temperature_info(struct ecore_hwfn *p_hwfn, 1120 struct ecore_ptt *p_ptt, 1121 struct ecore_temperature_info *p_temp_info); 1122 1123 /** 1124 * @brief Get MBA versions - get MBA sub images versions 1125 * 1126 * @param p_hwfn - hw function 1127 * @param p_ptt - PTT required for register access 1128 * @param p_mba_vers - MBA versions array to fill 1129 * 1130 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1131 */ 1132 enum _ecore_status_t ecore_mcp_get_mba_versions( 1133 struct ecore_hwfn *p_hwfn, 1134 struct ecore_ptt *p_ptt, 1135 struct ecore_mba_vers *p_mba_vers); 1136 1137 /** 1138 * @brief Count memory ecc events 1139 * 1140 * @param p_hwfn - hw function 1141 * @param p_ptt - PTT required for register access 1142 * @param num_events - number of memory ecc events 1143 * 1144 * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful. 1145 */ 1146 enum _ecore_status_t ecore_mcp_mem_ecc_events(struct ecore_hwfn *p_hwfn, 1147 struct ecore_ptt *p_ptt, 1148 u64 *num_events); 1149 1150 struct ecore_mdump_info { 1151 u32 reason; 1152 u32 version; 1153 u32 config; 1154 u32 epoch; 1155 u32 num_of_logs; 1156 u32 valid_logs; 1157 }; 1158 1159 /** 1160 * @brief - Gets the MFW crash dump configuration and logs info. 1161 * 1162 * @param p_hwfn 1163 * @param p_ptt 1164 * @param p_mdump_info 1165 * 1166 * @param return ECORE_SUCCESS upon success. 1167 */ 1168 enum _ecore_status_t 1169 ecore_mcp_mdump_get_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1170 struct ecore_mdump_info *p_mdump_info); 1171 1172 /** 1173 * @brief - Clears the MFW crash dump logs. 1174 * 1175 * @param p_hwfn 1176 * @param p_ptt 1177 * 1178 * @param return ECORE_SUCCESS upon success. 1179 */ 1180 enum _ecore_status_t ecore_mcp_mdump_clear_logs(struct ecore_hwfn *p_hwfn, 1181 struct ecore_ptt *p_ptt); 1182 1183 /** 1184 * @brief - Clear the mdump retained data. 1185 * 1186 * @param p_hwfn 1187 * @param p_ptt 1188 * 1189 * @param return ECORE_SUCCESS upon success. 1190 */ 1191 enum _ecore_status_t ecore_mcp_mdump_clr_retain(struct ecore_hwfn *p_hwfn, 1192 struct ecore_ptt *p_ptt); 1193 1194 /** 1195 * @brief - Processes the TLV request from MFW i.e., get the required TLV info 1196 * from the ecore client and send it to the MFW. 1197 * 1198 * @param p_hwfn 1199 * @param p_ptt 1200 * 1201 * @param return ECORE_SUCCESS upon success. 1202 */ 1203 enum _ecore_status_t ecore_mfw_process_tlv_req(struct ecore_hwfn *p_hwfn, 1204 struct ecore_ptt *p_ptt); 1205 1206 1207 /** 1208 * @brief - Return whether management firmware support smart AN 1209 * 1210 * @param p_hwfn 1211 * 1212 * @return bool - true iff feature is supported. 1213 */ 1214 bool ecore_mcp_is_smart_an_supported(struct ecore_hwfn *p_hwfn); 1215 #endif 1216