1 /* 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 * 6 * See LICENSE.qede_pmd for copyright and licensing details. 7 */ 8 9 #ifndef __ECORE_INT_H__ 10 #define __ECORE_INT_H__ 11 12 #include "ecore.h" 13 #include "ecore_int_api.h" 14 15 #define ECORE_CAU_DEF_RX_TIMER_RES 0 16 #define ECORE_CAU_DEF_TX_TIMER_RES 0 17 18 #define ECORE_SB_ATT_IDX 0x0001 19 #define ECORE_SB_EVENT_MASK 0x0003 20 21 #define SB_ALIGNED_SIZE(p_hwfn) \ 22 ALIGNED_TYPE_SIZE(struct status_block_e4, p_hwfn) 23 24 #define ECORE_SB_INVALID_IDX 0xffff 25 26 struct ecore_igu_block { 27 u8 status; 28 #define ECORE_IGU_STATUS_FREE 0x01 29 #define ECORE_IGU_STATUS_VALID 0x02 30 #define ECORE_IGU_STATUS_PF 0x04 31 #define ECORE_IGU_STATUS_DSB 0x08 32 33 u8 vector_number; 34 u8 function_id; 35 u8 is_pf; 36 37 /* Index inside IGU [meant for back reference] */ 38 u16 igu_sb_id; 39 40 struct ecore_sb_info *sb_info; 41 }; 42 43 struct ecore_igu_info { 44 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH]; 45 u16 igu_dsb_id; 46 47 /* The numbers can shift when using APIs to switch SBs between PF and 48 * VF. 49 */ 50 struct ecore_sb_cnt_info usage; 51 52 /* Determine whether we can shift SBs between VFs and PFs */ 53 bool b_allow_pf_vf_change; 54 }; 55 56 /** 57 * @brief - Make sure the IGU CAM reflects the resources provided by MFW 58 * 59 * @param p_hwfn 60 * @param p_ptt 61 */ 62 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn, 63 struct ecore_ptt *p_ptt); 64 65 /** 66 * @brief - Make sure IGU CAM reflects the default resources once again, 67 * starting with a 'dirty' SW database. 68 * @param p_hwfn 69 * @param p_ptt 70 */ 71 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn, 72 struct ecore_ptt *p_ptt); 73 74 /** 75 * @brief Translate the weakly-defined client sb-id into an IGU sb-id 76 * 77 * @param p_hwfn 78 * @param sb_id - user provided sb_id 79 * 80 * @return an index inside IGU CAM where the SB resides 81 */ 82 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id); 83 84 /** 85 * @brief return a pointer to an unused valid SB 86 * 87 * @param p_hwfn 88 * @param b_is_pf - true iff we want a SB belonging to a PF 89 * 90 * @return point to an igu_block, OSAL_NULL if none is available 91 */ 92 struct ecore_igu_block * 93 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf); 94 /* TODO Names of function may change... */ 95 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn, 96 struct ecore_ptt *p_ptt, 97 bool b_set, bool b_slowpath); 98 99 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn); 100 101 /** 102 * @brief ecore_int_igu_read_cam - Reads the IGU CAM. 103 * This function needs to be called during hardware 104 * prepare. It reads the info from igu cam to know which 105 * status block is the default / base status block etc. 106 * 107 * @param p_hwfn 108 * @param p_ptt 109 * 110 * @return enum _ecore_status_t 111 */ 112 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn, 113 struct ecore_ptt *p_ptt); 114 115 typedef enum _ecore_status_t (*ecore_int_comp_cb_t) (struct ecore_hwfn *p_hwfn, 116 void *cookie); 117 /** 118 * @brief ecore_int_register_cb - Register callback func for 119 * slowhwfn statusblock. 120 * 121 * Every protocol that uses the slowhwfn status block 122 * should register a callback function that will be called 123 * once there is an update of the sp status block. 124 * 125 * @param p_hwfn 126 * @param comp_cb - function to be called when there is an 127 * interrupt on the sp sb 128 * 129 * @param cookie - passed to the callback function 130 * @param sb_idx - OUT parameter which gives the chosen index 131 * for this protocol. 132 * @param p_fw_cons - pointer to the actual address of the 133 * consumer for this protocol. 134 * 135 * @return enum _ecore_status_t 136 */ 137 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn, 138 ecore_int_comp_cb_t comp_cb, 139 void *cookie, 140 u8 *sb_idx, __le16 **p_fw_cons); 141 /** 142 * @brief ecore_int_unregister_cb - Unregisters callback 143 * function from sp sb. 144 * Partner of ecore_int_register_cb -> should be called 145 * when no longer required. 146 * 147 * @param p_hwfn 148 * @param pi 149 * 150 * @return enum _ecore_status_t 151 */ 152 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, u8 pi); 153 154 /** 155 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id. 156 * 157 * @param p_hwfn 158 * 159 * @return u16 160 */ 161 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn); 162 163 /** 164 * @brief Status block cleanup. Should be called for each status 165 * block that will be used -> both PF / VF 166 * 167 * @param p_hwfn 168 * @param p_ptt 169 * @param sb_id - igu status block id 170 * @param opaque - opaque fid of the sb owner. 171 * @param cleanup_set - set(1) / clear(0) 172 */ 173 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn, 174 struct ecore_ptt *p_ptt, 175 u16 sb_id, 176 u16 opaque, 177 bool b_set); 178 179 /** 180 * @brief ecore_int_cau_conf - configure cau for a given status 181 * block 182 * 183 * @param p_hwfn 184 * @param ptt 185 * @param sb_phys 186 * @param igu_sb_id 187 * @param vf_number 188 * @param vf_valid 189 */ 190 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn, 191 struct ecore_ptt *p_ptt, 192 dma_addr_t sb_phys, 193 u16 igu_sb_id, u16 vf_number, u8 vf_valid); 194 195 /** 196 * @brief ecore_int_alloc 197 * 198 * @param p_hwfn 199 * @param p_ptt 200 * 201 * @return enum _ecore_status_t 202 */ 203 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn, 204 struct ecore_ptt *p_ptt); 205 206 /** 207 * @brief ecore_int_free 208 * 209 * @param p_hwfn 210 */ 211 void ecore_int_free(struct ecore_hwfn *p_hwfn); 212 213 /** 214 * @brief ecore_int_setup 215 * 216 * @param p_hwfn 217 * @param p_ptt 218 */ 219 void ecore_int_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt); 220 221 /** 222 * @brief - Enable Interrupt & Attention for hw function 223 * 224 * @param p_hwfn 225 * @param p_ptt 226 * @param int_mode 227 * 228 * @return enum _ecore_status_t 229 */ 230 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn, 231 struct ecore_ptt *p_ptt, 232 enum ecore_int_mode int_mode); 233 234 /** 235 * @brief - Initialize CAU status block entry 236 * 237 * @param p_hwfn 238 * @param p_sb_entry 239 * @param pf_id 240 * @param vf_number 241 * @param vf_valid 242 */ 243 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn, 244 struct cau_sb_entry *p_sb_entry, u8 pf_id, 245 u16 vf_number, u8 vf_valid); 246 247 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn, 248 struct ecore_ptt *p_ptt, 249 u8 timer_res, u16 sb_id, bool tx); 250 #ifndef ASIC_ONLY 251 #define ECORE_MAPPING_MEMORY_SIZE(dev) \ 252 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \ 253 136 : NUM_OF_SBS(dev)) 254 #else 255 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev) 256 #endif 257 258 enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn, 259 struct ecore_ptt *p_ptt, 260 bool is_hw_init); 261 262 #endif /* __ECORE_INT_H__ */ 263