1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018-2019 NXP 3 */ 4 5 #ifndef _PFE_HIF_LIB_H_ 6 #define _PFE_HIF_LIB_H_ 7 8 #include "pfe_hif.h" 9 10 #define HIF_CL_REQ_TIMEOUT 10 11 #define GFP_DMA_PFE 0 12 13 enum { 14 REQUEST_CL_REGISTER = 0, 15 REQUEST_CL_UNREGISTER, 16 HIF_REQUEST_MAX 17 }; 18 19 enum { 20 /* Event to indicate that client rx queue is reached water mark level */ 21 EVENT_HIGH_RX_WM = 0, 22 /* Event to indicate that, packet received for client */ 23 EVENT_RX_PKT_IND, 24 /* Event to indicate that, packet tx done for client */ 25 EVENT_TXDONE_IND, 26 HIF_EVENT_MAX 27 }; 28 29 /*structure to store client queue info */ 30 31 /*structure to store client queue info */ 32 struct hif_client_rx_queue { 33 struct rx_queue_desc *base; 34 u32 size; 35 u32 read_idx; 36 u32 write_idx; 37 u16 queue_id; 38 u16 port_id; 39 void *priv; 40 }; 41 42 struct hif_client_tx_queue { 43 struct tx_queue_desc *base; 44 u32 size; 45 u32 read_idx; 46 u32 write_idx; 47 u32 tx_pending; 48 unsigned long jiffies_last_packet; 49 u32 nocpy_flag; 50 u32 prev_tmu_tx_pkts; 51 u32 done_tmu_tx_pkts; 52 u16 queue_id; 53 u16 port_id; 54 void *priv; 55 }; 56 57 struct hif_client_s { 58 int id; 59 unsigned int tx_qn; 60 unsigned int rx_qn; 61 void *rx_qbase; 62 void *tx_qbase; 63 int tx_qsize; 64 int rx_qsize; 65 int cpu_id; 66 int port_id; 67 struct hif_client_tx_queue tx_q[HIF_CLIENT_QUEUES_MAX]; 68 struct hif_client_rx_queue rx_q[HIF_CLIENT_QUEUES_MAX]; 69 int (*event_handler)(void *data, int event, int qno); 70 unsigned long queue_mask[HIF_EVENT_MAX]; 71 struct pfe *pfe; 72 void *priv; 73 }; 74 75 /* 76 * Client specific shared memory 77 * It contains number of Rx/Tx queues, base addresses and queue sizes 78 */ 79 struct hif_client_shm { 80 u32 ctrl; /*0-7: number of Rx queues, 8-15: number of tx queues */ 81 unsigned long rx_qbase; /*Rx queue base address */ 82 u32 rx_qsize; /*each Rx queue size, all Rx queues are of same size */ 83 unsigned long tx_qbase; /* Tx queue base address */ 84 u32 tx_qsize; /*each Tx queue size, all Tx queues are of same size */ 85 }; 86 87 /*Client shared memory ctrl bit description */ 88 #define CLIENT_CTRL_RX_Q_CNT_OFST 0 89 #define CLIENT_CTRL_TX_Q_CNT_OFST 8 90 #define CLIENT_CTRL_RX_Q_CNT(ctrl) (((ctrl) >> CLIENT_CTRL_RX_Q_CNT_OFST) \ 91 & 0xFF) 92 #define CLIENT_CTRL_TX_Q_CNT(ctrl) (((ctrl) >> CLIENT_CTRL_TX_Q_CNT_OFST) \ 93 & 0xFF) 94 95 /* 96 * Shared memory used to communicate between HIF driver and host/client drivers 97 * Before starting the hif driver rx_buf_pool ans rx_buf_pool_cnt should be 98 * initialized with host buffers and buffers count in the pool. 99 * rx_buf_pool_cnt should be >= HIF_RX_DESC_NT. 100 * 101 */ 102 struct hif_shm { 103 u32 rx_buf_pool_cnt; /*Number of rx buffers available*/ 104 /*Rx buffers required to initialize HIF rx descriptors */ 105 struct rte_mempool *pool; 106 void *rx_buf_pool[HIF_RX_DESC_NT]; 107 unsigned long g_client_status[2]; /*Global client status bit mask */ 108 /* Client specific shared memory */ 109 struct hif_client_shm client[HIF_CLIENTS_MAX]; 110 }; 111 112 #define CL_DESC_OWN BIT(31) 113 /* This sets owner ship to HIF driver */ 114 #define CL_DESC_LAST BIT(30) 115 /* This indicates last packet for multi buffers handling */ 116 #define CL_DESC_FIRST BIT(29) 117 /* This indicates first packet for multi buffers handling */ 118 119 #define CL_DESC_BUF_LEN(x) ((x) & 0xFFFF) 120 #define CL_DESC_FLAGS(x) (((x) & 0xF) << 16) 121 #define CL_DESC_GET_FLAGS(x) (((x) >> 16) & 0xF) 122 123 struct rx_queue_desc { 124 void *data; 125 u32 ctrl; /*0-15bit len, 16-20bit flags, 31bit owner*/ 126 u32 client_ctrl; 127 }; 128 129 struct tx_queue_desc { 130 void *data; 131 u32 ctrl; /*0-15bit len, 16-20bit flags, 31bit owner*/ 132 }; 133 134 /* HIF Rx is not working properly for 2-byte aligned buffers and 135 * ip_header should be 4byte aligned for better iperformance. 136 * "ip_header = 64 + 6(hif_header) + 14 (MAC Header)" will be 4byte aligned. 137 * In case HW parse support: 138 * "ip_header = 64 + 6(hif_header) + 16 (parse) + 14 (MAC Header)" will be 139 * 4byte aligned. 140 */ 141 #define PFE_HIF_SIZE sizeof(struct hif_hdr) 142 143 #ifdef RTE_LIBRTE_PFE_SW_PARSE 144 #define PFE_PKT_HEADER_SZ PFE_HIF_SIZE 145 #else 146 #define PFE_PKT_HEADER_SZ (PFE_HIF_SIZE + sizeof(struct pfe_parse)) 147 #endif 148 149 #define MAX_L2_HDR_SIZE 14 /* Not correct for VLAN/PPPoE */ 150 #define MAX_L3_HDR_SIZE 20 /* Not correct for IPv6 */ 151 #define MAX_L4_HDR_SIZE 60 /* TCP with maximum options */ 152 #define MAX_HDR_SIZE (MAX_L2_HDR_SIZE + MAX_L3_HDR_SIZE \ 153 + MAX_L4_HDR_SIZE) 154 /* Used in page mode to clamp packet size to the maximum supported by the hif 155 *hw interface (<16KiB) 156 */ 157 #define MAX_PFE_PKT_SIZE 16380UL 158 159 extern unsigned int emac_txq_cnt; 160 161 int pfe_hif_lib_init(struct pfe *pfe); 162 void pfe_hif_lib_exit(struct pfe *pfe); 163 int hif_lib_client_register(struct hif_client_s *client); 164 int hif_lib_client_unregister(struct hif_client_s *client); 165 void hif_lib_xmit_pkt(struct hif_client_s *client, unsigned int qno, 166 void *data, void *data1, unsigned int len, 167 u32 client_ctrl, unsigned int flags, void *client_data); 168 void hif_lib_indicate_client(struct hif_client_s *client, int event, int data); 169 int hif_lib_event_handler_start(struct hif_client_s *client, int event, int 170 data); 171 void *hif_lib_tx_get_next_complete(struct hif_client_s *client, int qno, 172 unsigned int *flags, int count); 173 int pfe_hif_shm_init(struct hif_shm *hif_shm, struct rte_mempool *mb_pool); 174 void pfe_hif_shm_clean(struct hif_shm *hif_shm); 175 176 int hif_lib_receive_pkt(struct hif_client_rx_queue *queue, 177 struct rte_mempool *pool, 178 struct rte_mbuf **rx_pkts, 179 uint16_t nb_pkts); 180 181 #endif /* _PFE_HIF_LIB_H_ */ 182