xref: /dpdk/drivers/net/pfe/pfe_hif.h (revision e77506397fc8005c5129e22e9e2d15d5876790fd)
15253fe37SGagandeep Singh /* SPDX-License-Identifier: BSD-3-Clause
2f513f620SSachin Saxena  * Copyright 2018-2019 NXP
35253fe37SGagandeep Singh  */
45253fe37SGagandeep Singh 
55253fe37SGagandeep Singh #ifndef _PFE_HIF_H_
65253fe37SGagandeep Singh #define _PFE_HIF_H_
75253fe37SGagandeep Singh 
85253fe37SGagandeep Singh #define HIF_CLIENT_QUEUES_MAX	16
95253fe37SGagandeep Singh #define HIF_RX_PKT_MIN_SIZE RTE_CACHE_LINE_SIZE
105253fe37SGagandeep Singh /*
117be78d02SJosh Soref  * HIF_TX_DESC_NT value should be always greater than 4,
125253fe37SGagandeep Singh  * Otherwise HIF_TX_POLL_MARK will become zero.
135253fe37SGagandeep Singh  */
145253fe37SGagandeep Singh #define HIF_RX_DESC_NT		64
155253fe37SGagandeep Singh #define HIF_TX_DESC_NT		2048
165253fe37SGagandeep Singh 
17fe38ad9bSGagandeep Singh #define HIF_FIRST_BUFFER	BIT(0)
18fe38ad9bSGagandeep Singh #define HIF_LAST_BUFFER		BIT(1)
19fe38ad9bSGagandeep Singh #define HIF_DONT_DMA_MAP	BIT(2)
20fe38ad9bSGagandeep Singh #define HIF_DATA_VALID		BIT(3)
21fe38ad9bSGagandeep Singh #define HIF_TSO			BIT(4)
22fe38ad9bSGagandeep Singh 
235253fe37SGagandeep Singh enum {
245253fe37SGagandeep Singh 	PFE_CL_GEM0 = 0,
255253fe37SGagandeep Singh 	PFE_CL_GEM1,
265253fe37SGagandeep Singh 	HIF_CLIENTS_MAX
275253fe37SGagandeep Singh };
285253fe37SGagandeep Singh 
295253fe37SGagandeep Singh /*structure to store client queue info */
305253fe37SGagandeep Singh struct hif_rx_queue {
315253fe37SGagandeep Singh 	struct rx_queue_desc *base;
325253fe37SGagandeep Singh 	u32	size;
335253fe37SGagandeep Singh 	u32	write_idx;
345253fe37SGagandeep Singh };
355253fe37SGagandeep Singh 
365253fe37SGagandeep Singh struct hif_tx_queue {
375253fe37SGagandeep Singh 	struct tx_queue_desc *base;
385253fe37SGagandeep Singh 	u32	size;
395253fe37SGagandeep Singh 	u32	ack_idx;
405253fe37SGagandeep Singh };
415253fe37SGagandeep Singh 
425253fe37SGagandeep Singh /*Structure to store the client info */
435253fe37SGagandeep Singh struct hif_client {
445253fe37SGagandeep Singh 	unsigned int	rx_qn;
455253fe37SGagandeep Singh 	struct hif_rx_queue	rx_q[HIF_CLIENT_QUEUES_MAX];
465253fe37SGagandeep Singh 	unsigned int	tx_qn;
475253fe37SGagandeep Singh 	struct hif_tx_queue	tx_q[HIF_CLIENT_QUEUES_MAX];
485253fe37SGagandeep Singh };
495253fe37SGagandeep Singh 
505253fe37SGagandeep Singh /*HIF hardware buffer descriptor */
515253fe37SGagandeep Singh struct hif_desc {
525253fe37SGagandeep Singh 	u32 ctrl;
535253fe37SGagandeep Singh 	u32 status;
545253fe37SGagandeep Singh 	u32 data;
555253fe37SGagandeep Singh 	u32 next;
565253fe37SGagandeep Singh };
575253fe37SGagandeep Singh 
585253fe37SGagandeep Singh struct __hif_desc {
595253fe37SGagandeep Singh 	u32 ctrl;
605253fe37SGagandeep Singh 	u32 status;
615253fe37SGagandeep Singh 	u32 data;
625253fe37SGagandeep Singh };
635253fe37SGagandeep Singh 
645253fe37SGagandeep Singh struct hif_desc_sw {
655253fe37SGagandeep Singh 	dma_addr_t data;
665253fe37SGagandeep Singh 	u16 len;
675253fe37SGagandeep Singh 	u8 client_id;
685253fe37SGagandeep Singh 	u8 q_no;
695253fe37SGagandeep Singh 	u16 flags;
705253fe37SGagandeep Singh };
715253fe37SGagandeep Singh 
72fe38ad9bSGagandeep Singh struct hif_hdr {
73fe38ad9bSGagandeep Singh 	u8 client_id;
74fe38ad9bSGagandeep Singh 	u8 q_num;
75fe38ad9bSGagandeep Singh 	u16 client_ctrl;
76fe38ad9bSGagandeep Singh 	u16 client_ctrl1;
77fe38ad9bSGagandeep Singh };
78fe38ad9bSGagandeep Singh 
79fe38ad9bSGagandeep Singh struct __hif_hdr {
80fe38ad9bSGagandeep Singh 	union {
81fe38ad9bSGagandeep Singh 		struct hif_hdr hdr;
82fe38ad9bSGagandeep Singh 		u32 word[2];
83fe38ad9bSGagandeep Singh 	};
84fe38ad9bSGagandeep Singh };
85fe38ad9bSGagandeep Singh 
86*e7750639SAndre Muezerie struct __rte_packed_begin hif_ipsec_hdr {
87fe38ad9bSGagandeep Singh 	u16	sa_handle[2];
88*e7750639SAndre Muezerie } __rte_packed_end;
89fe38ad9bSGagandeep Singh 
90fe38ad9bSGagandeep Singh struct pfe_parse {
91fe38ad9bSGagandeep Singh 	unsigned int packet_type;
92fe38ad9bSGagandeep Singh 	uint16_t hash;
93fe38ad9bSGagandeep Singh 	uint16_t parse_incomplete;
94fe38ad9bSGagandeep Singh 	unsigned long long ol_flags;
95fe38ad9bSGagandeep Singh };
96fe38ad9bSGagandeep Singh 
97fe38ad9bSGagandeep Singh /*  HIF_CTRL_TX... defines */
98fe38ad9bSGagandeep Singh #define HIF_CTRL_TX_CHECKSUM		BIT(2)
99fe38ad9bSGagandeep Singh 
100fe38ad9bSGagandeep Singh /*  HIF_CTRL_RX... defines */
101fe38ad9bSGagandeep Singh #define HIF_CTRL_RX_OFFSET_OFST         (24)
102fe38ad9bSGagandeep Singh #define HIF_CTRL_RX_CHECKSUMMED		BIT(2)
103fe38ad9bSGagandeep Singh #define HIF_CTRL_RX_CONTINUED		BIT(1)
104fe38ad9bSGagandeep Singh 
1055253fe37SGagandeep Singh struct pfe_hif {
1065253fe37SGagandeep Singh 	/* To store registered clients in hif layer */
1075253fe37SGagandeep Singh 	struct hif_client client[HIF_CLIENTS_MAX];
1085253fe37SGagandeep Singh 	struct hif_shm *shm;
1095253fe37SGagandeep Singh 
1105253fe37SGagandeep Singh 	void	*descr_baseaddr_v;
1115253fe37SGagandeep Singh 	unsigned long	descr_baseaddr_p;
1125253fe37SGagandeep Singh 
1135253fe37SGagandeep Singh 	struct hif_desc *rx_base;
1145253fe37SGagandeep Singh 	u32	rx_ring_size;
1155253fe37SGagandeep Singh 	u32	rxtoclean_index;
1165253fe37SGagandeep Singh 	void	*rx_buf_addr[HIF_RX_DESC_NT];
1175253fe37SGagandeep Singh 	void	*rx_buf_vaddr[HIF_RX_DESC_NT];
1185253fe37SGagandeep Singh 	int	rx_buf_len[HIF_RX_DESC_NT];
1195253fe37SGagandeep Singh 	unsigned int qno;
1205253fe37SGagandeep Singh 	unsigned int client_id;
1215253fe37SGagandeep Singh 	unsigned int client_ctrl;
1225253fe37SGagandeep Singh 	unsigned int started;
1235253fe37SGagandeep Singh 	unsigned int setuped;
1245253fe37SGagandeep Singh 
1255253fe37SGagandeep Singh 	struct hif_desc *tx_base;
1265253fe37SGagandeep Singh 	u32	tx_ring_size;
1275253fe37SGagandeep Singh 	u32	txtosend;
1285253fe37SGagandeep Singh 	u32	txtoclean;
1295253fe37SGagandeep Singh 	u32	txavail;
1305253fe37SGagandeep Singh 	u32	txtoflush;
1315253fe37SGagandeep Singh 	struct hif_desc_sw tx_sw_queue[HIF_TX_DESC_NT];
1325253fe37SGagandeep Singh 	int32_t	epoll_fd; /**< File descriptor created for interrupt polling */
1335253fe37SGagandeep Singh 
1345253fe37SGagandeep Singh /* tx_lock synchronizes hif packet tx as well as pfe_hif structure access */
1355253fe37SGagandeep Singh 	rte_spinlock_t tx_lock;
1365253fe37SGagandeep Singh /* lock synchronizes hif rx queue processing */
1375253fe37SGagandeep Singh 	rte_spinlock_t lock;
1385253fe37SGagandeep Singh 	struct rte_device *dev;
1395253fe37SGagandeep Singh };
1405253fe37SGagandeep Singh 
14136220514SGagandeep Singh void hif_xmit_pkt(struct pfe_hif *hif, unsigned int client_id, unsigned int
14236220514SGagandeep Singh 			q_no, void *data, u32 len, unsigned int flags);
143fe38ad9bSGagandeep Singh void hif_process_client_req(struct pfe_hif *hif, int req, int data1, int
144fe38ad9bSGagandeep Singh 				data2);
1455253fe37SGagandeep Singh int pfe_hif_init(struct pfe *pfe);
1465253fe37SGagandeep Singh void pfe_hif_exit(struct pfe *pfe);
1475253fe37SGagandeep Singh void pfe_hif_rx_idle(struct pfe_hif *hif);
14836220514SGagandeep Singh int pfe_hif_rx_process(struct pfe *pfe, int budget);
149592041a0SGagandeep Singh int pfe_hif_init_buffers(struct pfe_hif *hif);
15036220514SGagandeep Singh void pfe_tx_do_cleanup(struct pfe *pfe);
15136220514SGagandeep Singh 
15236220514SGagandeep Singh #define __memcpy8(dst, src)		memcpy(dst, src, 8)
15336220514SGagandeep Singh #define __memcpy12(dst, src)		memcpy(dst, src, 12)
15436220514SGagandeep Singh #define __memcpy(dst, src, len)		memcpy(dst, src, len)
1555253fe37SGagandeep Singh 
1565253fe37SGagandeep Singh #endif /* _PFE_HIF_H_ */
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