xref: /dpdk/drivers/net/pfe/pfe_hif.h (revision e77506397fc8005c5129e22e9e2d15d5876790fd)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2018-2019 NXP
3  */
4 
5 #ifndef _PFE_HIF_H_
6 #define _PFE_HIF_H_
7 
8 #define HIF_CLIENT_QUEUES_MAX	16
9 #define HIF_RX_PKT_MIN_SIZE RTE_CACHE_LINE_SIZE
10 /*
11  * HIF_TX_DESC_NT value should be always greater than 4,
12  * Otherwise HIF_TX_POLL_MARK will become zero.
13  */
14 #define HIF_RX_DESC_NT		64
15 #define HIF_TX_DESC_NT		2048
16 
17 #define HIF_FIRST_BUFFER	BIT(0)
18 #define HIF_LAST_BUFFER		BIT(1)
19 #define HIF_DONT_DMA_MAP	BIT(2)
20 #define HIF_DATA_VALID		BIT(3)
21 #define HIF_TSO			BIT(4)
22 
23 enum {
24 	PFE_CL_GEM0 = 0,
25 	PFE_CL_GEM1,
26 	HIF_CLIENTS_MAX
27 };
28 
29 /*structure to store client queue info */
30 struct hif_rx_queue {
31 	struct rx_queue_desc *base;
32 	u32	size;
33 	u32	write_idx;
34 };
35 
36 struct hif_tx_queue {
37 	struct tx_queue_desc *base;
38 	u32	size;
39 	u32	ack_idx;
40 };
41 
42 /*Structure to store the client info */
43 struct hif_client {
44 	unsigned int	rx_qn;
45 	struct hif_rx_queue	rx_q[HIF_CLIENT_QUEUES_MAX];
46 	unsigned int	tx_qn;
47 	struct hif_tx_queue	tx_q[HIF_CLIENT_QUEUES_MAX];
48 };
49 
50 /*HIF hardware buffer descriptor */
51 struct hif_desc {
52 	u32 ctrl;
53 	u32 status;
54 	u32 data;
55 	u32 next;
56 };
57 
58 struct __hif_desc {
59 	u32 ctrl;
60 	u32 status;
61 	u32 data;
62 };
63 
64 struct hif_desc_sw {
65 	dma_addr_t data;
66 	u16 len;
67 	u8 client_id;
68 	u8 q_no;
69 	u16 flags;
70 };
71 
72 struct hif_hdr {
73 	u8 client_id;
74 	u8 q_num;
75 	u16 client_ctrl;
76 	u16 client_ctrl1;
77 };
78 
79 struct __hif_hdr {
80 	union {
81 		struct hif_hdr hdr;
82 		u32 word[2];
83 	};
84 };
85 
86 struct __rte_packed_begin hif_ipsec_hdr {
87 	u16	sa_handle[2];
88 } __rte_packed_end;
89 
90 struct pfe_parse {
91 	unsigned int packet_type;
92 	uint16_t hash;
93 	uint16_t parse_incomplete;
94 	unsigned long long ol_flags;
95 };
96 
97 /*  HIF_CTRL_TX... defines */
98 #define HIF_CTRL_TX_CHECKSUM		BIT(2)
99 
100 /*  HIF_CTRL_RX... defines */
101 #define HIF_CTRL_RX_OFFSET_OFST         (24)
102 #define HIF_CTRL_RX_CHECKSUMMED		BIT(2)
103 #define HIF_CTRL_RX_CONTINUED		BIT(1)
104 
105 struct pfe_hif {
106 	/* To store registered clients in hif layer */
107 	struct hif_client client[HIF_CLIENTS_MAX];
108 	struct hif_shm *shm;
109 
110 	void	*descr_baseaddr_v;
111 	unsigned long	descr_baseaddr_p;
112 
113 	struct hif_desc *rx_base;
114 	u32	rx_ring_size;
115 	u32	rxtoclean_index;
116 	void	*rx_buf_addr[HIF_RX_DESC_NT];
117 	void	*rx_buf_vaddr[HIF_RX_DESC_NT];
118 	int	rx_buf_len[HIF_RX_DESC_NT];
119 	unsigned int qno;
120 	unsigned int client_id;
121 	unsigned int client_ctrl;
122 	unsigned int started;
123 	unsigned int setuped;
124 
125 	struct hif_desc *tx_base;
126 	u32	tx_ring_size;
127 	u32	txtosend;
128 	u32	txtoclean;
129 	u32	txavail;
130 	u32	txtoflush;
131 	struct hif_desc_sw tx_sw_queue[HIF_TX_DESC_NT];
132 	int32_t	epoll_fd; /**< File descriptor created for interrupt polling */
133 
134 /* tx_lock synchronizes hif packet tx as well as pfe_hif structure access */
135 	rte_spinlock_t tx_lock;
136 /* lock synchronizes hif rx queue processing */
137 	rte_spinlock_t lock;
138 	struct rte_device *dev;
139 };
140 
141 void hif_xmit_pkt(struct pfe_hif *hif, unsigned int client_id, unsigned int
142 			q_no, void *data, u32 len, unsigned int flags);
143 void hif_process_client_req(struct pfe_hif *hif, int req, int data1, int
144 				data2);
145 int pfe_hif_init(struct pfe *pfe);
146 void pfe_hif_exit(struct pfe *pfe);
147 void pfe_hif_rx_idle(struct pfe_hif *hif);
148 int pfe_hif_rx_process(struct pfe *pfe, int budget);
149 int pfe_hif_init_buffers(struct pfe_hif *hif);
150 void pfe_tx_do_cleanup(struct pfe *pfe);
151 
152 #define __memcpy8(dst, src)		memcpy(dst, src, 8)
153 #define __memcpy12(dst, src)		memcpy(dst, src, 12)
154 #define __memcpy(dst, src, len)		memcpy(dst, src, len)
155 
156 #endif /* _PFE_HIF_H_ */
157