1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018-2019 NXP 3 */ 4 5 #ifndef _PFE_ETH_H_ 6 #define _PFE_ETH_H_ 7 8 #include <compat.h> 9 #include <rte_ethdev.h> 10 #include <ethdev_vdev.h> 11 12 #define ETH_ALEN 6 13 #define GEMAC_NO_PHY BIT(0) 14 15 #define PFE_SOC_ID_FILE "/sys/devices/soc0/soc_id" 16 extern unsigned int pfe_svr; 17 #define SVR_LS1012A_REV2 0x87040020 18 #define SVR_LS1012A_REV1 0x87040010 19 20 #define PFE_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN) 21 #define MAX_MTU_ON_REV1 1878 22 struct ls1012a_eth_platform_data { 23 /* device specific information */ 24 u32 device_flags; 25 char name[16]; 26 27 /* board specific information */ 28 u32 mii_config; 29 u32 phy_flags; 30 u32 gem_id; 31 u32 bus_id; 32 u32 phy_id; 33 u32 mdio_muxval; 34 u8 mac_addr[ETH_ALEN]; 35 }; 36 37 struct ls1012a_mdio_platform_data { 38 int enabled; 39 int irq[32]; 40 u32 phy_mask; 41 int mdc_div; 42 }; 43 44 struct ls1012a_pfe_platform_data { 45 struct ls1012a_eth_platform_data ls1012a_eth_pdata[3]; 46 struct ls1012a_mdio_platform_data ls1012a_mdio_pdata[3]; 47 }; 48 49 #define EMAC_TXQ_CNT 16 50 #define EMAC_TXQ_DEPTH (HIF_TX_DESC_NT) 51 52 #define JUMBO_FRAME_SIZE 10258 53 #define EMAC_RXQ_CNT 1 54 #define EMAC_RXQ_DEPTH HIF_RX_DESC_NT 55 56 struct pfe_eth_priv_s { 57 struct pfe *pfe; 58 struct hif_client_s client; 59 int low_tmu_q; 60 int high_tmu_q; 61 struct rte_eth_dev *ndev; 62 struct rte_eth_stats stats; 63 int id; 64 int promisc; 65 int link_fd; 66 67 spinlock_t lock; /* protect member variables */ 68 void *EMAC_baseaddr; 69 /* This points to the EMAC base from where we access PHY */ 70 void *PHY_baseaddr; 71 void *GPI_baseaddr; 72 73 struct ls1012a_eth_platform_data *einfo; 74 }; 75 76 #endif /* _PFE_ETH_H_ */ 77