xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.h (revision f06125c07d6203a84e9b242c62d6a8e532a5c51d)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Cavium, Inc
3  */
4 
5 #ifndef	__OCTEONTX_ETHDEV_H__
6 #define	__OCTEONTX_ETHDEV_H__
7 
8 #include <stdbool.h>
9 
10 #include <rte_common.h>
11 #include <rte_ethdev.h>
12 #include <rte_eventdev.h>
13 #include <rte_mempool.h>
14 #include <rte_memory.h>
15 
16 #include <octeontx_fpavf.h>
17 
18 #include "base/octeontx_bgx.h"
19 #include "base/octeontx_pki_var.h"
20 #include "base/octeontx_pkivf.h"
21 #include "base/octeontx_pkovf.h"
22 #include "base/octeontx_io.h"
23 
24 #define OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT	12
25 #define OCTEONTX_VDEV_NR_PORT_ARG		("nr_port")
26 #define OCTEONTX_MAX_NAME_LEN			32
27 
28 static inline struct octeontx_nic *
29 octeontx_pmd_priv(struct rte_eth_dev *dev)
30 {
31 	return dev->data->dev_private;
32 }
33 
34 /* Octeontx ethdev nic */
35 struct octeontx_nic {
36 	struct rte_eth_dev *dev;
37 	int node;
38 	int port_id;
39 	int port_ena;
40 	int base_ichan;
41 	int num_ichans;
42 	int base_ochan;
43 	int num_ochans;
44 	uint8_t evdev;
45 	uint8_t bpen;
46 	uint8_t fcs_strip;
47 	uint8_t bcast_mode;
48 	uint8_t mcast_mode;
49 	uint16_t num_tx_queues;
50 	uint64_t hwcap;
51 	uint8_t link_up;
52 	uint8_t	duplex;
53 	uint8_t speed;
54 	uint16_t mtu;
55 	uint8_t mac_addr[ETHER_ADDR_LEN];
56 	/* Rx port parameters */
57 	struct {
58 		bool classifier_enable;
59 		bool hash_enable;
60 		bool initialized;
61 	} pki;
62 
63 	uint16_t ev_queues;
64 	uint16_t ev_ports;
65 } __rte_cache_aligned;
66 
67 struct octeontx_txq {
68 	uint16_t queue_id;
69 	octeontx_dq_t dq;
70 	struct rte_eth_dev *eth_dev;
71 } __rte_cache_aligned;
72 
73 struct octeontx_rxq {
74 	uint16_t queue_id;
75 	uint16_t port_id;
76 	uint8_t evdev;
77 	struct rte_eth_dev *eth_dev;
78 	uint16_t ev_queues;
79 	uint16_t ev_ports;
80 } __rte_cache_aligned;
81 
82 #endif /* __OCTEONTX_ETHDEV_H__ */
83