xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.h (revision 8b42b07eef49915468cfc9b9684cb274efa42fdd)
1aaf4363eSJerin Jacob /* SPDX-License-Identifier: BSD-3-Clause
2aaf4363eSJerin Jacob  * Copyright(c) 2017 Cavium, Inc
3f7be70e5SJerin Jacob  */
4aaf4363eSJerin Jacob 
5f7be70e5SJerin Jacob #ifndef	__OCTEONTX_ETHDEV_H__
6f7be70e5SJerin Jacob #define	__OCTEONTX_ETHDEV_H__
7f7be70e5SJerin Jacob 
8f7be70e5SJerin Jacob #include <stdbool.h>
9f7be70e5SJerin Jacob 
10f7be70e5SJerin Jacob #include <rte_common.h>
11ffc905f3SFerruh Yigit #include <rte_ethdev_driver.h>
12f7be70e5SJerin Jacob #include <rte_eventdev.h>
13f7be70e5SJerin Jacob #include <rte_mempool.h>
14f7be70e5SJerin Jacob #include <rte_memory.h>
15f7be70e5SJerin Jacob 
16f7be70e5SJerin Jacob #include <octeontx_fpavf.h>
17f7be70e5SJerin Jacob 
18f7be70e5SJerin Jacob #include "base/octeontx_bgx.h"
19f7be70e5SJerin Jacob #include "base/octeontx_pki_var.h"
20f7be70e5SJerin Jacob #include "base/octeontx_pkivf.h"
21f7be70e5SJerin Jacob #include "base/octeontx_pkovf.h"
22f7be70e5SJerin Jacob #include "base/octeontx_io.h"
23f7be70e5SJerin Jacob 
24b4ec00a2SStephen Hemminger #define OCTEONTX_PMD				net_octeontx
25f7be70e5SJerin Jacob #define OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT	12
26f7be70e5SJerin Jacob #define OCTEONTX_VDEV_NR_PORT_ARG		("nr_port")
27f7be70e5SJerin Jacob #define OCTEONTX_MAX_NAME_LEN			32
28f7be70e5SJerin Jacob 
29989d4926SPavan Nikhilesh #define OCTEONTX_MAX_BGX_PORTS			4
30989d4926SPavan Nikhilesh #define OCTEONTX_MAX_LMAC_PER_BGX		4
31989d4926SPavan Nikhilesh 
323151e6a6SHarman Kalra #define OCCTX_RX_NB_SEG_MAX			6
33*8b42b07eSHarman Kalra #define OCCTX_INTR_POLL_INTERVAL_MS		1000
343151e6a6SHarman Kalra /* VLAN tag inserted by OCCTX_TX_VTAG_ACTION.
353151e6a6SHarman Kalra  * In Tx space is always reserved for this in FRS.
363151e6a6SHarman Kalra  */
373151e6a6SHarman Kalra #define OCCTX_MAX_VTAG_INS		2
383151e6a6SHarman Kalra #define OCCTX_MAX_VTAG_ACT_SIZE		(4 * OCCTX_MAX_VTAG_INS)
393151e6a6SHarman Kalra 
403151e6a6SHarman Kalra /* HW config of frame size doesn't include FCS */
413151e6a6SHarman Kalra #define OCCTX_MAX_HW_FRS		9212
423151e6a6SHarman Kalra #define OCCTX_MIN_HW_FRS		60
433151e6a6SHarman Kalra 
443151e6a6SHarman Kalra /* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */
453151e6a6SHarman Kalra #define OCCTX_L2_OVERHEAD	(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
463151e6a6SHarman Kalra 				 OCCTX_MAX_VTAG_ACT_SIZE)
473151e6a6SHarman Kalra 
483151e6a6SHarman Kalra /* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */
493151e6a6SHarman Kalra #define OCCTX_MAX_FRS	\
503151e6a6SHarman Kalra 	(OCCTX_MAX_HW_FRS + RTE_ETHER_CRC_LEN - OCCTX_MAX_VTAG_ACT_SIZE)
513151e6a6SHarman Kalra 
523151e6a6SHarman Kalra #define OCCTX_MIN_FRS		(OCCTX_MIN_HW_FRS + RTE_ETHER_CRC_LEN)
533151e6a6SHarman Kalra 
543151e6a6SHarman Kalra #define OCCTX_MAX_MTU		(OCCTX_MAX_FRS - OCCTX_L2_OVERHEAD)
553151e6a6SHarman Kalra 
5685221a0cSHarman Kalra #define OCTEONTX_RX_OFFLOADS		(DEV_RX_OFFLOAD_CHECKSUM     | \
5785221a0cSHarman Kalra 					 DEV_RX_OFFLOAD_SCATTER	     | \
5856139e85SVamsi Attunuru 					 DEV_RX_OFFLOAD_JUMBO_FRAME  | \
5956139e85SVamsi Attunuru 					 DEV_RX_OFFLOAD_VLAN_FILTER)
6085221a0cSHarman Kalra 
6185221a0cSHarman Kalra #define OCTEONTX_TX_OFFLOADS		(DEV_TX_OFFLOAD_MT_LOCKFREE    |  \
625cbe1848SHarman Kalra 					 DEV_TX_OFFLOAD_MBUF_FAST_FREE |  \
6385221a0cSHarman Kalra 					 DEV_TX_OFFLOAD_MULTI_SEGS)
64a9287089SPavan Nikhilesh 
65f7be70e5SJerin Jacob static inline struct octeontx_nic *
66f7be70e5SJerin Jacob octeontx_pmd_priv(struct rte_eth_dev *dev)
67f7be70e5SJerin Jacob {
68f7be70e5SJerin Jacob 	return dev->data->dev_private;
69f7be70e5SJerin Jacob }
70f7be70e5SJerin Jacob 
71989d4926SPavan Nikhilesh extern uint16_t
72989d4926SPavan Nikhilesh rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
73989d4926SPavan Nikhilesh 
7456139e85SVamsi Attunuru struct vlan_entry {
7556139e85SVamsi Attunuru 	TAILQ_ENTRY(vlan_entry) next;
7656139e85SVamsi Attunuru 	uint16_t vlan_id;
7756139e85SVamsi Attunuru };
7856139e85SVamsi Attunuru 
7956139e85SVamsi Attunuru TAILQ_HEAD(octeontx_vlan_filter_tbl, vlan_entry);
8056139e85SVamsi Attunuru 
8156139e85SVamsi Attunuru struct octeontx_vlan_info {
8256139e85SVamsi Attunuru 	struct octeontx_vlan_filter_tbl fltr_tbl;
8356139e85SVamsi Attunuru 	uint8_t filter_on;
8456139e85SVamsi Attunuru };
8556139e85SVamsi Attunuru 
86f7be70e5SJerin Jacob /* Octeontx ethdev nic */
87f7be70e5SJerin Jacob struct octeontx_nic {
88f7be70e5SJerin Jacob 	struct rte_eth_dev *dev;
89f7be70e5SJerin Jacob 	int node;
90f7be70e5SJerin Jacob 	int port_id;
91f7be70e5SJerin Jacob 	int port_ena;
92f7be70e5SJerin Jacob 	int base_ichan;
93f7be70e5SJerin Jacob 	int num_ichans;
94f7be70e5SJerin Jacob 	int base_ochan;
95f7be70e5SJerin Jacob 	int num_ochans;
96f7be70e5SJerin Jacob 	uint8_t evdev;
97f7be70e5SJerin Jacob 	uint8_t bpen;
98f7be70e5SJerin Jacob 	uint8_t fcs_strip;
99f7be70e5SJerin Jacob 	uint8_t bcast_mode;
100f7be70e5SJerin Jacob 	uint8_t mcast_mode;
101f7be70e5SJerin Jacob 	uint16_t num_tx_queues;
102f7be70e5SJerin Jacob 	uint64_t hwcap;
103a6d6f0afSPavan Nikhilesh 	uint8_t pko_vfid;
104f7be70e5SJerin Jacob 	uint8_t link_up;
105f7be70e5SJerin Jacob 	uint8_t	duplex;
106f7be70e5SJerin Jacob 	uint8_t speed;
1073151e6a6SHarman Kalra 	uint16_t bgx_mtu;
108f7be70e5SJerin Jacob 	uint16_t mtu;
10935b2d13fSOlivier Matz 	uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
110f7be70e5SJerin Jacob 	/* Rx port parameters */
111f7be70e5SJerin Jacob 	struct {
112f7be70e5SJerin Jacob 		bool classifier_enable;
113f7be70e5SJerin Jacob 		bool hash_enable;
114f7be70e5SJerin Jacob 		bool initialized;
115f7be70e5SJerin Jacob 	} pki;
116f7be70e5SJerin Jacob 
117f7be70e5SJerin Jacob 	uint16_t ev_queues;
118f7be70e5SJerin Jacob 	uint16_t ev_ports;
11985221a0cSHarman Kalra 	uint64_t rx_offloads;
12085221a0cSHarman Kalra 	uint16_t rx_offload_flags;
12185221a0cSHarman Kalra 	uint64_t tx_offloads;
12285221a0cSHarman Kalra 	uint16_t tx_offload_flags;
12356139e85SVamsi Attunuru 	struct octeontx_vlan_info vlan_info;
124*8b42b07eSHarman Kalra 	int print_flag;
125f7be70e5SJerin Jacob } __rte_cache_aligned;
126f7be70e5SJerin Jacob 
1277fe7c98fSJerin Jacob struct octeontx_txq {
1287fe7c98fSJerin Jacob 	uint16_t queue_id;
1297fe7c98fSJerin Jacob 	octeontx_dq_t dq;
1307fe7c98fSJerin Jacob 	struct rte_eth_dev *eth_dev;
1317fe7c98fSJerin Jacob } __rte_cache_aligned;
1327fe7c98fSJerin Jacob 
133197438eeSJerin Jacob struct octeontx_rxq {
134197438eeSJerin Jacob 	uint16_t queue_id;
135197438eeSJerin Jacob 	uint16_t port_id;
136197438eeSJerin Jacob 	uint8_t evdev;
137197438eeSJerin Jacob 	struct rte_eth_dev *eth_dev;
138197438eeSJerin Jacob 	uint16_t ev_queues;
139197438eeSJerin Jacob 	uint16_t ev_ports;
14085221a0cSHarman Kalra 	struct rte_mempool *pool;
141197438eeSJerin Jacob } __rte_cache_aligned;
142197438eeSJerin Jacob 
1437f4116bdSHarman Kalra void
1447f4116bdSHarman Kalra octeontx_set_tx_function(struct rte_eth_dev *dev);
14556139e85SVamsi Attunuru 
14656139e85SVamsi Attunuru /* VLAN */
147*8b42b07eSHarman Kalra int octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx);
148*8b42b07eSHarman Kalra int octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx);
14956139e85SVamsi Attunuru int octeontx_dev_vlan_offload_init(struct rte_eth_dev *dev);
15056139e85SVamsi Attunuru int octeontx_dev_vlan_offload_fini(struct rte_eth_dev *eth_dev);
15156139e85SVamsi Attunuru int octeontx_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
15256139e85SVamsi Attunuru int octeontx_dev_vlan_filter_set(struct rte_eth_dev *dev,
15356139e85SVamsi Attunuru 				 uint16_t vlan_id, int on);
154*8b42b07eSHarman Kalra int octeontx_dev_set_link_up(struct rte_eth_dev *eth_dev);
155*8b42b07eSHarman Kalra int octeontx_dev_set_link_down(struct rte_eth_dev *eth_dev);
15656139e85SVamsi Attunuru 
157f7be70e5SJerin Jacob #endif /* __OCTEONTX_ETHDEV_H__ */
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