1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
3 */
4
5 #include <string.h>
6
7 #include <rte_eal.h>
8 #include <bus_pci_driver.h>
9
10 #include "../octeontx_logs.h"
11 #include "octeontx_io.h"
12 #include "octeontx_pkivf.h"
13
14
15 struct octeontx_pkivf {
16 uint8_t *bar0;
17 uint8_t status;
18 uint16_t domain;
19 uint16_t vfid;
20 };
21
22 struct octeontx_pki_vf_ctl_s {
23 struct octeontx_pkivf pki[PKI_VF_MAX];
24 };
25
26 static struct octeontx_pki_vf_ctl_s pki_vf_ctl;
27
28 int
octeontx_pki_port_open(int port)29 octeontx_pki_port_open(int port)
30 {
31 uint16_t global_domain = octeontx_get_global_domain();
32 struct octeontx_mbox_hdr hdr;
33 pki_port_type_t port_type;
34 int i, res;
35
36 /* Check if atleast one PKI vf is in application domain. */
37 for (i = 0; i < PKI_VF_MAX; i++) {
38 if (pki_vf_ctl.pki[i].domain != global_domain)
39 continue;
40 break;
41 }
42
43 if (i == PKI_VF_MAX)
44 return -ENODEV;
45
46 port_type.port_type = OCTTX_PORT_TYPE_NET;
47 hdr.coproc = OCTEONTX_PKI_COPROC;
48 hdr.msg = MBOX_PKI_PORT_OPEN;
49 hdr.vfid = port;
50
51 res = octeontx_mbox_send(&hdr, &port_type, sizeof(pki_port_type_t),
52 NULL, 0);
53 if (res < 0)
54 return -EACCES;
55 return res;
56 }
57
58 int
octeontx_pki_port_hash_config(int port,pki_hash_cfg_t * hash_cfg)59 octeontx_pki_port_hash_config(int port, pki_hash_cfg_t *hash_cfg)
60 {
61 struct octeontx_mbox_hdr hdr;
62 int res;
63
64 pki_hash_cfg_t h_cfg = *(pki_hash_cfg_t *)hash_cfg;
65 int len = sizeof(pki_hash_cfg_t);
66
67 hdr.coproc = OCTEONTX_PKI_COPROC;
68 hdr.msg = MBOX_PKI_PORT_HASH_CONFIG;
69 hdr.vfid = port;
70
71 res = octeontx_mbox_send(&hdr, &h_cfg, len, NULL, 0);
72 if (res < 0)
73 return -EACCES;
74
75 return res;
76 }
77
78 int
octeontx_pki_port_pktbuf_config(int port,pki_pktbuf_cfg_t * buf_cfg)79 octeontx_pki_port_pktbuf_config(int port, pki_pktbuf_cfg_t *buf_cfg)
80 {
81 struct octeontx_mbox_hdr hdr;
82 int res;
83
84 pki_pktbuf_cfg_t b_cfg = *(pki_pktbuf_cfg_t *)buf_cfg;
85 int len = sizeof(pki_pktbuf_cfg_t);
86
87 hdr.coproc = OCTEONTX_PKI_COPROC;
88 hdr.msg = MBOX_PKI_PORT_PKTBUF_CONFIG;
89 hdr.vfid = port;
90
91 res = octeontx_mbox_send(&hdr, &b_cfg, len, NULL, 0);
92 if (res < 0)
93 return -EACCES;
94 return res;
95 }
96
97 int
octeontx_pki_port_create_qos(int port,pki_qos_cfg_t * qos_cfg)98 octeontx_pki_port_create_qos(int port, pki_qos_cfg_t *qos_cfg)
99 {
100 struct octeontx_mbox_hdr hdr;
101 int res;
102
103 pki_qos_cfg_t q_cfg = *(pki_qos_cfg_t *)qos_cfg;
104 int len = sizeof(pki_qos_cfg_t);
105
106 hdr.coproc = OCTEONTX_PKI_COPROC;
107 hdr.msg = MBOX_PKI_PORT_CREATE_QOS;
108 hdr.vfid = port;
109
110 res = octeontx_mbox_send(&hdr, &q_cfg, len, NULL, 0);
111 if (res < 0)
112 return -EACCES;
113
114 return res;
115 }
116
117
118 int
octeontx_pki_port_errchk_config(int port,pki_errchk_cfg_t * cfg)119 octeontx_pki_port_errchk_config(int port, pki_errchk_cfg_t *cfg)
120 {
121 struct octeontx_mbox_hdr hdr;
122 int res;
123
124 pki_errchk_cfg_t e_cfg;
125 e_cfg = *((pki_errchk_cfg_t *)(cfg));
126 int len = sizeof(pki_errchk_cfg_t);
127
128 hdr.coproc = OCTEONTX_PKI_COPROC;
129 hdr.msg = MBOX_PKI_PORT_ERRCHK_CONFIG;
130 hdr.vfid = port;
131
132 res = octeontx_mbox_send(&hdr, &e_cfg, len, NULL, 0);
133 if (res < 0)
134 return -EACCES;
135
136 return res;
137 }
138
139 int
octeontx_pki_port_vlan_fltr_config(int port,pki_port_vlan_filter_config_t * fltr_cfg)140 octeontx_pki_port_vlan_fltr_config(int port,
141 pki_port_vlan_filter_config_t *fltr_cfg)
142 {
143 struct octeontx_mbox_hdr hdr;
144 int res;
145
146 pki_port_vlan_filter_config_t cfg = *fltr_cfg;
147 int len = sizeof(pki_port_vlan_filter_config_t);
148
149 hdr.coproc = OCTEONTX_PKI_COPROC;
150 hdr.msg = MBOX_PKI_PORT_VLAN_FILTER_CONFIG;
151 hdr.vfid = port;
152
153 res = octeontx_mbox_send(&hdr, &cfg, len, NULL, 0);
154 if (res < 0)
155 return -EACCES;
156 return res;
157 }
158
159 int
octeontx_pki_port_vlan_fltr_entry_config(int port,pki_port_vlan_filter_entry_config_t * e_cfg)160 octeontx_pki_port_vlan_fltr_entry_config(int port,
161 pki_port_vlan_filter_entry_config_t *e_cfg)
162 {
163 struct octeontx_mbox_hdr hdr;
164 int res;
165
166 pki_port_vlan_filter_entry_config_t cfg = *e_cfg;
167 int len = sizeof(pki_port_vlan_filter_entry_config_t);
168
169 hdr.coproc = OCTEONTX_PKI_COPROC;
170 hdr.msg = MBOX_PKI_PORT_VLAN_FILTER_ENTRY_CONFIG;
171 hdr.vfid = port;
172
173 res = octeontx_mbox_send(&hdr, &cfg, len, NULL, 0);
174 if (res < 0)
175 return -EACCES;
176 return res;
177 }
178
179 #define PCI_VENDOR_ID_CAVIUM 0x177D
180 #define PCI_DEVICE_ID_OCTEONTX_PKI_VF 0xA0DD
181
182 /* PKIVF pcie device */
183 static int
pkivf_probe(struct rte_pci_driver * pci_drv,struct rte_pci_device * pci_dev)184 pkivf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
185 {
186 struct octeontx_pkivf *res;
187 static uint8_t vf_cnt;
188 uint16_t domain;
189 uint16_t vfid;
190 uint8_t *bar0;
191 uint64_t val;
192
193 RTE_SET_USED(pci_drv);
194 /* For secondary processes, the primary has done all the work */
195 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
196 return 0;
197
198 if (pci_dev->mem_resource[0].addr == NULL) {
199 octeontx_log_err("PKI Empty bar[0] %p",
200 pci_dev->mem_resource[0].addr);
201 return -ENODEV;
202 }
203
204 bar0 = pci_dev->mem_resource[0].addr;
205 val = octeontx_read64(bar0);
206 domain = val & 0xffff;
207 vfid = (val >> 16) & 0xffff;
208
209 if (unlikely(vfid >= PKI_VF_MAX)) {
210 octeontx_log_err("pki: Invalid vfid %d", vfid);
211 return -EINVAL;
212 }
213
214 res = &pki_vf_ctl.pki[vf_cnt++];
215 res->vfid = vfid;
216 res->domain = domain;
217 res->bar0 = bar0;
218
219 octeontx_log_dbg("PKI Domain=%d vfid=%d", res->domain, res->vfid);
220 return 0;
221 }
222
223 static const struct rte_pci_id pci_pkivf_map[] = {
224 {
225 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
226 PCI_DEVICE_ID_OCTEONTX_PKI_VF)
227 },
228 {
229 .vendor_id = 0,
230 },
231 };
232
233 static struct rte_pci_driver pci_pkivf = {
234 .id_table = pci_pkivf_map,
235 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
236 .probe = pkivf_probe,
237 };
238
239 RTE_PMD_REGISTER_PCI(octeontx_pkivf, pci_pkivf);
240