1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2024 Napatech A/S 4 */ 5 6 /* 7 * nthw_fpga_reg_defs_sdc.h 8 * 9 * Auto-generated file - do *NOT* edit 10 * 11 */ 12 13 #ifndef _NTHW_FPGA_REG_DEFS_SDC_ 14 #define _NTHW_FPGA_REG_DEFS_SDC_ 15 16 /* SDC */ 17 #define NTHW_MOD_SDC (0xd2369530UL) 18 #define SDC_CELL_CNT (0xc6d82110UL) 19 #define SDC_CELL_CNT_CELL_CNT (0xdd4de629UL) 20 #define SDC_CELL_CNT_PERIOD (0x8dfef1d4UL) 21 #define SDC_CELL_CNT_PERIOD_CELL_CNT_PERIOD (0x2b5819c1UL) 22 #define SDC_CTRL (0x1577b205UL) 23 #define SDC_CTRL_INIT (0x70e62104UL) 24 #define SDC_CTRL_RESET_POINTERS (0xec1c0f9cUL) 25 #define SDC_CTRL_RUN_TEST (0x2efbe98eUL) 26 #define SDC_CTRL_STOP_CLIENT (0xb11ebe2dUL) 27 #define SDC_CTRL_TEST_EN (0xaa1fa4UL) 28 #define SDC_FILL_LVL (0xd3b30232UL) 29 #define SDC_FILL_LVL_FILL_LVL (0xc97281acUL) 30 #define SDC_MAX_FILL_LVL (0x326de743UL) 31 #define SDC_MAX_FILL_LVL_MAX_FILL_LVL (0x915fbf73UL) 32 #define SDC_STAT (0x37ed3c5eUL) 33 #define SDC_STAT_CALIB (0x27122e80UL) 34 #define SDC_STAT_CELL_CNT_STOPPED (0x517d5cafUL) 35 #define SDC_STAT_ERR_FOUND (0x3bb6bd0UL) 36 #define SDC_STAT_INIT_DONE (0x1dc2e095UL) 37 #define SDC_STAT_MMCM_LOCK (0xd9aac1c2UL) 38 #define SDC_STAT_PLL_LOCK (0x3bcab6ebUL) 39 #define SDC_STAT_RESETTING (0xa85349c1UL) 40 41 #endif /* _NTHW_FPGA_REG_DEFS_SDC_ */ 42