xref: /dpdk/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rst9563.h (revision 7b1fef78f71690d6ae4835097dd2045312cba348)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  * Copyright(c) 2024 Napatech A/S
4  */
5 
6 /*
7  * nthw_fpga_reg_defs_rst9563.h
8  *
9  * Auto-generated file - do *NOT* edit
10  *
11  */
12 
13 #ifndef _NTHW_FPGA_REG_DEFS_RST9563_
14 #define _NTHW_FPGA_REG_DEFS_RST9563_
15 
16 /* RST9563 */
17 #define NTHW_MOD_RST9563 (0x385d6d1dUL)
18 #define RST9563_CTRL (0x8fe7585fUL)
19 #define RST9563_CTRL_PTP_MMCM_CLKSEL (0xf441b405UL)
20 #define RST9563_CTRL_TS_CLKSEL (0x210e9a78UL)
21 #define RST9563_CTRL_TS_CLKSEL_OVERRIDE (0x304bbf3UL)
22 #define RST9563_POWER (0xdb6d3006UL)
23 #define RST9563_POWER_PU_NSEB (0x68a55de6UL)
24 #define RST9563_POWER_PU_PHY (0xdc0b7719UL)
25 #define RST9563_RST (0x366a2a03UL)
26 #define RST9563_RST_CORE_MMCM (0x4055af70UL)
27 #define RST9563_RST_DDR4 (0x367cad64UL)
28 #define RST9563_RST_MAC_RX (0x46da79e6UL)
29 #define RST9563_RST_PERIPH (0xd39d53bdUL)
30 #define RST9563_RST_PHY (0x50c57f90UL)
31 #define RST9563_RST_PTP (0xcf6e9a69UL)
32 #define RST9563_RST_PTP_MMCM (0xf69029c8UL)
33 #define RST9563_RST_RPP (0xa8868b03UL)
34 #define RST9563_RST_SDC (0x35477bfUL)
35 #define RST9563_RST_SYS (0xe18f0bc7UL)
36 #define RST9563_RST_SYS_MMCM (0x9f5c3d45UL)
37 #define RST9563_RST_TMC (0xd7d9da73UL)
38 #define RST9563_RST_TS (0x216dd0e7UL)
39 #define RST9563_RST_TSM_REF_MMCM (0x664f1a24UL)
40 #define RST9563_RST_TS_MMCM (0xce54ff59UL)
41 #define RST9563_STAT (0xad7dd604UL)
42 #define RST9563_STAT_CORE_MMCM_LOCKED (0xfd6d0a5aUL)
43 #define RST9563_STAT_DDR4_MMCM_LOCKED (0xb902f1d0UL)
44 #define RST9563_STAT_DDR4_PLL_LOCKED (0xe8a6d1b9UL)
45 #define RST9563_STAT_PTP_MMCM_LOCKED (0x4e4fd2a9UL)
46 #define RST9563_STAT_SYS_MMCM_LOCKED (0x5502a445UL)
47 #define RST9563_STAT_TS_MMCM_LOCKED (0xe6405b02UL)
48 #define RST9563_STICKY (0x97e2efe3UL)
49 #define RST9563_STICKY_CORE_MMCM_UNLOCKED (0xac340bb6UL)
50 #define RST9563_STICKY_DDR4_MMCM_UNLOCKED (0x4737148cUL)
51 #define RST9563_STICKY_DDR4_PLL_UNLOCKED (0xf9857d1bUL)
52 #define RST9563_STICKY_PTP_MMCM_UNLOCKED (0x2a4e9819UL)
53 #define RST9563_STICKY_SYS_MMCM_UNLOCKED (0x61e3ebbdUL)
54 #define RST9563_STICKY_TS_MMCM_UNLOCKED (0x7e9f941eUL)
55 
56 #endif	/* _NTHW_FPGA_REG_DEFS_RST9563_ */
57