xref: /dpdk/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_qsl.h (revision b95f1cd053cee23862a0dfc613e95e86dfd5f3aa)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  * Copyright(c) 2024 Napatech A/S
4  */
5 
6 /*
7  * nthw_fpga_reg_defs_qsl.h
8  *
9  * Auto-generated file - do *NOT* edit
10  *
11  */
12 
13 #ifndef _NTHW_FPGA_REG_DEFS_QSL_
14 #define _NTHW_FPGA_REG_DEFS_QSL_
15 
16 /* QSL */
17 #define NTHW_MOD_QSL (0x448ed859UL)
18 #define QSL_LTX_CTRL (0xd16859aUL)
19 #define QSL_LTX_CTRL_ADR (0x56ab4bfeUL)
20 #define QSL_LTX_CTRL_CNT (0x46a3d22fUL)
21 #define QSL_LTX_DATA (0xa2c70783UL)
22 #define QSL_LTX_DATA_LR (0xbd09e686UL)
23 #define QSL_LTX_DATA_TSA (0xdc9172f1UL)
24 #define QSL_LTX_DATA_TX_PORT (0x4e838100UL)
25 #define QSL_QEN_CTRL (0xfe8ed79cUL)
26 #define QSL_QEN_CTRL_ADR (0x81d44d48UL)
27 #define QSL_QEN_CTRL_CNT (0x91dcd499UL)
28 #define QSL_QEN_DATA (0x515f5585UL)
29 #define QSL_QEN_DATA_EN (0xa1e5961UL)
30 #define QSL_QST_CTRL (0x58cd5f95UL)
31 #define QSL_QST_CTRL_ADR (0xf71b52e1UL)
32 #define QSL_QST_CTRL_CNT (0xe713cb30UL)
33 #define QSL_QST_DATA (0xf71cdd8cUL)
34 #define QSL_QST_DATA_EN (0x19406021UL)
35 #define QSL_QST_DATA_LRE (0x71626c7eUL)
36 #define QSL_QST_DATA_QEN (0xf7cd0143UL)
37 #define QSL_QST_DATA_QUEUE (0x70bc6d12UL)
38 #define QSL_QST_DATA_TCI (0x3938f18dUL)
39 #define QSL_QST_DATA_TX_PORT (0x101a63f0UL)
40 #define QSL_QST_DATA_VEN (0xf28217c6UL)
41 #define QSL_RCP_CTRL (0x2a0d86aeUL)
42 #define QSL_RCP_CTRL_ADR (0x2798e4a0UL)
43 #define QSL_RCP_CTRL_CNT (0x37907d71UL)
44 #define QSL_RCP_DATA (0x85dc04b7UL)
45 #define QSL_RCP_DATA_CAO (0x2b87358eUL)
46 #define QSL_RCP_DATA_DISCARD (0x5b3da2b8UL)
47 #define QSL_RCP_DATA_DROP (0x30f5b2fbUL)
48 #define QSL_RCP_DATA_LR (0x3f2331c2UL)
49 #define QSL_RCP_DATA_TBL_HI (0xde81892fUL)
50 #define QSL_RCP_DATA_TBL_IDX (0xa8d19ee1UL)
51 #define QSL_RCP_DATA_TBL_LO (0x538ee91eUL)
52 #define QSL_RCP_DATA_TBL_MSK (0x2ee5f375UL)
53 #define QSL_RCP_DATA_TSA (0xada2ddafUL)
54 #define QSL_RCP_DATA_VLI (0x6da78f6dUL)
55 #define QSL_UNMQ_CTRL (0xe759d3f1UL)
56 #define QSL_UNMQ_CTRL_ADR (0xe5833152UL)
57 #define QSL_UNMQ_CTRL_CNT (0xf58ba883UL)
58 #define QSL_UNMQ_DATA (0x488851e8UL)
59 #define QSL_UNMQ_DATA_DEST_QUEUE (0xef8ce959UL)
60 #define QSL_UNMQ_DATA_EN (0x36ca8378UL)
61 
62 #endif	/* _NTHW_FPGA_REG_DEFS_QSL_ */
63 
64 /*
65  * Auto-generated file - do *NOT* edit
66  */
67