1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2024 Napatech A/S 4 */ 5 6 /* 7 * nthw_fpga_reg_defs_pdb.h 8 * 9 * Auto-generated file - do *NOT* edit 10 * 11 */ 12 13 #ifndef _NTHW_FPGA_REG_DEFS_PDB_ 14 #define _NTHW_FPGA_REG_DEFS_PDB_ 15 16 /* PDB */ 17 #define NTHW_MOD_PDB (0xa7771bffUL) 18 #define PDB_CONFIG (0xf73771edUL) 19 #define PDB_CONFIG_PORT_OFS (0xb5b30335UL) 20 #define PDB_CONFIG_TS_FORMAT (0x7013d8aUL) 21 #define PDB_RCP_CTRL (0x28ac2b3aUL) 22 #define PDB_RCP_CTRL_ADR (0x9d08b0e4UL) 23 #define PDB_RCP_CTRL_CNT (0x8d002935UL) 24 #define PDB_RCP_DATA (0x877da923UL) 25 #define PDB_RCP_DATA_ALIGN (0xe802afb8UL) 26 #define PDB_RCP_DATA_CRC_OVERWRITE (0x4847dc0aUL) 27 #define PDB_RCP_DATA_DESCRIPTOR (0x46cb76faUL) 28 #define PDB_RCP_DATA_DESC_LEN (0xf467e85bUL) 29 #define PDB_RCP_DATA_DUPLICATE_BIT (0xaeb59507UL) 30 #define PDB_RCP_DATA_DUPLICATE_EN (0xbab03efeUL) 31 #define PDB_RCP_DATA_IP_PROT_TNL (0xec892325UL) 32 #define PDB_RCP_DATA_OFS0_DYN (0xcef3786aUL) 33 #define PDB_RCP_DATA_OFS0_REL (0xde219bd9UL) 34 #define PDB_RCP_DATA_OFS1_DYN (0xf39351daUL) 35 #define PDB_RCP_DATA_OFS1_REL (0xe341b269UL) 36 #define PDB_RCP_DATA_OFS2_DYN (0xb4332b0aUL) 37 #define PDB_RCP_DATA_OFS2_REL (0xa4e1c8b9UL) 38 #define PDB_RCP_DATA_PCAP_KEEP_FCS (0x90bc735eUL) 39 #define PDB_RCP_DATA_PPC_HSH (0xac10e9f8UL) 40 #define PDB_RCP_DATA_TX_IGNORE (0x14c556dcUL) 41 #define PDB_RCP_DATA_TX_NOW (0x479cb22cUL) 42 #define PDB_RCP_DATA_TX_PORT (0x412a5ed8UL) 43 44 #endif /* _NTHW_FPGA_REG_DEFS_PDB_ */ 45 46 /* 47 * Auto-generated file - do *NOT* edit 48 */ 49