1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2024 Napatech A/S 4 */ 5 6 /* 7 * nthw_fpga_reg_defs_hsh.h 8 * 9 * Auto-generated file - do *NOT* edit 10 * 11 */ 12 13 #ifndef _NTHW_FPGA_REG_DEFS_HSH_ 14 #define _NTHW_FPGA_REG_DEFS_HSH_ 15 16 /* HSH */ 17 #define NTHW_MOD_HSH (0x501484bfUL) 18 #define HSH_RCP_CTRL (0xb257f1b9UL) 19 #define HSH_RCP_CTRL_ADR (0x5685bfbUL) 20 #define HSH_RCP_CTRL_CNT (0x1560c22aUL) 21 #define HSH_RCP_DATA (0x1d8673a0UL) 22 #define HSH_RCP_DATA_AUTO_IPV4_MASK (0xa0d4de3bUL) 23 #define HSH_RCP_DATA_HSH_TYPE (0x14cd0865UL) 24 #define HSH_RCP_DATA_HSH_VALID (0xc89b0bd3UL) 25 #define HSH_RCP_DATA_K (0xccdb0222UL) 26 #define HSH_RCP_DATA_LOAD_DIST_TYPE (0x152a0a87UL) 27 #define HSH_RCP_DATA_MAC_PORT_MASK (0x5160b288UL) 28 #define HSH_RCP_DATA_P_MASK (0x8a555abbUL) 29 #define HSH_RCP_DATA_QW0_OFS (0x276b79cfUL) 30 #define HSH_RCP_DATA_QW0_PE (0x32014a20UL) 31 #define HSH_RCP_DATA_QW4_OFS (0xd2ebdf0fUL) 32 #define HSH_RCP_DATA_QW4_PE (0xbd63dd77UL) 33 #define HSH_RCP_DATA_SEED (0xf8fc2c1cUL) 34 #define HSH_RCP_DATA_SORT (0xed5f3d38UL) 35 #define HSH_RCP_DATA_TNL_P (0x6e56b51eUL) 36 #define HSH_RCP_DATA_TOEPLITZ (0xc1864a45UL) 37 #define HSH_RCP_DATA_W8_OFS (0x68150d02UL) 38 #define HSH_RCP_DATA_W8_PE (0x9387d583UL) 39 #define HSH_RCP_DATA_W8_SORT (0x5c67eca8UL) 40 #define HSH_RCP_DATA_W9_OFS (0x557524b2UL) 41 #define HSH_RCP_DATA_W9_P (0x808204d9UL) 42 #define HSH_RCP_DATA_W9_PE (0x2b3bb2e6UL) 43 #define HSH_RCP_DATA_W9_SORT (0x973b3f0dUL) 44 #define HSH_RCP_DATA_WORD_MASK (0x55c53a1fUL) 45 46 #endif /* _NTHW_FPGA_REG_DEFS_HSH_ */ 47 48 /* 49 * Auto-generated file - do *NOT* edit 50 */ 51