xref: /dpdk/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_gmf.h (revision 7b1fef78f71690d6ae4835097dd2045312cba348)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  * Copyright(c) 2024 Napatech A/S
4  */
5 
6 /*
7  * nthw_fpga_reg_defs_gmf.h
8  *
9  * Auto-generated file - do *NOT* edit
10  *
11  */
12 
13 #ifndef _NTHW_FPGA_REG_DEFS_GMF_
14 #define _NTHW_FPGA_REG_DEFS_GMF_
15 
16 /* GMF */
17 #define NTHW_MOD_GMF (0x68b1d15aUL)
18 #define GMF_CTRL (0x28d359b4UL)
19 #define GMF_CTRL_ENABLE (0xe41c837cUL)
20 #define GMF_CTRL_FCS_ALWAYS (0x8f36cec1UL)
21 #define GMF_CTRL_IFG_AUTO_ADJUST_ENABLE (0x5b5669b0UL)
22 #define GMF_CTRL_IFG_ENABLE (0x995f1bfbUL)
23 #define GMF_CTRL_IFG_TX_NOW_ALWAYS (0xb11744c2UL)
24 #define GMF_CTRL_IFG_TX_NOW_ON_TS_ENABLE (0xe9e4ee2aUL)
25 #define GMF_CTRL_IFG_TX_ON_TS_ADJUST_ON_SET_CLOCK (0x32dc6426UL)
26 #define GMF_CTRL_IFG_TX_ON_TS_ALWAYS (0x21dcad67UL)
27 #define GMF_CTRL_TS_INJECT_ALWAYS (0x353fa4aaUL)
28 #define GMF_CTRL_TS_INJECT_DUAL_STEP (0xc4c0195cUL)
29 #define GMF_DEBUG_LANE_MARKER (0xa51eb8a9UL)
30 #define GMF_DEBUG_LANE_MARKER_COMPENSATION (0x4f44f92aUL)
31 #define GMF_IFG_MAX_ADJUST_SLACK (0xe49f3408UL)
32 #define GMF_IFG_MAX_ADJUST_SLACK_SLACK (0x9a2de1f7UL)
33 #define GMF_IFG_SET_CLOCK_DELTA (0x8a614d6fUL)
34 #define GMF_IFG_SET_CLOCK_DELTA_DELTA (0x1da821d6UL)
35 #define GMF_IFG_SET_CLOCK_DELTA_ADJUST (0xaa468304UL)
36 #define GMF_IFG_SET_CLOCK_DELTA_ADJUST_DELTA (0x2c165992UL)
37 #define GMF_IFG_TX_NOW_ON_TS (0xd32fab5eUL)
38 #define GMF_IFG_TX_NOW_ON_TS_TS (0x612771f4UL)
39 #define GMF_SPEED (0x48bec0a1UL)
40 #define GMF_SPEED_IFG_SPEED (0x273c8281UL)
41 #define GMF_STAT (0xa49d7efUL)
42 #define GMF_STAT_CTRL_EMPTY (0x3f6e8adcUL)
43 #define GMF_STAT_DATA_CTRL_EMPTY (0xc18fc6e9UL)
44 #define GMF_STAT_SB_EMPTY (0x99314d52UL)
45 #define GMF_STAT_CTRL (0xfd31633eUL)
46 #define GMF_STAT_CTRL_FILL_LEVEL (0xe8cd56d6UL)
47 #define GMF_STAT_DATA0 (0x51838aabUL)
48 #define GMF_STAT_DATA0_EMPTY (0xcfcad9c0UL)
49 #define GMF_STAT_DATA1 (0x2684ba3dUL)
50 #define GMF_STAT_DATA1_EMPTY (0x69bdd274UL)
51 #define GMF_STAT_DATA_BUFFER (0xa6431f34UL)
52 #define GMF_STAT_DATA_BUFFER_FREE (0x3476e461UL)
53 #define GMF_STAT_DATA_BUFFER_USED (0x1f46b1UL)
54 #define GMF_STAT_MAX_DELAYED_PKT (0x3fb5c76dUL)
55 #define GMF_STAT_MAX_DELAYED_PKT_NS (0x2eb58efbUL)
56 #define GMF_STAT_NEXT_PKT (0x558ee30dUL)
57 #define GMF_STAT_NEXT_PKT_NS (0x26814d33UL)
58 #define GMF_STAT_STICKY (0x5a0f2ef7UL)
59 #define GMF_STAT_STICKY_DATA_UNDERFLOWED (0x9a3dfcb6UL)
60 #define GMF_STAT_STICKY_IFG_ADJUSTED (0xea849a5fUL)
61 #define GMF_TS_INJECT (0x66e57281UL)
62 #define GMF_TS_INJECT_OFFSET (0x8c2c9cb6UL)
63 #define GMF_TS_INJECT_POS (0xdded481UL)
64 
65 #endif	/* _NTHW_FPGA_REG_DEFS_GMF_ */
66