1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2024 Napatech A/S 4 */ 5 6 /* 7 * nthw_fpga_reg_defs_gfg.h 8 * 9 * Auto-generated file - do *NOT* edit 10 * 11 */ 12 13 #ifndef _NTHW_FPGA_REG_DEFS_GFG_ 14 #define _NTHW_FPGA_REG_DEFS_GFG_ 15 16 /* GFG */ 17 #define NTHW_MOD_GFG (0xfc423807UL) 18 #define GFG_BURSTSIZE0 (0xd62af404UL) 19 #define GFG_BURSTSIZE0_VAL (0xa2e4d17eUL) 20 #define GFG_BURSTSIZE1 (0xa12dc492UL) 21 #define GFG_BURSTSIZE1_VAL (0x9f84f8ceUL) 22 #define GFG_BURSTSIZE2 (0x38249528UL) 23 #define GFG_BURSTSIZE2_VAL (0xd824821eUL) 24 #define GFG_BURSTSIZE3 (0x4f23a5beUL) 25 #define GFG_BURSTSIZE3_VAL (0xe544abaeUL) 26 #define GFG_BURSTSIZE4 (0xd147301dUL) 27 #define GFG_BURSTSIZE4_VAL (0x576477beUL) 28 #define GFG_BURSTSIZE5 (0xa640008bUL) 29 #define GFG_BURSTSIZE5_VAL (0x6a045e0eUL) 30 #define GFG_BURSTSIZE6 (0x3f495131UL) 31 #define GFG_BURSTSIZE6_VAL (0x2da424deUL) 32 #define GFG_BURSTSIZE7 (0x484e61a7UL) 33 #define GFG_BURSTSIZE7_VAL (0x10c40d6eUL) 34 #define GFG_CTRL0 (0xc3e26c0fUL) 35 #define GFG_CTRL0_ENABLE (0xfe65937UL) 36 #define GFG_CTRL0_MODE (0x81d94c52UL) 37 #define GFG_CTRL0_PRBS_EN (0xb43e6c6UL) 38 #define GFG_CTRL0_SIZE (0xe1d32f93UL) 39 #define GFG_CTRL1 (0xb4e55c99UL) 40 #define GFG_CTRL1_ENABLE (0xc34c59a9UL) 41 #define GFG_CTRL1_MODE (0x4a859ff7UL) 42 #define GFG_CTRL1_PRBS_EN (0x1c38f285UL) 43 #define GFG_CTRL1_SIZE (0x2a8ffc36UL) 44 #define GFG_CTRL2 (0x2dec0d23UL) 45 #define GFG_CTRL2_ENABLE (0x4dc35e4aUL) 46 #define GFG_CTRL2_MODE (0xcc11ed59UL) 47 #define GFG_CTRL2_PRBS_EN (0x25b5ce40UL) 48 #define GFG_CTRL2_SIZE (0xac1b8e98UL) 49 #define GFG_CTRL3 (0x5aeb3db5UL) 50 #define GFG_CTRL3_ENABLE (0x81695ed4UL) 51 #define GFG_CTRL3_MODE (0x74d3efcUL) 52 #define GFG_CTRL3_PRBS_EN (0x32ceda03UL) 53 #define GFG_CTRL3_SIZE (0x67475d3dUL) 54 #define GFG_CTRL4 (0xc48fa816UL) 55 #define GFG_CTRL4_ENABLE (0x8bac57cdUL) 56 #define GFG_CTRL4_MODE (0x1a480e44UL) 57 #define GFG_CTRL4_PRBS_EN (0x56afb7caUL) 58 #define GFG_CTRL4_SIZE (0x7a426d85UL) 59 #define GFG_CTRL5 (0xb3889880UL) 60 #define GFG_CTRL5_ENABLE (0x47065753UL) 61 #define GFG_CTRL5_MODE (0xd114dde1UL) 62 #define GFG_CTRL5_PRBS_EN (0x41d4a389UL) 63 #define GFG_CTRL5_SIZE (0xb11ebe20UL) 64 #define GFG_CTRL6 (0x2a81c93aUL) 65 #define GFG_CTRL6_ENABLE (0xc98950b0UL) 66 #define GFG_CTRL6_MODE (0x5780af4fUL) 67 #define GFG_CTRL6_PRBS_EN (0x78599f4cUL) 68 #define GFG_CTRL6_SIZE (0x378acc8eUL) 69 #define GFG_CTRL7 (0x5d86f9acUL) 70 #define GFG_CTRL7_ENABLE (0x523502eUL) 71 #define GFG_CTRL7_MODE (0x9cdc7ceaUL) 72 #define GFG_CTRL7_PRBS_EN (0x6f228b0fUL) 73 #define GFG_CTRL7_SIZE (0xfcd61f2bUL) 74 #define GFG_RUN0 (0xb72be46cUL) 75 #define GFG_RUN0_RUN (0xa457d3c8UL) 76 #define GFG_RUN1 (0xc02cd4faUL) 77 #define GFG_RUN1_RUN (0x9937fa78UL) 78 #define GFG_RUN2 (0x59258540UL) 79 #define GFG_RUN2_RUN (0xde9780a8UL) 80 #define GFG_RUN3 (0x2e22b5d6UL) 81 #define GFG_RUN3_RUN (0xe3f7a918UL) 82 #define GFG_RUN4 (0xb0462075UL) 83 #define GFG_RUN4_RUN (0x51d77508UL) 84 #define GFG_RUN5 (0xc74110e3UL) 85 #define GFG_RUN5_RUN (0x6cb75cb8UL) 86 #define GFG_RUN6 (0x5e484159UL) 87 #define GFG_RUN6_RUN (0x2b172668UL) 88 #define GFG_RUN7 (0x294f71cfUL) 89 #define GFG_RUN7_RUN (0x16770fd8UL) 90 #define GFG_SIZEMASK0 (0x7015abe3UL) 91 #define GFG_SIZEMASK0_VAL (0xe9c7ed93UL) 92 #define GFG_SIZEMASK1 (0x7129b75UL) 93 #define GFG_SIZEMASK1_VAL (0xd4a7c423UL) 94 #define GFG_SIZEMASK2 (0x9e1bcacfUL) 95 #define GFG_SIZEMASK2_VAL (0x9307bef3UL) 96 #define GFG_SIZEMASK3 (0xe91cfa59UL) 97 #define GFG_SIZEMASK3_VAL (0xae679743UL) 98 #define GFG_SIZEMASK4 (0x77786ffaUL) 99 #define GFG_SIZEMASK4_VAL (0x1c474b53UL) 100 #define GFG_SIZEMASK5 (0x7f5f6cUL) 101 #define GFG_SIZEMASK5_VAL (0x212762e3UL) 102 #define GFG_SIZEMASK6 (0x99760ed6UL) 103 #define GFG_SIZEMASK6_VAL (0x66871833UL) 104 #define GFG_SIZEMASK7 (0xee713e40UL) 105 #define GFG_SIZEMASK7_VAL (0x5be73183UL) 106 #define GFG_STREAMID0 (0xbd4ba9aeUL) 107 #define GFG_STREAMID0_VAL (0x42d077caUL) 108 #define GFG_STREAMID1 (0xca4c9938UL) 109 #define GFG_STREAMID1_VAL (0x7fb05e7aUL) 110 #define GFG_STREAMID2 (0x5345c882UL) 111 #define GFG_STREAMID2_VAL (0x381024aaUL) 112 #define GFG_STREAMID3 (0x2442f814UL) 113 #define GFG_STREAMID3_VAL (0x5700d1aUL) 114 #define GFG_STREAMID4 (0xba266db7UL) 115 #define GFG_STREAMID4_VAL (0xb750d10aUL) 116 #define GFG_STREAMID5 (0xcd215d21UL) 117 #define GFG_STREAMID5_VAL (0x8a30f8baUL) 118 #define GFG_STREAMID6 (0x54280c9bUL) 119 #define GFG_STREAMID6_VAL (0xcd90826aUL) 120 #define GFG_STREAMID7 (0x232f3c0dUL) 121 #define GFG_STREAMID7_VAL (0xf0f0abdaUL) 122 123 #endif /* _NTHW_FPGA_REG_DEFS_GFG_ */ 124